diff options
Diffstat (limited to 'src/import')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/core/p9_sbe_instruct_start.C | 13 | ||||
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/core/p9_sbe_instruct_start.H | 10 |
2 files changed, 11 insertions, 12 deletions
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_sbe_instruct_start.C b/src/import/chips/p9/procedures/hwp/core/p9_sbe_instruct_start.C index cc850131a..51a2914ba 100644 --- a/src/import/chips/p9/procedures/hwp/core/p9_sbe_instruct_start.C +++ b/src/import/chips/p9/procedures/hwp/core/p9_sbe_instruct_start.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* Contributors Listed Below - COPYRIGHT 2015,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -24,14 +24,14 @@ /* IBM_PROLOG_END_TAG */ /// /// @file p9_sbe_instruct_start.C -/// @brief -/// Starts instructions on 1 core, thread 0. -/// Thread 0 will be started at CIA scan flush value of 0. +/// +/// @brief Starts instructions on master core, thread 0. +/// Thread 0 will be started at CIA scan flush value of 0. // // *HWP HWP Owner: Nick Klazynski <jklazyns@us.ibm.com> // *HWP FW Owner: Thi Tran <thi@us.ibm.com> // *HWP Team: Nest -// *HWP Level: 2 +// *HWP Level: 3 // *HWP Consumed by: HB // @@ -56,7 +56,7 @@ extern "C" FAPI_INF("Starting instruction on thread 0"); FAPI_TRY(p9_thread_control(i_target, 0b1000, PTC_CMD_START, false, l_rasStatusReg, l_state), - "p9_sbe_instruct_start: p9_thread_control() returns an error"); + "p9_thread_control() returns an error"); fapi_try_exit: FAPI_DBG("Exiting ..."); @@ -64,4 +64,3 @@ extern "C" } } // extern "C" -/* End: */ diff --git a/src/import/chips/p9/procedures/hwp/core/p9_sbe_instruct_start.H b/src/import/chips/p9/procedures/hwp/core/p9_sbe_instruct_start.H index 09d67d915..b6ce163e8 100644 --- a/src/import/chips/p9/procedures/hwp/core/p9_sbe_instruct_start.H +++ b/src/import/chips/p9/procedures/hwp/core/p9_sbe_instruct_start.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* Contributors Listed Below - COPYRIGHT 2015,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -23,13 +23,13 @@ /* */ /* IBM_PROLOG_END_TAG */ /// -/// @file p9_sbe_instruct_start.C -/// @brief Placeholder for overrides needed to step the core from cache-contained execution to expand to memory +/// @file p9_sbe_instruct_start.H +/// @brief Starts instructions on master core, thread 0. /// // *HWP HWP Owner: Nick Klazynski <jklazyns@us.ibm.com> // *HWP FW Owner: Thi Tran <thi@us.ibm.com> // *HWP Team: Nest -// *HWP Level: 2 +// *HWP Level: 3 // *HWP Consumed by: HB #ifndef _PROC_SBE_INSTRUCT_START_H_ @@ -55,7 +55,7 @@ extern "C" // Hardware Procedure //------------------------------------------------------------------------------ /// -/// @brief Calls thread_control to start instruction on thread 0. +/// @brief Calls thread_control to start instruction on master core, thread 0. /// This is to be called during IPL (istep 5.2) /// /// @param[in] i_target Reference to core target |
