diff options
Diffstat (limited to 'src/import/chips/p9')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/memory/lib/dimm/rcd_load_ddr4.C | 6 | ||||
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/memory/lib/workarounds/draminit_workarounds.C | 5 |
2 files changed, 7 insertions, 4 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/rcd_load_ddr4.C b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/rcd_load_ddr4.C index ec67c46b6..c83aff018 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/rcd_load_ddr4.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/rcd_load_ddr4.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015,2017 */ +/* Contributors Listed Below - COPYRIGHT 2015,2018 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -129,6 +129,10 @@ fapi2::ReturnCode rcd_load_ddr4( const fapi2::Target<TARGET_TYPE_DIMM>& i_target "Failed to load 4-bit RC09 control word for %s", mss::c_str(i_target)); + // Toggle RC06 again to ensure the DRAM is reset properly + FAPI_TRY( mss::workarounds::rcw_reset_dram(i_target, io_inst), "%s failed to add reset workaround functionality", + mss::c_str(i_target)); + fapi_try_exit: return fapi2::current_err; } diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/draminit_workarounds.C b/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/draminit_workarounds.C index f53f085d3..e1c53348f 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/draminit_workarounds.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/draminit_workarounds.C @@ -62,9 +62,8 @@ fapi2::ReturnCode rcw_reset_dram( const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& constexpr uint64_t RESET_CW = 6; constexpr uint64_t RESET_DRAM = 0x02; constexpr uint64_t CLEAR_RESET = 0x03; - // Using a delay of 2000 cycles to ensure we're holding everything for a long enough time - // Note: this value is set using "engineering judgement" and was considered arbitrarily high enough - constexpr uint64_t DELAY = 2000; + // Note: the minimum for a FORC06 soft reset is 32 cycles, but we empirically tested it at 8k cycles + constexpr uint64_t DELAY = 8000; // Function space 0 constexpr uint8_t FS0 = 0; |
