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-rwxr-xr-xsrc/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.C25
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.H23
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H80
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/shared/mss_const.H1
-rwxr-xr-xsrc/import/chips/p9/procedures/hwp/memory/p9_mss_eff_config.C2
5 files changed, 129 insertions, 2 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.C b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.C
index 4181e791e..1968516fc 100755
--- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.C
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.C
@@ -4578,7 +4578,30 @@ fapi_try_exit:
return fapi2::current_err;
}
-// TK:LRDIMM Update and/or verify all bc## steps below
+///
+/// @brief Sets the LRDIMM training pattern
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_lrdimm::lrdimm_training_pattern()
+{
+ // Default patterns are taken from experiments
+ // Patterns were selected for having a good balance of transitions
+ // We need the temporary variable due to how FAPI_ATTR_SET works
+ uint8_t l_default_patterns[NUM_LRDIMM_TRAINING_PATTERNS] =
+ {
+ 0x2b,
+ 0x3c,
+ 0x96,
+ 0x35,
+ 0x6a,
+ };
+
+ FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_MSS_LRDIMM_TRAINING_PATTERN, iv_mcs, l_default_patterns) );
+
+fapi_try_exit:
+ return fapi2::current_err;
+}
+
///
/// @brief Determines & sets effective config for DIMM BC00
/// @return fapi2::FAPI2_RC_SUCCESS if okay
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.H b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.H
index 693e14a8b..656a061c5 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.H
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.H
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2016,2018 */
+/* Contributors Listed Below - COPYRIGHT 2016,2019 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -873,6 +873,12 @@ class eff_dimm
virtual fapi2::ReturnCode dram_rtt_park() = 0;
///
+ /// @brief Sets the LRDIMM training pattern
+ /// @return fapi2::FAPI2_RC_SUCCESS if okay
+ ///
+ virtual fapi2::ReturnCode lrdimm_training_pattern() = 0;
+
+ ///
/// @brief Determines and sets DIMM BC00
/// @return fapi2::FAPI2_RC_SUCCESS if okay
///
@@ -1123,6 +1129,12 @@ class eff_lrdimm : public eff_dimm
virtual fapi2::ReturnCode dram_odic() final;
///
+ /// @brief Sets the LRDIMM training pattern
+ /// @return fapi2::FAPI2_RC_SUCCESS if okay
+ ///
+ virtual fapi2::ReturnCode lrdimm_training_pattern() final;
+
+ ///
/// @brief Determines and sets DIMM BC00
/// @return fapi2::FAPI2_RC_SUCCESS if okay
///
@@ -1437,6 +1449,15 @@ class eff_rdimm : public eff_dimm
virtual fapi2::ReturnCode dram_odic() final;
///
+ /// @brief Sets the LRDIMM training pattern
+ /// @return fapi2::FAPI2_RC_SUCCESS if okay
+ ///
+ fapi2::ReturnCode lrdimm_training_pattern()
+ {
+ return fapi2::FAPI2_RC_SUCCESS;
+ }
+
+ ///
/// @brief Determines and sets DIMM BC00
/// @return fapi2::FAPI2_RC_SUCCESS if okay
///
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H b/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H
index 3e4f32c5b..75ea83e39 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H
@@ -10086,6 +10086,86 @@ fapi_try_exit:
}
///
+/// @brief ATTR_MSS_LRDIMM_TRAINING_PATTERN getter
+/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCA>
+/// @param[out] ref to the value uint8_t
+/// @note Generated by gen_accessors.pl generateParameters (D)
+/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
+/// @note Patterns for LRDIMM training
+/// steps
+///
+inline fapi2::ReturnCode lrdimm_training_pattern(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target,
+ uint8_t& o_value)
+{
+ uint8_t l_value[5];
+
+ FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_LRDIMM_TRAINING_PATTERN, i_target.getParent<fapi2::TARGET_TYPE_MCS>(),
+ l_value) );
+ o_value = l_value[mss::index(i_target)];
+ return fapi2::current_err;
+
+fapi_try_exit:
+ FAPI_ERR("failed accessing ATTR_MSS_LRDIMM_TRAINING_PATTERN: 0x%lx (target: %s)",
+ uint64_t(fapi2::current_err), mss::c_str(i_target));
+ return fapi2::current_err;
+}
+
+///
+/// @brief ATTR_MSS_LRDIMM_TRAINING_PATTERN getter
+/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_DIMM>
+/// @param[out] ref to the value uint8_t
+/// @note Generated by gen_accessors.pl generateParameters (D.1)
+/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
+/// @note Patterns for LRDIMM training
+/// steps
+///
+inline fapi2::ReturnCode lrdimm_training_pattern(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
+ uint8_t& o_value)
+{
+ uint8_t l_value[5];
+ auto l_mca = i_target.getParent<fapi2::TARGET_TYPE_MCA>();
+
+ FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_LRDIMM_TRAINING_PATTERN, l_mca.getParent<fapi2::TARGET_TYPE_MCS>(), l_value) );
+ o_value = l_value[mss::index(l_mca)];
+ return fapi2::current_err;
+
+fapi_try_exit:
+ FAPI_ERR("failed accessing ATTR_MSS_LRDIMM_TRAINING_PATTERN: 0x%lx (target: %s)",
+ uint64_t(fapi2::current_err), mss::c_str(i_target));
+ return fapi2::current_err;
+}
+
+///
+/// @brief ATTR_MSS_LRDIMM_TRAINING_PATTERN getter
+/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCS>
+/// @param[out] uint8_t* memory to store the value
+/// @note Generated by gen_accessors.pl generateParameters (E)
+/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
+/// @note Patterns for LRDIMM training
+/// steps
+///
+inline fapi2::ReturnCode lrdimm_training_pattern(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target,
+ uint8_t* o_array)
+{
+ if (o_array == nullptr)
+ {
+ FAPI_ERR("nullptr passed to attribute accessor %s", __func__);
+ return fapi2::FAPI2_RC_INVALID_PARAMETER;
+ }
+
+ uint8_t l_value[5];
+
+ FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_LRDIMM_TRAINING_PATTERN, i_target, l_value) );
+ memcpy(o_array, &l_value, 5);
+ return fapi2::current_err;
+
+fapi_try_exit:
+ FAPI_ERR("failed accessing ATTR_MSS_LRDIMM_TRAINING_PATTERN: 0x%lx (target: %s)",
+ uint64_t(fapi2::current_err), mss::c_str(i_target));
+ return fapi2::current_err;
+}
+
+///
/// @brief ATTR_MSS_EFF_ODT_RD getter
/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_DIMM>
/// @param[out] uint8_t* memory to store the value
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/shared/mss_const.H b/src/import/chips/p9/procedures/hwp/memory/lib/shared/mss_const.H
index 03408da9d..ea7748d2d 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/shared/mss_const.H
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/shared/mss_const.H
@@ -71,6 +71,7 @@ enum sizes
MAX_LRDIMM_BUFFERS = MAX_DRAMS_X8,
NUM_MRW_FREQS = 4, ///< Used for ATTR_MSS_MRW_SUPPORTED_FREQ
+ NUM_LRDIMM_TRAINING_PATTERNS = 5, ///< Used for ATTR_MSS_LRDIMM_TRAINING_PATTERN
BAD_DQ_BYTE_COUNT = 10, ///< Elements in a BAD_DQ_BITMAP attribute array
diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_eff_config.C b/src/import/chips/p9/procedures/hwp/memory/p9_mss_eff_config.C
index 7b40852ff..d4501c1b3 100755
--- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_eff_config.C
+++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_eff_config.C
@@ -100,6 +100,8 @@ fapi2::ReturnCode p9_mss_eff_config( const fapi2::Target<fapi2::TARGET_TYPE_MCS>
FAPI_INF("Setting up ODIC and ODT attributes on %s", mss::c_str(l_dimm) );
+ FAPI_TRY( l_eff_dimm->lrdimm_training_pattern(),
+ "Failed lrdimm_training_pattern for %s", mss::c_str(l_dimm) );
FAPI_TRY( l_eff_dimm->dram_odic(),
"Failed dram_odic for %s", mss::c_str(l_dimm) );
FAPI_TRY( l_eff_dimm->odt_wr(),
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