diff options
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/memory')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist.H | 17 | ||||
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/memory/tests/mss_memdiags_ut.C | 18 |
2 files changed, 27 insertions, 8 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist.H b/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist.H index 61be05a2f..2fd14faad 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist.H @@ -1213,7 +1213,22 @@ template< fapi2::TargetType T, typename TT = mcbistTraits<T> > inline fapi2::ReturnCode load_config( const fapi2::Target<T>& i_target, const mcbist::program<T>& i_program ) { FAPI_INF("loading MCBIST Config 0x%016lx", i_program.iv_config); - return mss::putScom(i_target, TT::CFGQ_REG, i_program.iv_config); + + // Copy the program's config settings - we want to modify them if we're in sim. + fapi2::buffer<uint64_t> l_config = i_program.iv_config; + + // If we're running in Cronus, there is no interrupt so any attention bits will + // hang something somewhere. Make sure there's nothing in this config which can + // turn on attention bits unless we're running in hostboot +#ifndef __HOSTBOOT_MODULE + l_config.template clearBit<TT::CFG_ENABLE_HOST_ATTN>(); + l_config.template clearBit<TT::CFG_ENABLE_SPEC_ATTN>(); +#endif + + FAPI_TRY( mss::putScom(i_target, TT::CFGQ_REG, l_config) ); + +fapi_try_exit: + return fapi2::current_err; } diff --git a/src/import/chips/p9/procedures/hwp/memory/tests/mss_memdiags_ut.C b/src/import/chips/p9/procedures/hwp/memory/tests/mss_memdiags_ut.C index 41fb88909..3c3c49a97 100644 --- a/src/import/chips/p9/procedures/hwp/memory/tests/mss_memdiags_ut.C +++ b/src/import/chips/p9/procedures/hwp/memory/tests/mss_memdiags_ut.C @@ -306,7 +306,7 @@ TEST_CASE_METHOD(mss::test::mcbist_target_test_fixture, "memdiags", "[memdiags]" { fapi2::buffer<uint64_t> l_read; REQUIRE_FALSE( mss::getScom(i_target, MCBIST_MCBCFGQ, l_read) ); - REQUIRE( 0x0000000000000081 == l_read ); + REQUIRE( 0x0000000000000080 == l_read ); } // Load thresholds - default state (expecting default threshold register state) @@ -401,7 +401,7 @@ TEST_CASE_METHOD(mss::test::mcbist_target_test_fixture, "memdiags", "[memdiags]" { fapi2::buffer<uint64_t> l_read; REQUIRE_FALSE( mss::getScom(i_target, MCBIST_MCBCFGQ, l_read) ); - REQUIRE( 0x0000000000000081 == l_read ); + REQUIRE( 0x0000000000000080 == l_read ); } // Load thresholds - default state (expecting default threshold register state) @@ -493,7 +493,7 @@ TEST_CASE_METHOD(mss::test::mcbist_target_test_fixture, "memdiags", "[memdiags]" { fapi2::buffer<uint64_t> l_read; REQUIRE_FALSE( mss::getScom(i_target, MCBIST_MCBCFGQ, l_read) ); - REQUIRE( 0x00000000000000a1 == l_read ); + REQUIRE( 0x00000000000000a0 == l_read ); } // Load thresholds - default state (expecting default threshold register state) @@ -594,11 +594,15 @@ TEST_CASE_METHOD(mss::test::mcbist_target_test_fixture, "memdiags", "[memdiags]" switch (l_size) { case 128: - REQUIRE(l_read == 0x68000000000000); + REQUIRE(l_read == 0x0068000000000000); break; case 64: - REQUIRE(l_read == 0xC8000000000000); + REQUIRE(l_read == 0x00C8000000000000); + break; + + case 32: + REQUIRE(l_read == 0x0198000000000000); break; default: @@ -661,7 +665,7 @@ TEST_CASE_METHOD(mss::test::mcbist_target_test_fixture, "memdiags", "[memdiags]" { fapi2::buffer<uint64_t> l_read; REQUIRE_FALSE( mss::getScom(i_target, MCBIST_MCBCFGQ, l_read) ); - REQUIRE( 0x0000000000000001 == l_read ); + REQUIRE( 0x0000000000000000 == l_read ); } @@ -712,7 +716,7 @@ TEST_CASE_METHOD(mss::test::mcbist_target_test_fixture, "memdiags", "[memdiags]" { fapi2::buffer<uint64_t> l_read; REQUIRE_FALSE( mss::getScom(i_target, MCBIST_MCBCFGQ, l_read) ); - REQUIRE( 0x0000000020000041 == l_read ); + REQUIRE( 0x0000000020000040 == l_read ); } } |
