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path: root/src/import/chips/p9/procedures/hwp/memory/p9_mss_draminit_training.C
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Diffstat (limited to 'src/import/chips/p9/procedures/hwp/memory/p9_mss_draminit_training.C')
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/p9_mss_draminit_training.C5
1 files changed, 3 insertions, 2 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_draminit_training.C b/src/import/chips/p9/procedures/hwp/memory/p9_mss_draminit_training.C
index 49a6cd09b..e1c67caf6 100644
--- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_draminit_training.C
+++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_draminit_training.C
@@ -66,7 +66,7 @@ extern "C"
}
uint8_t l_reset_disable = 0;
- FAPI_TRY( mss::mrw_draminit_reset_disable(l_reset_disable) );
+ FAPI_TRY( mss::mrw_reset_delay_before_cal(l_reset_disable) );
// Configure the CCS engine.
{
@@ -153,8 +153,9 @@ extern "C"
// Check to see if we're supposed to reset the delay values before starting training
// don't reset if we're running special training - assumes there's a checkpoint which has valid state.
- if ((l_reset_disable == fapi2::ENUM_ATTR_MRW_DRAMINIT_RESET_DISABLE_ENABLE) && (i_special_training == 0))
+ if ((l_reset_disable == fapi2::ENUM_ATTR_MSS_MRW_RESET_DELAY_BEFORE_CAL_YES) && (i_special_training == 0))
{
+ FAPI_INF("resetting delay values before cal %s", mss::c_str(p));
FAPI_TRY( mss::dp16::reset_delay_values(p, l_pairs) );
}
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