diff options
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/io/p9_io_obus_image_build.C')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/io/p9_io_obus_image_build.C | 158 |
1 files changed, 50 insertions, 108 deletions
diff --git a/src/import/chips/p9/procedures/hwp/io/p9_io_obus_image_build.C b/src/import/chips/p9/procedures/hwp/io/p9_io_obus_image_build.C index a74b8cb65..a2b8b981f 100644 --- a/src/import/chips/p9/procedures/hwp/io/p9_io_obus_image_build.C +++ b/src/import/chips/p9/procedures/hwp/io/p9_io_obus_image_build.C @@ -41,162 +41,104 @@ #include "p9_xip_image.h" //--------------------------------------------------------------------------- -fapi2::ReturnCode getBaseAddress( - const fapi2::Target < fapi2::TARGET_TYPE_OBUS > i_tgt, - uint64_t& o_baseAddr ) +fapi2::ReturnCode extractPpeImg(void* const iImagePtr, uint8_t*& oObusImgPtr, uint32_t& oSize) { - FAPI_IMP( "Entering get_base_scom_address." ); - - uint8_t unitPos = 0; - - FAPI_TRY( FAPI_ATTR_GET( fapi2::ATTR_CHIP_UNIT_POS, i_tgt, unitPos ), - "Fapi Attr Get Chip Unit Pos Failed." ); - - switch( unitPos ) - { - case 0: - o_baseAddr = 0x0000000009011040ull; - break; - - case 1: - o_baseAddr = 0x000000000A011040ull; - break; - - case 2: - o_baseAddr = 0x000000000B011040ull; - break; - - case 3: - o_baseAddr = 0x000000000C011040ull; - break; - - default: - o_baseAddr = 0x0000000000000000ull; - break; - - } - - FAPI_IMP( "Exiting get_base_scom_address." ); -fapi_try_exit: - return fapi2::current_err; -} - -//--------------------------------------------------------------------------- -fapi2::ReturnCode getObusImageFromHcode( void* const i_pImage, uint8_t* i_pObusImg, uint32_t& o_size ) -{ - uint8_t* pIoSection; + FAPI_IMP("Entering getObusImageFromHwImage."); P9XipSection ppeSection; - ppeSection.iv_offset = 0; ppeSection.iv_size = 0; - - FAPI_ASSERT( i_pImage != NULL , - fapi2::P9_IO_PPE_OBUS_IMG_PTR_ERROR().set_HW_IMG_PTR( i_pImage ), - "Bad pointer to HW Image." ); + FAPI_ASSERT(iImagePtr != NULL , + fapi2::P9_IO_PPE_OBUS_IMG_PTR_ERROR().set_HW_IMG_PTR(iImagePtr), + "Bad pointer to HW Image."); // Pulls the IO PPE Section from the HW/XIP Image // XIP(Execution In Place) -- Points to Seeprom - FAPI_TRY( p9_xip_get_section( i_pImage, P9_XIP_SECTION_HW_IOPPE, &ppeSection ) ); + FAPI_TRY(p9_xip_get_section(iImagePtr, P9_XIP_SECTION_HW_IOPPE, &ppeSection)); - // Point to the Io Section in the HW/XIP Image - pIoSection = ppeSection.iv_offset + (uint8_t*) ( i_pImage ); + // Point to the I/O PPE Section in the HW/XIP Image + oObusImgPtr = ppeSection.iv_offset + (uint8_t*)(iImagePtr); - // From the Io Section, lets pull the IOO Image. - // TODO : Need to get an updated section for IOO Image. - FAPI_TRY( p9_xip_get_section( pIoSection, P9_XIP_SECTIONS_IOPPE, &ppeSection ) ); + // From the I/O Section, lets pull the IOO Nvlink Image. + FAPI_TRY(p9_xip_get_section(oObusImgPtr, P9_XIP_SECTION_IOPPE_IOO_NV, &ppeSection)); - // Point to the IOO PPE Image of the Io Section - i_pObusImg = ppeSection.iv_offset + (uint8_t*) ( pIoSection ); + // Point to the IOO PPE Image of the I/O PPE Section + oObusImgPtr = ppeSection.iv_offset + (uint8_t*)(oObusImgPtr); // Set the Size of the IOO Image - o_size = ppeSection.iv_size; + oSize = ppeSection.iv_size; fapi_try_exit: + FAPI_IMP("Exiting getObusImageFromHwImage."); return fapi2::current_err; } //--------------------------------------------------------------------------- -fapi2::ReturnCode scomWrite( - const fapi2::Target<fapi2::TARGET_TYPE_OBUS>& i_tgt, - const uint64_t i_addr, - const uint64_t i_data ) +fapi2::ReturnCode scomWrite(CONST_OBUS& iTgt, const uint64_t iAddr, const uint64_t iData) { - fapi2::buffer<uint64_t> data64( i_data ); - + fapi2::buffer<uint64_t> data64(iData); // Xscom -- Scom from core in Hostboot mode - return fapi2::putScom( i_tgt, i_addr, data64 ); + return fapi2::putScom(iTgt, iAddr, data64); } //--------------------------------------------------------------------------- -fapi2::ReturnCode p9_io_obus_image_build( - const fapi2::Target < fapi2::TARGET_TYPE_OBUS >& i_tgt, - void* const i_pImage ) +fapi2::ReturnCode p9_io_obus_image_build(CONST_OBUS& iTgt, void* const iHwImagePtr) { - FAPI_IMP( "Entering p9_io_ioo_ppe_hcode_build." ); + FAPI_IMP("Entering p9_io_obus_image_build."); - const uint64_t SRAM_BASE_ADDR = 0xFFFF000000000000ull; - const uint64_t PPE_AUTOINC_EN = 0x8000000000000000ull; - const uint64_t PPE_AUTOINC_DIS = 0x0000000000000000ull; - const uint64_t PPE_HARD_RESET = 0x6000000000000000ull; // xcr cmd=110 - const uint64_t PPE_RESUME_FROM_HALT = 0x2000000000000000ull; // xcr cmd=010 + const uint64_t SRAM_BASE_ADDR = 0xFFFF000000000000ull; + const uint64_t AUTOINC_EN = 0x8000000000000000ull; + const uint64_t AUTOINC_DIS = 0x0000000000000000ull; + const uint64_t HARD_RESET = 0x6000000000000000ull; // xcr cmd=110 + const uint64_t RESUME_FROM_HALT = 0x2000000000000000ull; // xcr cmd=010 // PPE Address - const uint64_t MEM_ARB_CSAR = 0x0D; // Sram Address Reg - const uint64_t MEM_ARB_SCR = 0x0A; // Sram Source Control Reg - const uint64_t MEM_ARB_CSDR = 0x0E; // Sram Data Reg - const uint64_t XCR_NONE = 0x10; // External Control Reg + const uint64_t BASE_ADDR = 0x0000000006010C00ull; + const uint64_t MEM_ARB_CSAR = 0x000000000000000Dull | BASE_ADDR; // Sram Address Reg + const uint64_t MEM_ARB_SCR = 0x000000000000000Aull | BASE_ADDR; // Sram Source Control Reg + const uint64_t MEM_ARB_CSDR = 0x000000000000000Eull | BASE_ADDR; // Sram Data Reg + const uint64_t XCR_NONE = 0x0000000000000010ull | BASE_ADDR; // External Control Reg uint64_t data = 0; - uint64_t baseAddr = 0; - uint8_t* pObusImg = NULL; + uint8_t* pObusImg = NULL; uint32_t imgSize = 0; - // Sets the base address based on the chip unit position - FAPI_TRY( getBaseAddress( i_tgt, baseAddr ), - "getBaseAddress Failed." ); + FAPI_TRY(extractPpeImg(iHwImagePtr, pObusImg, imgSize), "Extract PPE Image Failed."); - // Get Image from Hcode - FAPI_TRY( getObusImageFromHcode( i_pImage, pObusImg, imgSize ), - "Get Obus PPE Image Failed." ); + // PPE Reset + FAPI_TRY(scomWrite(iTgt, XCR_NONE, HARD_RESET), "Hard Reset Failed."); // Set PPE Base Address - FAPI_TRY( scomWrite( i_tgt, baseAddr | MEM_ARB_CSAR, SRAM_BASE_ADDR ), - "I/O Obus PPE Set Base Address Failed." ); + FAPI_TRY(scomWrite(iTgt, MEM_ARB_CSAR, SRAM_BASE_ADDR), "Set Base Address Failed."); // Set PPE into Autoincrement Mode - FAPI_TRY( scomWrite( i_tgt, baseAddr | MEM_ARB_SCR, PPE_AUTOINC_EN ), - "I/O Obus PPE Auto Increment Enable Failed." ); + FAPI_TRY(scomWrite(iTgt, MEM_ARB_SCR, AUTOINC_EN), "Auto-Increment Enable Failed."); - for( uint32_t i = 0; i < imgSize; i += 8 ) + for(uint32_t i = 0; i < imgSize; i += 8) { - data = ( ( (uint64_t)pObusImg[i + 0] << 56 ) & 0xFF00000000000000ull ) | - ( ( (uint64_t)pObusImg[i + 1] << 48 ) & 0x00FF000000000000ull ) | - ( ( (uint64_t)pObusImg[i + 2] << 40 ) & 0x0000FF0000000000ull ) | - ( ( (uint64_t)pObusImg[i + 3] << 32 ) & 0x000000FF00000000ull ) | - ( ( (uint64_t)pObusImg[i + 4] << 24 ) & 0x00000000FF000000ull ) | - ( ( (uint64_t)pObusImg[i + 5] << 16 ) & 0x0000000000FF0000ull ) | - ( ( (uint64_t)pObusImg[i + 6] << 8 ) & 0x000000000000FF00ull ) | - ( ( (uint64_t)pObusImg[i + 7] << 0 ) & 0x00000000000000FFull ); + data = (((uint64_t) * (pObusImg + i + 0) << 56) & 0xFF00000000000000ull) | + (((uint64_t) * (pObusImg + i + 1) << 48) & 0x00FF000000000000ull) | + (((uint64_t) * (pObusImg + i + 2) << 40) & 0x0000FF0000000000ull) | + (((uint64_t) * (pObusImg + i + 3) << 32) & 0x000000FF00000000ull) | + (((uint64_t) * (pObusImg + i + 4) << 24) & 0x00000000FF000000ull) | + (((uint64_t) * (pObusImg + i + 5) << 16) & 0x0000000000FF0000ull) | + (((uint64_t) * (pObusImg + i + 6) << 8) & 0x000000000000FF00ull) | + (((uint64_t) * (pObusImg + i + 7) << 0) & 0x00000000000000FFull); + // Write Data, as the address will be autoincremented. - FAPI_TRY( scomWrite( i_tgt, baseAddr | MEM_ARB_CSDR, data ), - "I/O Obus PPE Data Write Failed." ); + FAPI_TRY(scomWrite(iTgt, MEM_ARB_CSDR, data), "Data Write Failed."); } // Disable Auto Increment - FAPI_TRY( scomWrite( i_tgt, baseAddr | MEM_ARB_SCR, PPE_AUTOINC_DIS ), - "I/O Obus PPE Auto-Increment Disable Failed." ); + FAPI_TRY(scomWrite(iTgt, MEM_ARB_SCR, AUTOINC_DIS), "Auto-Increment Disable Failed."); // PPE Reset - FAPI_TRY( scomWrite( i_tgt, baseAddr | XCR_NONE, PPE_HARD_RESET ), - "I/O Obus PPE Hard Reset Failed. " ); + FAPI_TRY(scomWrite(iTgt, XCR_NONE, HARD_RESET), "Hard Reset Failed."); // PPE Resume From Halt - FAPI_TRY( scomWrite( i_tgt, baseAddr | XCR_NONE, PPE_RESUME_FROM_HALT ), - "I/O Obus PPE Resume From Halt Failed." ); - - FAPI_IMP( "Exit p9_hcode_image_build." ); + FAPI_TRY(scomWrite(iTgt, XCR_NONE, RESUME_FROM_HALT), "Resume From Halt Failed."); fapi_try_exit: + FAPI_IMP("Exit p9_io_obus_image_build."); return fapi2::current_err; } |
