diff options
Diffstat (limited to 'src/import/chips/ocmb/explorer/procedures/hwp/memory/lib')
4 files changed, 3 insertions, 11 deletions
diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/ccs/ccs_traits_explorer.H b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/ccs/ccs_traits_explorer.H index 965b98057..3411a677c 100644 --- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/ccs/ccs_traits_explorer.H +++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/ccs/ccs_traits_explorer.H @@ -96,15 +96,11 @@ class ccsTraits<mss::mc_type::EXPLORER> UE_DISABLE = EXPLR_MCBIST_CCS_MODEQ_UE_DISABLE, DATA_COMPARE_BURST_SEL = EXPLR_MCBIST_CCS_MODEQ_DATA_COMPARE_BURST_SEL, DATA_COMPARE_BURST_SEL_LEN = EXPLR_MCBIST_CCS_MODEQ_DATA_COMPARE_BURST_SEL_LEN, - DDR_CAL_TIMEOUT_CNT = EXPLR_MCBIST_CCS_MODEQ_DDR_CAL_TIMEOUT_CNT, - DDR_CAL_TIMEOUT_CNT_LEN = EXPLR_MCBIST_CCS_MODEQ_DDR_CAL_TIMEOUT_CNT_LEN, CFG_PARITY_AFTER_CMD = EXPLR_MCBIST_CCS_MODEQ_CFG_PARITY_AFTER_CMD, COPY_CKE_TO_SPARE_CKE = EXPLR_MCBIST_CCS_MODEQ_COPY_CKE_TO_SPARE_CKE, DISABLE_ECC_ARRAY_CHK = EXPLR_MCBIST_CCS_MODEQ_DISABLE_ECC_ARRAY_CHK, DISABLE_ECC_ARRAY_CORRECTION = EXPLR_MCBIST_CCS_MODEQ_DISABLE_ECC_ARRAY_CORRECTION, CFG_DGEN_FIXED_MODE = EXPLR_MCBIST_CCS_MODEQ_CFG_DGEN_FIXED_MODE, - DDR_CAL_TIMEOUT_CNT_MULT = EXPLR_MCBIST_CCS_MODEQ_DDR_CAL_TIMEOUT_CNT_MULT, - DDR_CAL_TIMEOUT_CNT_MULT_LEN = EXPLR_MCBIST_CCS_MODEQ_DDR_CAL_TIMEOUT_CNT_MULT_LEN, IDLE_PAT_ADDRESS_0_13 = EXPLR_MCBIST_CCS_MODEQ_IDLE_PAT_ADDRESS_0_13, IDLE_PAT_ADDRESS_0_13_LEN = EXPLR_MCBIST_CCS_MODEQ_IDLE_PAT_ADDRESS_0_13_LEN, IDLE_PAT_ADDRESS_17 = EXPLR_MCBIST_CCS_MODEQ_IDLE_PAT_ADDRESS_17, @@ -157,8 +153,6 @@ class ccsTraits<mss::mc_type::EXPLORER> ARR0_DDR_CID_2 = EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_CID_2, ARR0_DDR_ODT = EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_ODT, ARR0_DDR_ODT_LEN = EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_ODT_LEN, - ARR0_DDR_CAL_TYPE = EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_CAL_TYPE, - ARR0_DDR_CAL_TYPE_LEN = EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_CAL_TYPE_LEN, ARR0_DDR_PARITY = EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_PARITY, ARR0_DDR_BANK_2 = EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_BANK_2, ARR0_LOOP_BREAK_MODE = EXPLR_MCBIST_CCS_INST_ARR0_00_LOOP_BREAK_MODE, @@ -172,9 +166,6 @@ class ccsTraits<mss::mc_type::EXPLORER> ARR1_READ_OR_WRITE_DATA = EXPLR_MCBIST_CCS_INST_ARR1_00_READ_OR_WRITE_DATA, ARR1_READ_OR_WRITE_DATA_LEN = EXPLR_MCBIST_CCS_INST_ARR1_00_READ_OR_WRITE_DATA_LEN, ARR1_READ_COMPARE_REQUIRED = EXPLR_MCBIST_CCS_INST_ARR1_00_READ_COMPARE_REQUIRED, - ARR1_DDR_CAL_RANK = EXPLR_MCBIST_CCS_INST_ARR1_00_DDR_CAL_RANK, - ARR1_DDR_CAL_RANK_LEN = EXPLR_MCBIST_CCS_INST_ARR1_00_DDR_CAL_RANK_LEN, - ARR1_DDR_CALIBRATION_ENABLE = EXPLR_MCBIST_CCS_INST_ARR1_00_DDR_CALIBRATION_ENABLE, ARR1_END = EXPLR_MCBIST_CCS_INST_ARR1_00_END, ARR1_GOTO_CMD = EXPLR_MCBIST_CCS_INST_ARR1_00_GOTO_CMD, ARR1_GOTO_CMD_LEN = EXPLR_MCBIST_CCS_INST_ARR1_00_GOTO_CMD_LEN, diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/exp_getecid_utils.C b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/exp_getecid_utils.C index 427f2a3ea..86eb99850 100644 --- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/exp_getecid_utils.C +++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/exp_getecid_utils.C @@ -36,6 +36,7 @@ #include <lib/i2c/exp_i2c.H> #include <lib/shared/exp_consts.H> #include <explorer_scom_addresses.H> +#include <explorer_scom_addresses_fixes.H> #include <explorer_scom_addresses_fld_fixes.H> #include <mss_explorer_attribute_setters.H> #include <generic/memory/lib/utils/mss_buffer_utils.H> diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/mc/exp_port.H b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/mc/exp_port.H index 441e4dfac..dc46fc7bc 100644 --- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/mc/exp_port.H +++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/mc/exp_port.H @@ -103,7 +103,7 @@ class portTraits< mss::mc_type::EXPLORER > ECC_USE_ADDR_HASH = EXPLR_RDF_RECR_MBSECCQ_USE_ADDRESS_HASH, PORT_FAIL_DISABLE = EXPLR_SRQ_MBA_FARB0Q_CFG_PORT_FAIL_DISABLE, - DFI_INIT_START = EXPLR_SRQ_MBA_FARB0Q_CFG_MISR_FEEDBACK_ENABLE, + DFI_INIT_START = EXPLR_SRQ_MBA_FARB0Q_CFG_INIT_START, RCD_RECOVERY_DISABLE = EXPLR_SRQ_MBA_FARB0Q_CFG_DISABLE_RCD_RECOVERY, RECR_ENABLE_UE_NOISE_WINDOW = EXPLR_RDF_RECR_MBSECCQ_ENABLE_UE_NOISE_WINDOW, diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/omi/exp_omi_utils.C b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/omi/exp_omi_utils.C index aad9a91ab..7fcf4362a 100644 --- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/omi/exp_omi_utils.C +++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/omi/exp_omi_utils.C @@ -69,7 +69,7 @@ fapi2::ReturnCode setup_omi_dl0_config0( "Error reading EXPLR_DLX_DL0_CONFIG0 on %s", mss::c_str(i_target)); // CFG_DL0_HALF_WIDTH_BACKOFF_ENABLE: dl0 x4 backoff enabled - l_config0.writeBit<EXPLR_DLX_DL0_CONFIG0_CFG_X4_BACKOFF_ENABLE>(i_dl_x4_backoff_en); + l_config0.writeBit<EXPLR_DLX_DL0_CONFIG0_CFG_HALF_WIDTH_BACKOFF_ENABLE>(i_dl_x4_backoff_en); // CFG_DL0_TRAIN_MODE: dl0 train mode l_config0.insertFromRight<EXPLR_DLX_DL0_CONFIG0_CFG_TRAIN_MODE, |
