diff options
Diffstat (limited to 'src/import/chips/ocmb/common/procedures/hwp/pmic/lib/utils/pmic_consts.H')
| -rw-r--r-- | src/import/chips/ocmb/common/procedures/hwp/pmic/lib/utils/pmic_consts.H | 224 |
1 files changed, 104 insertions, 120 deletions
diff --git a/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/utils/pmic_consts.H b/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/utils/pmic_consts.H index addf8ca6b..e19dea87c 100644 --- a/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/utils/pmic_consts.H +++ b/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/utils/pmic_consts.H @@ -103,66 +103,58 @@ enum attr_eff_engine_fields PMIC0_SWA_VOLTAGE_SETTING = 1, PMIC0_SWA_VOLTAGE_RANGE_SELECT = 2, PMIC0_SWA_VOLTAGE_OFFSET = 3, - PMIC0_SWA_VOLTAGE_OFFSET_DIRECTION = 4, - PMIC0_SWA_SEQUENCE_DELAY = 5, - PMIC0_SWA_SEQUENCE_ORDER = 6, - - PMIC0_SWB_VOLTAGE_SETTING = 7, - PMIC0_SWB_VOLTAGE_RANGE_SELECT = 8, - PMIC0_SWB_VOLTAGE_OFFSET = 9, - PMIC0_SWB_VOLTAGE_OFFSET_DIRECTION = 10, - PMIC0_SWB_SEQUENCE_DELAY = 11, - PMIC0_SWB_SEQUENCE_ORDER = 12, - - PMIC0_SWC_VOLTAGE_SETTING = 13, - PMIC0_SWC_VOLTAGE_RANGE_SELECT = 14, - PMIC0_SWC_VOLTAGE_OFFSET = 15, - PMIC0_SWC_VOLTAGE_OFFSET_DIRECTION = 16, - PMIC0_SWC_SEQUENCE_DELAY = 17, - PMIC0_SWC_SEQUENCE_ORDER = 18, - - PMIC0_SWD_VOLTAGE_SETTING = 19, - PMIC0_SWD_VOLTAGE_RANGE_SELECT = 20, - PMIC0_SWD_VOLTAGE_OFFSET = 21, - PMIC0_SWD_VOLTAGE_OFFSET_DIRECTION = 22, - PMIC0_SWD_SEQUENCE_DELAY = 23, - PMIC0_SWD_SEQUENCE_ORDER = 24, - - PMIC1_SWA_VOLTAGE_SETTING = 25, - PMIC1_SWA_VOLTAGE_RANGE_SELECT = 26, - PMIC1_SWA_VOLTAGE_OFFSET = 27, - PMIC1_SWA_VOLTAGE_OFFSET_DIRECTION = 28, - PMIC1_SWA_SEQUENCE_DELAY = 29, - PMIC1_SWA_SEQUENCE_ORDER = 30, - - PMIC1_SWB_VOLTAGE_SETTING = 31, - PMIC1_SWB_VOLTAGE_RANGE_SELECT = 32, - PMIC1_SWB_VOLTAGE_OFFSET = 33, - PMIC1_SWB_VOLTAGE_OFFSET_DIRECTION = 34, - PMIC1_SWB_SEQUENCE_DELAY = 35, - PMIC1_SWB_SEQUENCE_ORDER = 36, - - PMIC1_SWC_VOLTAGE_SETTING = 37, - PMIC1_SWC_VOLTAGE_RANGE_SELECT = 38, - PMIC1_SWC_VOLTAGE_OFFSET = 39, - PMIC1_SWC_VOLTAGE_OFFSET_DIRECTION = 40, - PMIC1_SWC_SEQUENCE_DELAY = 41, - PMIC1_SWC_SEQUENCE_ORDER = 42, - - PMIC1_SWD_VOLTAGE_SETTING = 43, - PMIC1_SWD_VOLTAGE_RANGE_SELECT = 44, - PMIC1_SWD_VOLTAGE_OFFSET = 45, - PMIC1_SWD_VOLTAGE_OFFSET_DIRECTION = 46, - PMIC1_SWD_SEQUENCE_DELAY = 47, - PMIC1_SWD_SEQUENCE_ORDER = 48, - - PMIC0_PHASE_COMB = 49, - PMIC1_PHASE_COMB = 50, - - PMIC0_MFG_ID = 51, - PMIC1_MFG_ID = 52, - - DRAM_MODULE_HEIGHT = 53, + PMIC0_SWA_SEQUENCE_DELAY = 4, + PMIC0_SWA_SEQUENCE_ORDER = 5, + + PMIC0_SWB_VOLTAGE_SETTING = 6, + PMIC0_SWB_VOLTAGE_RANGE_SELECT = 7, + PMIC0_SWB_VOLTAGE_OFFSET = 8, + PMIC0_SWB_SEQUENCE_DELAY = 9, + PMIC0_SWB_SEQUENCE_ORDER = 10, + + PMIC0_SWC_VOLTAGE_SETTING = 11, + PMIC0_SWC_VOLTAGE_RANGE_SELECT = 12, + PMIC0_SWC_VOLTAGE_OFFSET = 13, + PMIC0_SWC_SEQUENCE_DELAY = 14, + PMIC0_SWC_SEQUENCE_ORDER = 15, + + PMIC0_SWD_VOLTAGE_SETTING = 16, + PMIC0_SWD_VOLTAGE_RANGE_SELECT = 17, + PMIC0_SWD_VOLTAGE_OFFSET = 18, + PMIC0_SWD_SEQUENCE_DELAY = 19, + PMIC0_SWD_SEQUENCE_ORDER = 20, + + PMIC1_SWA_VOLTAGE_SETTING = 21, + PMIC1_SWA_VOLTAGE_RANGE_SELECT = 22, + PMIC1_SWA_VOLTAGE_OFFSET = 23, + PMIC1_SWA_SEQUENCE_DELAY = 24, + PMIC1_SWA_SEQUENCE_ORDER = 25, + + PMIC1_SWB_VOLTAGE_SETTING = 26, + PMIC1_SWB_VOLTAGE_RANGE_SELECT = 27, + PMIC1_SWB_VOLTAGE_OFFSET = 28, + PMIC1_SWB_SEQUENCE_DELAY = 29, + PMIC1_SWB_SEQUENCE_ORDER = 30, + + PMIC1_SWC_VOLTAGE_SETTING = 31, + PMIC1_SWC_VOLTAGE_RANGE_SELECT = 32, + PMIC1_SWC_VOLTAGE_OFFSET = 33, + PMIC1_SWC_SEQUENCE_DELAY = 34, + PMIC1_SWC_SEQUENCE_ORDER = 35, + + PMIC1_SWD_VOLTAGE_SETTING = 36, + PMIC1_SWD_VOLTAGE_RANGE_SELECT = 37, + PMIC1_SWD_VOLTAGE_OFFSET = 38, + PMIC1_SWD_SEQUENCE_DELAY = 39, + PMIC1_SWD_SEQUENCE_ORDER = 40, + + PMIC0_PHASE_COMB = 41, + PMIC1_PHASE_COMB = 42, + + PMIC0_MFG_ID = 43, + PMIC1_MFG_ID = 44, + + DRAM_MODULE_HEIGHT = 45, // Dispatcher set to last enum value ATTR_EFF_DISPATCHER = DRAM_MODULE_HEIGHT, @@ -176,66 +168,58 @@ enum ffdc_codes SET_PMIC0_SWA_VOLTAGE_SETTING = 0x1052, SET_PMIC0_SWA_VOLTAGE_RANGE_SELECT = 0x1053, SET_PMIC0_SWA_VOLTAGE_OFFSET = 0x1054, - SET_PMIC0_SWA_VOLTAGE_OFFSET_DIRECTION = 0x1055, - SET_PMIC0_SWA_SEQUENCE_DELAY = 0x1056, - SET_PMIC0_SWA_SEQUENCE_ORDER = 0X1057, - - SET_PMIC0_SWB_VOLTAGE_SETTING = 0x1058, - SET_PMIC0_SWB_VOLTAGE_RANGE_SELECT = 0x1059, - SET_PMIC0_SWB_VOLTAGE_OFFSET = 0x105A, - SET_PMIC0_SWB_VOLTAGE_OFFSET_DIRECTION = 0x105B, - SET_PMIC0_SWB_SEQUENCE_DELAY = 0x105C, - SET_PMIC0_SWB_SEQUENCE_ORDER = 0X105D, - - SET_PMIC0_SWC_VOLTAGE_SETTING = 0x105E, - SET_PMIC0_SWC_VOLTAGE_RANGE_SELECT = 0x105F, - SET_PMIC0_SWC_VOLTAGE_OFFSET = 0x1060, - SET_PMIC0_SWC_VOLTAGE_OFFSET_DIRECTION = 0x1061, - SET_PMIC0_SWC_SEQUENCE_DELAY = 0x1062, - SET_PMIC0_SWC_SEQUENCE_ORDER = 0X1063, - - SET_PMIC0_SWD_VOLTAGE_SETTING = 0x1064, - SET_PMIC0_SWD_VOLTAGE_RANGE_SELECT = 0x1065, - SET_PMIC0_SWD_VOLTAGE_OFFSET = 0x1066, - SET_PMIC0_SWD_VOLTAGE_OFFSET_DIRECTION = 0x1067, - SET_PMIC0_SWD_SEQUENCE_DELAY = 0x1068, - SET_PMIC0_SWD_SEQUENCE_ORDER = 0X1069, - - SET_PMIC1_SWA_VOLTAGE_SETTING = 0x106A, - SET_PMIC1_SWA_VOLTAGE_RANGE_SELECT = 0x106B, - SET_PMIC1_SWA_VOLTAGE_OFFSET = 0x106C, - SET_PMIC1_SWA_VOLTAGE_OFFSET_DIRECTION = 0x106D, - SET_PMIC1_SWA_SEQUENCE_DELAY = 0x106E, - SET_PMIC1_SWA_SEQUENCE_ORDER = 0X106F, - - SET_PMIC1_SWB_VOLTAGE_SETTING = 0x1070, - SET_PMIC1_SWB_VOLTAGE_RANGE_SELECT = 0x1071, - SET_PMIC1_SWB_VOLTAGE_OFFSET = 0x1072, - SET_PMIC1_SWB_VOLTAGE_OFFSET_DIRECTION = 0x1073, - SET_PMIC1_SWB_SEQUENCE_DELAY = 0x1074, - SET_PMIC1_SWB_SEQUENCE_ORDER = 0X1075, - - SET_PMIC1_SWC_VOLTAGE_SETTING = 0x1076, - SET_PMIC1_SWC_VOLTAGE_RANGE_SELECT = 0x1077, - SET_PMIC1_SWC_VOLTAGE_OFFSET = 0x1078, - SET_PMIC1_SWC_VOLTAGE_OFFSET_DIRECTION = 0x1079, - SET_PMIC1_SWC_SEQUENCE_DELAY = 0x107A, - SET_PMIC1_SWC_SEQUENCE_ORDER = 0X107B, - - SET_PMIC1_SWD_VOLTAGE_SETTING = 0x107C, - SET_PMIC1_SWD_VOLTAGE_RANGE_SELECT = 0x107D, - SET_PMIC1_SWD_VOLTAGE_OFFSET = 0x107E, - SET_PMIC1_SWD_VOLTAGE_OFFSET_DIRECTION = 0x107F, - SET_PMIC1_SWD_SEQUENCE_DELAY = 0x1080, - SET_PMIC1_SWD_SEQUENCE_ORDER = 0X1081, - - SET_PMIC0_PHASE_COMB = 0x1082, - SET_PMIC1_PHASE_COMB = 0x1083, - - SET_PMIC0_MFG_ID = 0x1084, - SET_PMIC1_MFG_ID = 0x1085, - - SET_DRAM_MODULE_HEIGHT = 0x1086, + SET_PMIC0_SWA_SEQUENCE_DELAY = 0x1055, + SET_PMIC0_SWA_SEQUENCE_ORDER = 0X1056, + + SET_PMIC0_SWB_VOLTAGE_SETTING = 0x1057, + SET_PMIC0_SWB_VOLTAGE_RANGE_SELECT = 0x1058, + SET_PMIC0_SWB_VOLTAGE_OFFSET = 0x1059, + SET_PMIC0_SWB_SEQUENCE_DELAY = 0x105A, + SET_PMIC0_SWB_SEQUENCE_ORDER = 0X105B, + + SET_PMIC0_SWC_VOLTAGE_SETTING = 0x105C, + SET_PMIC0_SWC_VOLTAGE_RANGE_SELECT = 0x105D, + SET_PMIC0_SWC_VOLTAGE_OFFSET = 0x105E, + SET_PMIC0_SWC_SEQUENCE_DELAY = 0x105F, + SET_PMIC0_SWC_SEQUENCE_ORDER = 0X1060, + + SET_PMIC0_SWD_VOLTAGE_SETTING = 0x1061, + SET_PMIC0_SWD_VOLTAGE_RANGE_SELECT = 0x1062, + SET_PMIC0_SWD_VOLTAGE_OFFSET = 0x1063, + SET_PMIC0_SWD_SEQUENCE_DELAY = 0x1064, + SET_PMIC0_SWD_SEQUENCE_ORDER = 0X1065, + + SET_PMIC1_SWA_VOLTAGE_SETTING = 0x1066, + SET_PMIC1_SWA_VOLTAGE_RANGE_SELECT = 0x1067, + SET_PMIC1_SWA_VOLTAGE_OFFSET = 0x1068, + SET_PMIC1_SWA_SEQUENCE_DELAY = 0x1069, + SET_PMIC1_SWA_SEQUENCE_ORDER = 0X106A, + + SET_PMIC1_SWB_VOLTAGE_SETTING = 0x106B, + SET_PMIC1_SWB_VOLTAGE_RANGE_SELECT = 0x106C, + SET_PMIC1_SWB_VOLTAGE_OFFSET = 0x106D, + SET_PMIC1_SWB_SEQUENCE_DELAY = 0x106E, + SET_PMIC1_SWB_SEQUENCE_ORDER = 0X106F, + + SET_PMIC1_SWC_VOLTAGE_SETTING = 0x1070, + SET_PMIC1_SWC_VOLTAGE_RANGE_SELECT = 0x1071, + SET_PMIC1_SWC_VOLTAGE_OFFSET = 0x1072, + SET_PMIC1_SWC_SEQUENCE_DELAY = 0x1073, + SET_PMIC1_SWC_SEQUENCE_ORDER = 0X1074, + + SET_PMIC1_SWD_VOLTAGE_SETTING = 0x1075, + SET_PMIC1_SWD_VOLTAGE_RANGE_SELECT = 0x1076, + SET_PMIC1_SWD_VOLTAGE_OFFSET = 0x1077, + SET_PMIC1_SWD_SEQUENCE_DELAY = 0x1078, + SET_PMIC1_SWD_SEQUENCE_ORDER = 0X1079, + + SET_PMIC0_PHASE_COMB = 0x107A, + SET_PMIC1_PHASE_COMB = 0x107B, + + SET_PMIC0_MFG_ID = 0x107C, + SET_PMIC1_MFG_ID = 0x107D, + + SET_DRAM_MODULE_HEIGHT = 0x107E, }; /// |
