diff options
Diffstat (limited to 'src/import/chips/centaur/procedures/vpd_accessors')
8 files changed, 154 insertions, 152 deletions
diff --git a/src/import/chips/centaur/procedures/vpd_accessors/getDQAttrISDIMM.mk b/src/import/chips/centaur/procedures/vpd_accessors/getDQAttrISDIMM.mk index 349910532..6e333641f 100755 --- a/src/import/chips/centaur/procedures/vpd_accessors/getDQAttrISDIMM.mk +++ b/src/import/chips/centaur/procedures/vpd_accessors/getDQAttrISDIMM.mk @@ -26,7 +26,8 @@ # Include the macros and things for MSS procedures -include 01common.mk PROCEDURE=getDQAttrISDIMM -OBJS+=getISDIMMTOC4DAttrs.o getDecompressedISDIMMAttrs.o +lib$(PROCEDURE)_DEPLIBS+=getISDIMMTOC4DAttrs +lib$(PROCEDURE)_DEPLIBS+=getDecompressedISDIMMAttrs $(PROCEDURE)_DEPLIBS+=mss_generic $(eval $(call ADD_MEMORY_INCDIRS,$(PROCEDURE))) $(call BUILD_PROCEDURE) diff --git a/src/import/chips/centaur/procedures/vpd_accessors/getDQSAttrISDIMM.mk b/src/import/chips/centaur/procedures/vpd_accessors/getDQSAttrISDIMM.mk index c2eec1e7a..6a1600dd8 100755 --- a/src/import/chips/centaur/procedures/vpd_accessors/getDQSAttrISDIMM.mk +++ b/src/import/chips/centaur/procedures/vpd_accessors/getDQSAttrISDIMM.mk @@ -26,7 +26,8 @@ # Include the macros and things for MSS procedures -include 01common.mk PROCEDURE=getDQSAttrISDIMM -OBJS+=getISDIMMTOC4DAttrs.o getDecompressedISDIMMAttrs.o +lib$(PROCEDURE)_DEPLIBS+=getISDIMMTOC4DAttrs +lib$(PROCEDURE)_DEPLIBS+=getDecompressedISDIMMAttrs $(PROCEDURE)_DEPLIBS+=mss_generic $(eval $(call ADD_MEMORY_INCDIRS,$(PROCEDURE))) $(call BUILD_PROCEDURE) diff --git a/src/import/chips/centaur/procedures/vpd_accessors/getMBvpdAttr.C b/src/import/chips/centaur/procedures/vpd_accessors/getMBvpdAttr.C index e7264a39c..015317073 100644 --- a/src/import/chips/centaur/procedures/vpd_accessors/getMBvpdAttr.C +++ b/src/import/chips/centaur/procedures/vpd_accessors/getMBvpdAttr.C @@ -223,7 +223,7 @@ extern "C" { fapi2::Target<fapi2::TARGET_TYPE_MEMBUF_CHIP> l_mbTarget; uint8_t l_pos = NUM_PORTS; //initialize to out of range value (+1) - DimmType l_dimmType = ALL_DIMM; + DimmType l_dimmType = DimmType::ALL_DIMM; const MBvpdAttrDef* l_pAttrDef = NULL; VpdVersion l_version = INVALID_VER; // invalid vpd value @@ -351,18 +351,18 @@ extern "C" if (l_customDimm == fapi2::ENUM_ATTR_CEN_SPD_CUSTOM_YES) { - o_dimmType = CDIMM; + o_dimmType = DimmType::CDIMM; FAPI_DBG("findDimmInfo: CDIMM TYPE!!!"); } else { - o_dimmType = ISDIMM; + o_dimmType = DimmType::ISDIMM; FAPI_DBG("findDimmInfo: ISDIMM TYPE!!!"); } } else { - o_dimmType = ISDIMM; + o_dimmType = DimmType::ISDIMM; FAPI_DBG("findDimmInfo: ISDIMM TYPE (dimm array size = 0)"); } @@ -413,7 +413,7 @@ extern "C" // Couldn't get the Version from attribute // So proceed to find the version and update the attrib - if (CDIMM == i_dimmType) + if (DimmType::CDIMM == i_dimmType) { l_record = fapi2::MBVPD_RECORD_VSPD; } @@ -570,7 +570,7 @@ extern "C" for (; i < g_MBVPD_ATTR_DEF_array_size; i++) { if ( (g_MBVPD_ATTR_DEF_array[i].iv_attrId == i_attr) && - ((ALL_DIMM == g_MBVPD_ATTR_DEF_array[i].iv_dimmType) || + ((DimmType::ALL_DIMM == g_MBVPD_ATTR_DEF_array[i].iv_dimmType) || (i_dimmType == g_MBVPD_ATTR_DEF_array[i].iv_dimmType)) ) { @@ -642,7 +642,7 @@ extern "C" FAPI_DBG("readKeyword: Read keyword %d ", l_keyword); - if (CDIMM != i_dimmType) + if (DimmType::CDIMM != i_dimmType) { if (MBVPD_KEYWORD_MT == l_keyword) { diff --git a/src/import/chips/centaur/procedures/vpd_accessors/getMBvpdAttr.H b/src/import/chips/centaur/procedures/vpd_accessors/getMBvpdAttr.H index 6784f474b..e9e6dcd23 100644 --- a/src/import/chips/centaur/procedures/vpd_accessors/getMBvpdAttr.H +++ b/src/import/chips/centaur/procedures/vpd_accessors/getMBvpdAttr.H @@ -145,7 +145,7 @@ const uint8_t NUM_DIMMS = 2; //Each port has 2 DIMMs const uint8_t NUM_RANKS = 4; //Number of ranks // DIMM types -enum DimmType +enum class DimmType { ALL_DIMM = 0, // Same for all Dimm types CDIMM = 1, diff --git a/src/import/chips/centaur/procedures/vpd_accessors/getMBvpdAttrData.C b/src/import/chips/centaur/procedures/vpd_accessors/getMBvpdAttrData.C index daecf4da5..69e3f6310 100644 --- a/src/import/chips/centaur/procedures/vpd_accessors/getMBvpdAttrData.C +++ b/src/import/chips/centaur/procedures/vpd_accessors/getMBvpdAttrData.C @@ -55,46 +55,46 @@ const MBvpdAttrDef g_MBVPD_ATTR_DEF_array [] = // Note: Ideally, all new exception will be in this section and be for both // ISDIMMs and CDIMMMs //---------------------------------------------------------------------------------- - {fapi2::ATTR_CEN_VPD_MR_VERSION_BYTE, ALL_DIMM, VM_01, MBVPD_KEYWORD_MR, 0, UINT8, 0}, - {fapi2::ATTR_CEN_VPD_MR_DATA_CONTROL_BYTE, ALL_DIMM, VM_01, MBVPD_KEYWORD_MR, 1, UINT8, 0}, - {fapi2::ATTR_CEN_VPD_MT_VERSION_BYTE, ALL_DIMM, VM_01, MBVPD_KEYWORD_MT, 0, UINT8, 0}, - {fapi2::ATTR_CEN_VPD_MT_DATA_CONTROL_BYTE, ALL_DIMM, VM_01, MBVPD_KEYWORD_MT, 1, UINT8, 0}, - {fapi2::ATTR_CEN_VPD_PERIODIC_MEMCAL_MODE_OPTIONS, ALL_DIMM, VM_01, MBVPD_KEYWORD_MR, 50, UINT32_BY2 | UINT16_DATA, 0}, - {fapi2::ATTR_CEN_VPD_DRAM_RTT_PARK, ALL_DIMM, VM_01, MBVPD_KEYWORD_MT, 56, UINT8_BY2_BY2_BY4 | XLATE_RTT_PARK, 0}, - {fapi2::ATTR_CEN_VPD_RD_CTR_WINDAGE_OFFSET, ALL_DIMM, VM_01, MBVPD_KEYWORD_MT, 64, UINT32_BY2 | UINT16_DATA, 0}, - - {fapi2::ATTR_CEN_VPD_DIMM_RCD_OUTPUT_TIMING, ISDIMM, VM_01, MBVPD_KEYWORD_MT, 68, UINT8_BY2_BY2 | BOTH_DIMMS, 0}, - {fapi2::ATTR_CEN_VPD_DIMM_RCD_IBT, ISDIMM, VM_01, MBVPD_KEYWORD_MT, 66, UINT32_BY2_BY2 | UINT8_DATA, 0}, - {fapi2::ATTR_CEN_VPD_DIMM_RCD_OUTPUT_TIMING, CDIMM, VM_01, MBVPD_KEYWORD_MT, 68, UINT8_BY2_BY2 | DEFAULT_VALUE, 0}, - {fapi2::ATTR_CEN_VPD_DIMM_RCD_IBT, CDIMM, VM_01, MBVPD_KEYWORD_MT, 66, UINT32_BY2_BY2 | DEFAULT_VALUE, 0}, - {fapi2::ATTR_CEN_VPD_RD_VREF, ALL_DIMM, VM_01, MBVPD_KEYWORD_MT, 34, UINT32_BY2 | UINT8_DATA | XLATE_RD_VREF, 0}, - {fapi2::ATTR_CEN_VPD_DRAM_WR_VREF, ALL_DIMM, VM_01, MBVPD_KEYWORD_MT, 35, UINT32_BY2 | UINT8_DATA | XLATE_WR_VREF, 0}, - {fapi2::ATTR_CEN_VPD_DRAM_WRDDR4_VREF, ALL_DIMM, VM_01, MBVPD_KEYWORD_MT, 36, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_RCV_IMP_DQ_DQS, ALL_DIMM, VM_01, MBVPD_KEYWORD_MT, 37, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_DRV_IMP_DQ_DQS, ALL_DIMM, VM_01, MBVPD_KEYWORD_MT, 38, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_DRV_IMP_CNTL, ALL_DIMM, VM_01, MBVPD_KEYWORD_MT, 39, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_DRV_IMP_ADDR, ALL_DIMM, VM_01, MBVPD_KEYWORD_MT, 40, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_DRV_IMP_CLK, ALL_DIMM, VM_01, MBVPD_KEYWORD_MT, 41, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_DRV_IMP_SPCKE, ALL_DIMM, VM_01, MBVPD_KEYWORD_MT, 42, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_SLEW_RATE_DQ_DQS, ALL_DIMM, VM_01, MBVPD_KEYWORD_MT, 43, UINT8_BY2 | XLATE_SLEW, 0}, - {fapi2::ATTR_CEN_VPD_SLEW_RATE_CNTL, ALL_DIMM, VM_01, MBVPD_KEYWORD_MT, 44, UINT8_BY2 | XLATE_SLEW, 0}, - {fapi2::ATTR_CEN_VPD_SLEW_RATE_ADDR, ALL_DIMM, VM_01, MBVPD_KEYWORD_MT, 45, UINT8_BY2 | XLATE_SLEW, 0}, - {fapi2::ATTR_CEN_VPD_SLEW_RATE_CLK, ALL_DIMM, VM_01, MBVPD_KEYWORD_MT, 46, UINT8_BY2 | XLATE_SLEW, 0}, - {fapi2::ATTR_CEN_VPD_SLEW_RATE_SPCKE, ALL_DIMM, VM_01, MBVPD_KEYWORD_MT, 47, UINT8_BY2 | XLATE_SLEW, 0}, - {fapi2::ATTR_CEN_VPD_CKE_PRI_MAP, ALL_DIMM, VM_01, MBVPD_KEYWORD_MT, 48, UINT32_BY2 | UINT16_DATA, 0}, - {fapi2::ATTR_CEN_VPD_CKE_PWR_MAP, ALL_DIMM, VM_01, MBVPD_KEYWORD_MT, 50, UINT64 | MERGE, 0}, - {fapi2::ATTR_CEN_VPD_RLO, ALL_DIMM, VM_01, MBVPD_KEYWORD_MT, 54, UINT8_BY2 | LOW_NIBBLE, 0}, - {fapi2::ATTR_CEN_VPD_WLO, ALL_DIMM, VM_01, MBVPD_KEYWORD_MT, 54, UINT8_BY2 | HIGH_NIBBLE, 0}, - {fapi2::ATTR_CEN_VPD_GPO, ALL_DIMM, VM_01, MBVPD_KEYWORD_MT, 55, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_MR_VERSION_BYTE, DimmType::ALL_DIMM, VM_01, MBVPD_KEYWORD_MR, 0, UINT8, 0}, + {fapi2::ATTR_CEN_VPD_MR_DATA_CONTROL_BYTE, DimmType::ALL_DIMM, VM_01, MBVPD_KEYWORD_MR, 1, UINT8, 0}, + {fapi2::ATTR_CEN_VPD_MT_VERSION_BYTE, DimmType::ALL_DIMM, VM_01, MBVPD_KEYWORD_MT, 0, UINT8, 0}, + {fapi2::ATTR_CEN_VPD_MT_DATA_CONTROL_BYTE, DimmType::ALL_DIMM, VM_01, MBVPD_KEYWORD_MT, 1, UINT8, 0}, + {fapi2::ATTR_CEN_VPD_PERIODIC_MEMCAL_MODE_OPTIONS, DimmType::ALL_DIMM, VM_01, MBVPD_KEYWORD_MR, 50, UINT32_BY2 | UINT16_DATA, 0}, + {fapi2::ATTR_CEN_VPD_DRAM_RTT_PARK, DimmType::ALL_DIMM, VM_01, MBVPD_KEYWORD_MT, 56, UINT8_BY2_BY2_BY4 | XLATE_RTT_PARK, 0}, + {fapi2::ATTR_CEN_VPD_RD_CTR_WINDAGE_OFFSET, DimmType::ALL_DIMM, VM_01, MBVPD_KEYWORD_MT, 64, UINT32_BY2 | UINT16_DATA, 0}, + + {fapi2::ATTR_CEN_VPD_DIMM_RCD_OUTPUT_TIMING, DimmType::ISDIMM, VM_01, MBVPD_KEYWORD_MT, 68, UINT8_BY2_BY2 | BOTH_DIMMS, 0}, + {fapi2::ATTR_CEN_VPD_DIMM_RCD_IBT, DimmType::ISDIMM, VM_01, MBVPD_KEYWORD_MT, 66, UINT32_BY2_BY2 | UINT8_DATA, 0}, + {fapi2::ATTR_CEN_VPD_DIMM_RCD_OUTPUT_TIMING, DimmType::CDIMM, VM_01, MBVPD_KEYWORD_MT, 68, UINT8_BY2_BY2 | DEFAULT_VALUE, 0}, + {fapi2::ATTR_CEN_VPD_DIMM_RCD_IBT, DimmType::CDIMM, VM_01, MBVPD_KEYWORD_MT, 66, UINT32_BY2_BY2 | DEFAULT_VALUE, 0}, + {fapi2::ATTR_CEN_VPD_RD_VREF, DimmType::ALL_DIMM, VM_01, MBVPD_KEYWORD_MT, 34, UINT32_BY2 | UINT8_DATA | XLATE_RD_VREF, 0}, + {fapi2::ATTR_CEN_VPD_DRAM_WR_VREF, DimmType::ALL_DIMM, VM_01, MBVPD_KEYWORD_MT, 35, UINT32_BY2 | UINT8_DATA | XLATE_WR_VREF, 0}, + {fapi2::ATTR_CEN_VPD_DRAM_WRDDR4_VREF, DimmType::ALL_DIMM, VM_01, MBVPD_KEYWORD_MT, 36, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_RCV_IMP_DQ_DQS, DimmType::ALL_DIMM, VM_01, MBVPD_KEYWORD_MT, 37, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_DRV_IMP_DQ_DQS, DimmType::ALL_DIMM, VM_01, MBVPD_KEYWORD_MT, 38, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_DRV_IMP_CNTL, DimmType::ALL_DIMM, VM_01, MBVPD_KEYWORD_MT, 39, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_DRV_IMP_ADDR, DimmType::ALL_DIMM, VM_01, MBVPD_KEYWORD_MT, 40, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_DRV_IMP_CLK, DimmType::ALL_DIMM, VM_01, MBVPD_KEYWORD_MT, 41, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_DRV_IMP_SPCKE, DimmType::ALL_DIMM, VM_01, MBVPD_KEYWORD_MT, 42, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_SLEW_RATE_DQ_DQS, DimmType::ALL_DIMM, VM_01, MBVPD_KEYWORD_MT, 43, UINT8_BY2 | XLATE_SLEW, 0}, + {fapi2::ATTR_CEN_VPD_SLEW_RATE_CNTL, DimmType::ALL_DIMM, VM_01, MBVPD_KEYWORD_MT, 44, UINT8_BY2 | XLATE_SLEW, 0}, + {fapi2::ATTR_CEN_VPD_SLEW_RATE_ADDR, DimmType::ALL_DIMM, VM_01, MBVPD_KEYWORD_MT, 45, UINT8_BY2 | XLATE_SLEW, 0}, + {fapi2::ATTR_CEN_VPD_SLEW_RATE_CLK, DimmType::ALL_DIMM, VM_01, MBVPD_KEYWORD_MT, 46, UINT8_BY2 | XLATE_SLEW, 0}, + {fapi2::ATTR_CEN_VPD_SLEW_RATE_SPCKE, DimmType::ALL_DIMM, VM_01, MBVPD_KEYWORD_MT, 47, UINT8_BY2 | XLATE_SLEW, 0}, + {fapi2::ATTR_CEN_VPD_CKE_PRI_MAP, DimmType::ALL_DIMM, VM_01, MBVPD_KEYWORD_MT, 48, UINT32_BY2 | UINT16_DATA, 0}, + {fapi2::ATTR_CEN_VPD_CKE_PWR_MAP, DimmType::ALL_DIMM, VM_01, MBVPD_KEYWORD_MT, 50, UINT64 | MERGE, 0}, + {fapi2::ATTR_CEN_VPD_RLO, DimmType::ALL_DIMM, VM_01, MBVPD_KEYWORD_MT, 54, UINT8_BY2 | LOW_NIBBLE, 0}, + {fapi2::ATTR_CEN_VPD_WLO, DimmType::ALL_DIMM, VM_01, MBVPD_KEYWORD_MT, 54, UINT8_BY2 | HIGH_NIBBLE, 0}, + {fapi2::ATTR_CEN_VPD_GPO, DimmType::ALL_DIMM, VM_01, MBVPD_KEYWORD_MT, 55, UINT8_BY2, 0}, //---------------------------------------------------------------------------------- // Attribute exceptions to use with SPDX or VSPD VD keyword // Note: Ideally, all new exception will be in this section and be for both // ISDIMMs and CDIMMMs //---------------------------------------------------------------------------------- - {fapi2::ATTR_CEN_VPD_DIMM_RCD_IBT, ALL_DIMM, VD_01, MBVPD_KEYWORD_MT, 34, UINT32_BY2_BY2 | UINT8_DATA, 0}, - {fapi2::ATTR_CEN_VPD_DIMM_RCD_OUTPUT_TIMING, ALL_DIMM, VD_01, MBVPD_KEYWORD_MT, 36, UINT8_BY2_BY2 | BOTH_DIMMS, 0}, - {fapi2::ATTR_CEN_VPD_DRAM_WR_VREF, ALL_DIMM, VD_01, MBVPD_KEYWORD_MT, 38, UINT32_BY2 | UINT8_DATA | XLATE_WR_VREF, 0}, + {fapi2::ATTR_CEN_VPD_DIMM_RCD_IBT, DimmType::ALL_DIMM, VD_01, MBVPD_KEYWORD_MT, 34, UINT32_BY2_BY2 | UINT8_DATA, 0}, + {fapi2::ATTR_CEN_VPD_DIMM_RCD_OUTPUT_TIMING, DimmType::ALL_DIMM, VD_01, MBVPD_KEYWORD_MT, 36, UINT8_BY2_BY2 | BOTH_DIMMS, 0}, + {fapi2::ATTR_CEN_VPD_DRAM_WR_VREF, DimmType::ALL_DIMM, VD_01, MBVPD_KEYWORD_MT, 38, UINT32_BY2 | UINT8_DATA | XLATE_WR_VREF, 0}, //---------------------------------------------------------------------------------- // Attribute exceptions to use with VINI VZ keyword @@ -105,30 +105,30 @@ const MBvpdAttrDef g_MBVPD_ATTR_DEF_array [] = // Planar ISDIMM changes // Need to include these exceptions to support early Palmetto and Habanero without the VD keyword & VZ=13 - {fapi2::ATTR_CEN_VPD_DIMM_RCD_IBT, ISDIMM, VZ_13, MBVPD_KEYWORD_MT, 34, UINT32_BY2_BY2 | UINT8_DATA, 0}, - {fapi2::ATTR_CEN_VPD_DIMM_RCD_OUTPUT_TIMING, ISDIMM, VZ_13, MBVPD_KEYWORD_MT, 36, UINT8_BY2_BY2 | BOTH_DIMMS, 0}, + {fapi2::ATTR_CEN_VPD_DIMM_RCD_IBT, DimmType::ISDIMM, VZ_13, MBVPD_KEYWORD_MT, 34, UINT32_BY2_BY2 | UINT8_DATA, 0}, + {fapi2::ATTR_CEN_VPD_DIMM_RCD_OUTPUT_TIMING, DimmType::ISDIMM, VZ_13, MBVPD_KEYWORD_MT, 36, UINT8_BY2_BY2 | BOTH_DIMMS, 0}, // Create 3 reserved bytes in V13 - {fapi2::ATTR_CEN_VPD_DRAM_WR_VREF, ISDIMM, VZ_13, MBVPD_KEYWORD_MT, 38, UINT32_BY2 | UINT8_DATA | XLATE_WR_VREF, 0}, + {fapi2::ATTR_CEN_VPD_DRAM_WR_VREF, DimmType::ISDIMM, VZ_13, MBVPD_KEYWORD_MT, 38, UINT32_BY2 | UINT8_DATA | XLATE_WR_VREF, 0}, // Need to include these exceptions to support early Palmetto and Habanero with VZ=11 and 10 - {fapi2::ATTR_CEN_VPD_DIMM_RCD_IBT, ISDIMM, ALL_VZ, MBVPD_KEYWORD_MT, 34, UINT32_BY2_BY2 | DEFAULT_VALUE, 0x64}, - {fapi2::ATTR_CEN_VPD_DIMM_RCD_OUTPUT_TIMING, ISDIMM, ALL_VZ, MBVPD_KEYWORD_MT, 35, UINT8_BY2_BY2 | DEFAULT_VALUE, 1}, + {fapi2::ATTR_CEN_VPD_DIMM_RCD_IBT, DimmType::ISDIMM, ALL_VZ, MBVPD_KEYWORD_MT, 34, UINT32_BY2_BY2 | DEFAULT_VALUE, 0x64}, + {fapi2::ATTR_CEN_VPD_DIMM_RCD_OUTPUT_TIMING, DimmType::ISDIMM, ALL_VZ, MBVPD_KEYWORD_MT, 35, UINT8_BY2_BY2 | DEFAULT_VALUE, 1}, // CDIMM changes in V60 (ascii 10) // Need to include these exceptions to support pre DD 2.0 centaurs - {fapi2::ATTR_CEN_VPD_TSYS_ADR, CDIMM, VZ_10, MBVPD_KEYWORD_MR, 49, UINT8_BY2 | PORT00, 0}, - {fapi2::ATTR_CEN_VPD_TSYS_ADR, CDIMM, ALL_VZ, MBVPD_KEYWORD_MR, 51, UINT8_BY2 | PORT00, 0}, + {fapi2::ATTR_CEN_VPD_TSYS_ADR, DimmType::CDIMM, VZ_10, MBVPD_KEYWORD_MR, 49, UINT8_BY2 | PORT00, 0}, + {fapi2::ATTR_CEN_VPD_TSYS_ADR, DimmType::CDIMM, ALL_VZ, MBVPD_KEYWORD_MR, 51, UINT8_BY2 | PORT00, 0}, - {fapi2::ATTR_CEN_VPD_TSYS_DP18, CDIMM, VZ_10, MBVPD_KEYWORD_MR, 49, UINT8_BY2 | PORT11, 0}, - {fapi2::ATTR_CEN_VPD_TSYS_DP18, CDIMM, ALL_VZ, MBVPD_KEYWORD_MR, 51, UINT8_BY2 | PORT11, 0}, + {fapi2::ATTR_CEN_VPD_TSYS_DP18, DimmType::CDIMM, VZ_10, MBVPD_KEYWORD_MR, 49, UINT8_BY2 | PORT11, 0}, + {fapi2::ATTR_CEN_VPD_TSYS_DP18, DimmType::CDIMM, ALL_VZ, MBVPD_KEYWORD_MR, 51, UINT8_BY2 | PORT11, 0}, - {fapi2::ATTR_CEN_VPD_RLO, CDIMM, VZ_10, MBVPD_KEYWORD_MT, 60, UINT8_BY2 | LOW_NIBBLE, 0}, - {fapi2::ATTR_CEN_VPD_RLO, CDIMM, ALL_VZ, MBVPD_KEYWORD_MR, 49, UINT8_BY2 | LOW_NIBBLE, 0}, + {fapi2::ATTR_CEN_VPD_RLO, DimmType::CDIMM, VZ_10, MBVPD_KEYWORD_MT, 60, UINT8_BY2 | LOW_NIBBLE, 0}, + {fapi2::ATTR_CEN_VPD_RLO, DimmType::CDIMM, ALL_VZ, MBVPD_KEYWORD_MR, 49, UINT8_BY2 | LOW_NIBBLE, 0}, - {fapi2::ATTR_CEN_VPD_WLO, CDIMM, VZ_10, MBVPD_KEYWORD_MT, 60, UINT8_BY2 | HIGH_NIBBLE, 0}, - {fapi2::ATTR_CEN_VPD_WLO, CDIMM, ALL_VZ, MBVPD_KEYWORD_MR, 49, UINT8_BY2 | HIGH_NIBBLE, 0}, + {fapi2::ATTR_CEN_VPD_WLO, DimmType::CDIMM, VZ_10, MBVPD_KEYWORD_MT, 60, UINT8_BY2 | HIGH_NIBBLE, 0}, + {fapi2::ATTR_CEN_VPD_WLO, DimmType::CDIMM, ALL_VZ, MBVPD_KEYWORD_MR, 49, UINT8_BY2 | HIGH_NIBBLE, 0}, - {fapi2::ATTR_CEN_VPD_GPO, CDIMM, VZ_10, MBVPD_KEYWORD_MT, 61, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_GPO, CDIMM, ALL_VZ, MBVPD_KEYWORD_MR, 50, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_GPO, DimmType::CDIMM, VZ_10, MBVPD_KEYWORD_MT, 61, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_GPO, DimmType::CDIMM, ALL_VZ, MBVPD_KEYWORD_MR, 50, UINT8_BY2, 0}, //---------------------------------------------------------------------------------- // Base Term Data definitions to be used if no other version exceptions @@ -136,88 +136,88 @@ const MBvpdAttrDef g_MBVPD_ATTR_DEF_array [] = // Note: No changes are expected in this section //---------------------------------------------------------------------------------- // Base Term Data definitions to be used if no version exceptions - {fapi2::ATTR_CEN_VPD_DRAM_RON, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MT, 0, UINT8_BY2_BY2 | XLATE_DRAM_RON, 0}, - {fapi2::ATTR_CEN_VPD_DRAM_RTT_NOM, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MT, 2, UINT8_BY2_BY2_BY4 | XLATE_RTT_NOM, 0}, - {fapi2::ATTR_CEN_VPD_DRAM_RTT_WR, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MT, 10, UINT8_BY2_BY2_BY4 | XLATE_RTT_WR, 0}, - {fapi2::ATTR_CEN_VPD_ODT_RD, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MT, 18, UINT8_BY2_BY2_BY4, 0}, - {fapi2::ATTR_CEN_VPD_ODT_WR, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MT, 26, UINT8_BY2_BY2_BY4, 0}, - {fapi2::ATTR_CEN_VPD_DIMM_RCD_OUTPUT_TIMING, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MT, 36, UINT8_BY2_BY2 | DEFAULT_VALUE, 0}, - {fapi2::ATTR_CEN_VPD_DIMM_RCD_IBT, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MT, 34, UINT32_BY2_BY2 | DEFAULT_VALUE, 0}, - {fapi2::ATTR_CEN_VPD_RD_VREF, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MT, 37, UINT32_BY2 | UINT8_DATA | XLATE_RD_VREF, 0}, - {fapi2::ATTR_CEN_VPD_DRAM_WR_VREF, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MT, 38, UINT32_BY2 | XLATE_WR_VREF, 0}, - {fapi2::ATTR_CEN_VPD_DRAM_WRDDR4_VREF, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MT, 42, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_RCV_IMP_DQ_DQS, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MT, 43, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_DRV_IMP_DQ_DQS, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MT, 44, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_DRV_IMP_CNTL, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MT, 45, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_DRV_IMP_ADDR, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MT, 46, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_DRV_IMP_CLK, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MT, 47, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_DRV_IMP_SPCKE, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MT, 48, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_SLEW_RATE_DQ_DQS, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MT, 49, UINT8_BY2 | XLATE_SLEW, 0}, - {fapi2::ATTR_CEN_VPD_SLEW_RATE_CNTL, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MT, 50, UINT8_BY2 | XLATE_SLEW, 0}, - {fapi2::ATTR_CEN_VPD_SLEW_RATE_ADDR, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MT, 51, UINT8_BY2 | XLATE_SLEW, 0}, - {fapi2::ATTR_CEN_VPD_SLEW_RATE_CLK, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MT, 52, UINT8_BY2 | XLATE_SLEW, 0}, - {fapi2::ATTR_CEN_VPD_SLEW_RATE_SPCKE, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MT, 53, UINT8_BY2 | XLATE_SLEW, 0}, - {fapi2::ATTR_CEN_VPD_CKE_PRI_MAP, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MT, 54, UINT32_BY2 | UINT16_DATA, 0}, - {fapi2::ATTR_CEN_VPD_CKE_PWR_MAP, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MT, 56, UINT64 | MERGE, 0}, - {fapi2::ATTR_CEN_VPD_RLO, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MT, 60, UINT8_BY2 | LOW_NIBBLE, 0}, - {fapi2::ATTR_CEN_VPD_WLO, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MT, 60, UINT8_BY2 | HIGH_NIBBLE, 0}, - {fapi2::ATTR_CEN_VPD_GPO, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MT, 61, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_DRAM_RON, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MT, 0, UINT8_BY2_BY2 | XLATE_DRAM_RON, 0}, + {fapi2::ATTR_CEN_VPD_DRAM_RTT_NOM, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MT, 2, UINT8_BY2_BY2_BY4 | XLATE_RTT_NOM, 0}, + {fapi2::ATTR_CEN_VPD_DRAM_RTT_WR, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MT, 10, UINT8_BY2_BY2_BY4 | XLATE_RTT_WR, 0}, + {fapi2::ATTR_CEN_VPD_ODT_RD, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MT, 18, UINT8_BY2_BY2_BY4, 0}, + {fapi2::ATTR_CEN_VPD_ODT_WR, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MT, 26, UINT8_BY2_BY2_BY4, 0}, + {fapi2::ATTR_CEN_VPD_DIMM_RCD_OUTPUT_TIMING, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MT, 36, UINT8_BY2_BY2 | DEFAULT_VALUE, 0}, + {fapi2::ATTR_CEN_VPD_DIMM_RCD_IBT, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MT, 34, UINT32_BY2_BY2 | DEFAULT_VALUE, 0}, + {fapi2::ATTR_CEN_VPD_RD_VREF, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MT, 37, UINT32_BY2 | UINT8_DATA | XLATE_RD_VREF, 0}, + {fapi2::ATTR_CEN_VPD_DRAM_WR_VREF, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MT, 38, UINT32_BY2 | XLATE_WR_VREF, 0}, + {fapi2::ATTR_CEN_VPD_DRAM_WRDDR4_VREF, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MT, 42, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_RCV_IMP_DQ_DQS, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MT, 43, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_DRV_IMP_DQ_DQS, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MT, 44, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_DRV_IMP_CNTL, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MT, 45, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_DRV_IMP_ADDR, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MT, 46, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_DRV_IMP_CLK, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MT, 47, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_DRV_IMP_SPCKE, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MT, 48, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_SLEW_RATE_DQ_DQS, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MT, 49, UINT8_BY2 | XLATE_SLEW, 0}, + {fapi2::ATTR_CEN_VPD_SLEW_RATE_CNTL, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MT, 50, UINT8_BY2 | XLATE_SLEW, 0}, + {fapi2::ATTR_CEN_VPD_SLEW_RATE_ADDR, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MT, 51, UINT8_BY2 | XLATE_SLEW, 0}, + {fapi2::ATTR_CEN_VPD_SLEW_RATE_CLK, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MT, 52, UINT8_BY2 | XLATE_SLEW, 0}, + {fapi2::ATTR_CEN_VPD_SLEW_RATE_SPCKE, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MT, 53, UINT8_BY2 | XLATE_SLEW, 0}, + {fapi2::ATTR_CEN_VPD_CKE_PRI_MAP, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MT, 54, UINT32_BY2 | UINT16_DATA, 0}, + {fapi2::ATTR_CEN_VPD_CKE_PWR_MAP, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MT, 56, UINT64 | MERGE, 0}, + {fapi2::ATTR_CEN_VPD_RLO, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MT, 60, UINT8_BY2 | LOW_NIBBLE, 0}, + {fapi2::ATTR_CEN_VPD_WLO, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MT, 60, UINT8_BY2 | HIGH_NIBBLE, 0}, + {fapi2::ATTR_CEN_VPD_GPO, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MT, 61, UINT8_BY2, 0}, // Base Phase Rotator definitions to be used if no version exceptions - {fapi2::ATTR_CEN_VPD_PHASE_ROT_M0_CLK_P0, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 0, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_PHASE_ROT_M0_CLK_P1, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 1, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_PHASE_ROT_M1_CLK_P0, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 2, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_PHASE_ROT_M1_CLK_P1, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 3, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_PHASE_ROT_M_CMD_A0, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 4, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_PHASE_ROT_M_CMD_A1, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 5, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_PHASE_ROT_M_CMD_A2, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 6, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_PHASE_ROT_M_CMD_A3, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 7, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_PHASE_ROT_M_CMD_A4, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 8, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_PHASE_ROT_M_CMD_A5, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 9, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_PHASE_ROT_M_CMD_A6, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 10, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_PHASE_ROT_M_CMD_A7, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 11, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_PHASE_ROT_M_CMD_A8, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 12, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_PHASE_ROT_M_CMD_A9, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 13, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_PHASE_ROT_M_CMD_A10, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 14, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_PHASE_ROT_M_CMD_A11, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 15, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_PHASE_ROT_M_CMD_A12, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 16, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_PHASE_ROT_M_CMD_A13, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 17, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_PHASE_ROT_M_CMD_A14, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 18, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_PHASE_ROT_M_CMD_A15, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 19, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_PHASE_ROT_M_CMD_BA0, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 20, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_PHASE_ROT_M_CMD_BA1, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 21, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_PHASE_ROT_M_CMD_BA2, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 22, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_PHASE_ROT_M_CMD_CASN, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 23, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_PHASE_ROT_M_CMD_RASN, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 24, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_PHASE_ROT_M_CMD_WEN, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 25, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_PHASE_ROT_M_PAR, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 26, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_PHASE_ROT_M_ACTN, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 27, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_PHASE_ROT_M0_CNTL_CKE0, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 28, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_PHASE_ROT_M0_CNTL_CKE1, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 29, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_PHASE_ROT_M0_CNTL_CKE2, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 30, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_PHASE_ROT_M0_CNTL_CKE3, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 31, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_PHASE_ROT_M0_CNTL_CSN0, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 32, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_PHASE_ROT_M0_CNTL_CSN1, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 33, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_PHASE_ROT_M0_CNTL_CSN2, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 34, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_PHASE_ROT_M0_CNTL_CSN3, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 35, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_PHASE_ROT_M0_CNTL_ODT0, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 36, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_PHASE_ROT_M0_CNTL_ODT1, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 37, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_PHASE_ROT_M1_CNTL_CKE0, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 38, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_PHASE_ROT_M1_CNTL_CKE1, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 39, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_PHASE_ROT_M1_CNTL_CKE2, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 40, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_PHASE_ROT_M1_CNTL_CKE3, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 41, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_PHASE_ROT_M1_CNTL_CSN0, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 42, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_PHASE_ROT_M1_CNTL_CSN1, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 43, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_PHASE_ROT_M1_CNTL_CSN2, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 44, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_PHASE_ROT_M1_CNTL_CSN3, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 45, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_PHASE_ROT_M1_CNTL_ODT0, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 46, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_PHASE_ROT_M1_CNTL_ODT1, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 47, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_DRAM_2N_MODE_ENABLED, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 48, UINT8_BY2, 0}, - {fapi2::ATTR_CEN_VPD_TSYS_ADR, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 49, UINT8_BY2 | PORT00, 0}, - {fapi2::ATTR_CEN_VPD_TSYS_DP18, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 49, UINT8_BY2 | PORT11, 0}, + {fapi2::ATTR_CEN_VPD_PHASE_ROT_M0_CLK_P0, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 0, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_PHASE_ROT_M0_CLK_P1, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 1, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_PHASE_ROT_M1_CLK_P0, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 2, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_PHASE_ROT_M1_CLK_P1, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 3, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_PHASE_ROT_M_CMD_A0, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 4, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_PHASE_ROT_M_CMD_A1, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 5, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_PHASE_ROT_M_CMD_A2, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 6, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_PHASE_ROT_M_CMD_A3, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 7, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_PHASE_ROT_M_CMD_A4, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 8, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_PHASE_ROT_M_CMD_A5, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 9, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_PHASE_ROT_M_CMD_A6, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 10, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_PHASE_ROT_M_CMD_A7, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 11, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_PHASE_ROT_M_CMD_A8, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 12, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_PHASE_ROT_M_CMD_A9, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 13, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_PHASE_ROT_M_CMD_A10, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 14, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_PHASE_ROT_M_CMD_A11, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 15, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_PHASE_ROT_M_CMD_A12, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 16, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_PHASE_ROT_M_CMD_A13, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 17, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_PHASE_ROT_M_CMD_A14, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 18, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_PHASE_ROT_M_CMD_A15, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 19, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_PHASE_ROT_M_CMD_BA0, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 20, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_PHASE_ROT_M_CMD_BA1, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 21, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_PHASE_ROT_M_CMD_BA2, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 22, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_PHASE_ROT_M_CMD_CASN, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 23, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_PHASE_ROT_M_CMD_RASN, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 24, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_PHASE_ROT_M_CMD_WEN, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 25, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_PHASE_ROT_M_PAR, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 26, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_PHASE_ROT_M_ACTN, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 27, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_PHASE_ROT_M0_CNTL_CKE0, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 28, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_PHASE_ROT_M0_CNTL_CKE1, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 29, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_PHASE_ROT_M0_CNTL_CKE2, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 30, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_PHASE_ROT_M0_CNTL_CKE3, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 31, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_PHASE_ROT_M0_CNTL_CSN0, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 32, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_PHASE_ROT_M0_CNTL_CSN1, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 33, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_PHASE_ROT_M0_CNTL_CSN2, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 34, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_PHASE_ROT_M0_CNTL_CSN3, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 35, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_PHASE_ROT_M0_CNTL_ODT0, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 36, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_PHASE_ROT_M0_CNTL_ODT1, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 37, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_PHASE_ROT_M1_CNTL_CKE0, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 38, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_PHASE_ROT_M1_CNTL_CKE1, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 39, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_PHASE_ROT_M1_CNTL_CKE2, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 40, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_PHASE_ROT_M1_CNTL_CKE3, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 41, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_PHASE_ROT_M1_CNTL_CSN0, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 42, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_PHASE_ROT_M1_CNTL_CSN1, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 43, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_PHASE_ROT_M1_CNTL_CSN2, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 44, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_PHASE_ROT_M1_CNTL_CSN3, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 45, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_PHASE_ROT_M1_CNTL_ODT0, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 46, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_PHASE_ROT_M1_CNTL_ODT1, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 47, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_DRAM_2N_MODE_ENABLED, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 48, UINT8_BY2, 0}, + {fapi2::ATTR_CEN_VPD_TSYS_ADR, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 49, UINT8_BY2 | PORT00, 0}, + {fapi2::ATTR_CEN_VPD_TSYS_DP18, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 49, UINT8_BY2 | PORT11, 0}, // Membuf-level data that is stored within MR - {fapi2::ATTR_CEN_VPD_POWER_CONTROL_CAPABLE, ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 253, UINT8, 0}, + {fapi2::ATTR_CEN_VPD_POWER_CONTROL_CAPABLE, DimmType::ALL_DIMM, ALL_VER, MBVPD_KEYWORD_MR, 253, UINT8, 0}, }; const uint32_t g_MBVPD_ATTR_DEF_array_size = diff --git a/src/import/chips/centaur/procedures/vpd_accessors/getMBvpdMemoryDataVersion.C b/src/import/chips/centaur/procedures/vpd_accessors/getMBvpdMemoryDataVersion.C index 5f98bbbdd..b12ddc18f 100644 --- a/src/import/chips/centaur/procedures/vpd_accessors/getMBvpdMemoryDataVersion.C +++ b/src/import/chips/centaur/procedures/vpd_accessors/getMBvpdMemoryDataVersion.C @@ -60,7 +60,7 @@ extern "C" uint32_t& o_val) { fapi2::ReturnCode l_fapi2rc; - DimmType l_dimmType = ISDIMM; + DimmType l_dimmType = DimmType::ISDIMM; fapi2::MBvpdRecord l_record = fapi2::MBVPD_RECORD_SPDX; uint32_t l_vpdMemoryDataVersion = VM_KEYWORD_DEFAULT_VALUE; size_t l_bufSize = sizeof(l_vpdMemoryDataVersion); @@ -92,22 +92,22 @@ extern "C" if (l_customDimm == fapi2::ENUM_ATTR_CEN_SPD_CUSTOM_YES) { - l_dimmType = CDIMM; + l_dimmType = DimmType::CDIMM; FAPI_DBG("getMBvpdMemoryDataVersion: CDIMM TYPE!!!"); } else { - l_dimmType = ISDIMM; + l_dimmType = DimmType::ISDIMM; FAPI_DBG("getMBvpdMemoryDataVersion: ISDIMM TYPE!!!"); } } else { - l_dimmType = ISDIMM; + l_dimmType = DimmType::ISDIMM; FAPI_DBG("getMBvpdMemoryDataVersion: ISDIMM TYPE (dimm array size = 0)"); } - if( l_dimmType == CDIMM) + if( l_dimmType == DimmType::CDIMM) { l_record = fapi2::MBVPD_RECORD_VSPD; } diff --git a/src/import/chips/centaur/procedures/vpd_accessors/getMBvpdSPDXRecordVersion.C b/src/import/chips/centaur/procedures/vpd_accessors/getMBvpdSPDXRecordVersion.C index 4d0cc8598..b2fcf281c 100644 --- a/src/import/chips/centaur/procedures/vpd_accessors/getMBvpdSPDXRecordVersion.C +++ b/src/import/chips/centaur/procedures/vpd_accessors/getMBvpdSPDXRecordVersion.C @@ -61,7 +61,7 @@ extern "C" uint32_t& o_val) { fapi2::ReturnCode l_fapi2rc; - DimmType l_dimmType = ISDIMM; + DimmType l_dimmType = DimmType::ISDIMM; fapi2::MBvpdRecord l_record = fapi2::MBVPD_RECORD_SPDX; uint16_t l_vpdSPDXRecordVersion = VD_KEYWORD_DEFAULT_VALUE; size_t l_bufSize = sizeof(l_vpdSPDXRecordVersion); @@ -86,22 +86,22 @@ extern "C" if (l_customDimm == fapi2::ENUM_ATTR_CEN_SPD_CUSTOM_YES) { - l_dimmType = CDIMM; + l_dimmType = DimmType::CDIMM; FAPI_DBG("getMBvpdSPDXRecordVersion: CDIMM TYPE!!!"); } else { - l_dimmType = ISDIMM; + l_dimmType = DimmType::ISDIMM; FAPI_DBG("getMBvpdSPDXRecordVersion: ISDIMM TYPE!!!"); } } else { - l_dimmType = ISDIMM; + l_dimmType = DimmType::ISDIMM; FAPI_DBG("getMBvpdSPDXRecordVersion: ISDIMM TYPE (dimm array size = 0)"); } - if(l_dimmType == CDIMM) + if(l_dimmType == DimmType::CDIMM) { l_record = fapi2::MBVPD_RECORD_VSPD; } diff --git a/src/import/chips/centaur/procedures/vpd_accessors/getMBvpdVoltageSettingData.C b/src/import/chips/centaur/procedures/vpd_accessors/getMBvpdVoltageSettingData.C index bec3cc29d..9413e0548 100644 --- a/src/import/chips/centaur/procedures/vpd_accessors/getMBvpdVoltageSettingData.C +++ b/src/import/chips/centaur/procedures/vpd_accessors/getMBvpdVoltageSettingData.C @@ -60,7 +60,7 @@ extern "C" fapi2::ReturnCode getMBvpdVoltageSettingData(const fapi2::Target<fapi2::TARGET_TYPE_MEMBUF_CHIP>& i_mbTarget, uint32_t& o_val) { - DimmType l_dimmType = ISDIMM; + DimmType l_dimmType = DimmType::ISDIMM; fapi2::MBvpdRecord l_record = fapi2::MBVPD_RECORD_SPDX; uint16_t l_vpdVoltageSettingData = DW_KEYWORD_DEFAULT_VALUE; size_t l_bufSize = sizeof(l_vpdVoltageSettingData); @@ -85,23 +85,23 @@ extern "C" if (l_customDimm == fapi2::ENUM_ATTR_CEN_SPD_CUSTOM_YES) { - l_dimmType = CDIMM; + l_dimmType = DimmType::CDIMM; FAPI_DBG("getMBvpdVoltageSettingData: CDIMM TYPE!!!"); } else { - l_dimmType = ISDIMM; + l_dimmType = DimmType::ISDIMM; FAPI_DBG("getMBvpdVoltageSettingData: ISDIMM TYPE!!!"); } } else { - l_dimmType = ISDIMM; + l_dimmType = DimmType::ISDIMM; FAPI_DBG("getMBvpdVoltageSettingData: ISDIMM TYPE (dimm array size = 0)"); } - if(l_dimmType == CDIMM) + if(l_dimmType == DimmType::CDIMM) { l_record = fapi2::MBVPD_RECORD_VSPD; } |
