diff options
Diffstat (limited to 'src/build/citest/etc/patches')
| -rw-r--r-- | src/build/citest/etc/patches/p8_master.por | 2 | ||||
| -rw-r--r-- | src/build/citest/etc/patches/patchlist.txt | 11 |
2 files changed, 13 insertions, 0 deletions
diff --git a/src/build/citest/etc/patches/p8_master.por b/src/build/citest/etc/patches/p8_master.por new file mode 100644 index 000000000..8fae70244 --- /dev/null +++ b/src/build/citest/etc/patches/p8_master.por @@ -0,0 +1,2 @@ +# Set Secure ROM address in TBROM_BASE_REG scom register +REG(0x02020017)=0x0003FFFF C0000000 #TBROM_BASE_REG Scom Register diff --git a/src/build/citest/etc/patches/patchlist.txt b/src/build/citest/etc/patches/patchlist.txt index c605c55de..538335cb5 100644 --- a/src/build/citest/etc/patches/patchlist.txt +++ b/src/build/citest/etc/patches/patchlist.txt @@ -19,3 +19,14 @@ Add action for L3 purge register. -CMVC: 876083 -Files: p8_ex_l3purge.act -Coreq: None + +Add POR setting for TBROM scom register +-RTC: 72729 +-CMVC: 885548, 885681, 886545, 887736 +-Files + src/build/citest/etc/workarounds.postsimsetup + src/build/citest/etc/patches/patchlist.txt + src/build/citest/etc/patches/p8_master.por + Indirectly: p8_slave.por, s1_master.por, s1_slave.por +-Coreq: None + |
