summaryrefslogtreecommitdiffstats
path: root/src/bootloader/bl_start.S
diff options
context:
space:
mode:
Diffstat (limited to 'src/bootloader/bl_start.S')
-rw-r--r--src/bootloader/bl_start.S34
1 files changed, 31 insertions, 3 deletions
diff --git a/src/bootloader/bl_start.S b/src/bootloader/bl_start.S
index 0780575d6..ebb0fd0a7 100644
--- a/src/bootloader/bl_start.S
+++ b/src/bootloader/bl_start.S
@@ -64,8 +64,11 @@
.set HBBL_vsx_unavail, 0xF40
.set HBBL_fac_unavail, 0xF60
.set HBBL_hype_fac_unavail, 0xF80
-.set HBBL_softpatch, 0x1500
-.set HBBL_debug, 0x1600
+.set HBBL_softpatch, 0x1500
+.set HBBL_debug, 0x1600
+.set P9N_URMOR_HACK, 0x7C797BA6
+.set MSR_SMF_MASK, 0x0000000000400000
+.set MSR_SMF_AND_MASK, 0x40 ;// used to isolate the SMF bit with andis
.section .text.bootloaderasm
@@ -349,6 +352,9 @@ STD_INTERRUPT(debug, HBBL_debug)
;//
;// @param[in] r3 - Hostboot HRMOR
;// @param[in] r4 - Hostboot Entry
+ ;// @param[in] r5 - Apply P9C/P9N hack. Due to a bug on p9 chips, URMOR val
+ ;// comes with operation code attached to it. We need to
+ ;// subtract that op code to get the actual URMOR value.
;//
.global enterHBB
enterHBB:
@@ -370,9 +376,31 @@ enterHBB:
blr
switchToHBB:
- ;// Update HRMOR
+ ;// Update HRMOR and URMOR
+ ;// for secure systems URMOR must == HRMOR for HBB
+ ;// Since SBE always keeps HRMOR == URMOR, HBBL uses
+ ;// HRMOR for backward compatibility, but it must
+ ;// adjust URMOR when jumping to HBB
mtspr HRMOR, r3
+ ;// Check to see if SMF bit is off... if so skip
+ ;// URMOR set as don't have permissions
+ mfmsr r6
+ andis. r6, r6, MSR_SMF_AND_MASK ;// Check if 41 (SMF) is on
+ beq skip_urmor ;// if result of AND = zero then CR[EQ] bit set
+
+ cmpwi cr0, r5, 0x1 ;// Hack requested == 0x1
+ bne cr0, skip_urmor_hack
+
+ ;// Due to bug in P9N, P9C early levels need to subtract op-code
+ lis r10, P9N_URMOR_HACK@h
+ ori r10, r10, P9N_URMOR_HACK@l
+ sub r3,r3,r10
+
+skip_urmor_hack:
+ mtspr URMOR, r3
+skip_urmor:
+
;// Clear out SLBs, ERATs, etc.
isync
slbia
OpenPOWER on IntegriCloud