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-rw-r--r--src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_prep_for_reset.C73
-rwxr-xr-xsrc/usr/hwpf/hwp/occ/p8_pmc_force_vsafe.H13
-rwxr-xr-xsrc/usr/hwpf/hwp/pstates/pstates/pstate_tables.c7
3 files changed, 71 insertions, 22 deletions
diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_prep_for_reset.C b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_prep_for_reset.C
index a28e2d873..2a119c414 100644
--- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_prep_for_reset.C
+++ b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_prep_for_reset.C
@@ -20,7 +20,7 @@
/* Origin: 30 */
/* */
/* IBM_PROLOG_END_TAG */
-// $Id: p8_pm_prep_for_reset.C,v 1.27 2014/02/19 16:10:40 stillgs Exp $
+// $Id: p8_pm_prep_for_reset.C,v 1.29 2014/04/16 05:59:49 daviddu Exp $
// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_pm_prep_for_reset.C,v $
//------------------------------------------------------------------------------
// *! (C) Copyright International Business Machines Corp. 2011
@@ -133,7 +133,7 @@ p8_pm_prep_for_reset( const fapi::Target &i_primary_chip_target,
fapi::ReturnCode rc;
fapi::ReturnCode rc_hold;
-
+ uint32_t e_rc = 0;
std::vector<fapi::Target> l_exChiplets;
ecmdDataBufferBase data(64);
ecmdDataBufferBase mask(64);
@@ -289,6 +289,58 @@ p8_pm_prep_for_reset( const fapi::Target &i_primary_chip_target,
}
// ******************************************************************
+ // Disable PMC OCC HEARTBEAT before reset OCC
+ // ******************************************************************
+ // Primary
+ rc = fapiGetScom(i_primary_chip_target, PMC_OCC_HEARTBEAT_REG_0x00062066 , data );
+ if (rc)
+ {
+ FAPI_ERR("fapiGetScom(PMC_OCC_HEARTBEAT_REG_0x00062066) failed.");
+ break;
+ }
+
+ e_rc = data.clearBit(16);
+ if (e_rc)
+ {
+ FAPI_ERR("ecmdDataBufferBase error setting up PMC_OCC_HEARTBEAT_REG_0x00062066 on master during reset");
+ rc.setEcmdError(e_rc);
+ break;
+ }
+
+ rc = fapiPutScom(i_primary_chip_target, PMC_OCC_HEARTBEAT_REG_0x00062066 , data );
+ if (rc)
+ {
+ FAPI_ERR("fapiPutScom(PMC_OCC_HEARTBEAT_REG_0x00062066) failed.");
+ break;
+ }
+
+ // Secondary
+ if ( i_secondary_chip_target.getType() != TARGET_TYPE_NONE )
+ {
+ rc = fapiGetScom(i_secondary_chip_target, PMC_OCC_HEARTBEAT_REG_0x00062066 , data );
+ if (rc)
+ {
+ FAPI_ERR("fapiGetScom(PMC_OCC_HEARTBEAT_REG_0x00062066) failed.");
+ break;
+ }
+
+ e_rc = data.clearBit(16);
+ if (e_rc)
+ {
+ FAPI_ERR("ecmdDataBufferBase error setting up PMC_OCC_HEARTBEAT_REG_0x00062066 on slave during reset");
+ rc.setEcmdError(e_rc);
+ break;
+ }
+
+ rc = fapiPutScom(i_secondary_chip_target, PMC_OCC_HEARTBEAT_REG_0x00062066 , data );
+ if (rc)
+ {
+ FAPI_ERR("fapiPutScom(PMC_OCC_HEARTBEAT_REG_0x00062066) failed.");
+ break;
+ }
+ }
+
+ // ******************************************************************
// Put OCC PPC405 into reset
// ******************************************************************
FAPI_INF("Put OCC PPC405 into reset");
@@ -339,8 +391,8 @@ p8_pm_prep_for_reset( const fapi::Target &i_primary_chip_target,
FAPI_DBG("Executing: p8_pmc_force_vsafe.C");
// Primary
-
- FAPI_EXEC_HWP(rc, p8_pmc_force_vsafe, i_primary_chip_target);
+ // Secondary passed in for FFDC reasons upon error
+ FAPI_EXEC_HWP(rc, p8_pmc_force_vsafe, i_primary_chip_target, i_secondary_chip_target);
if (rc)
{
FAPI_ERR("Failed to force Vsafe value into voltage controller. With rc = 0x%x", (uint32_t)rc);
@@ -348,9 +400,10 @@ p8_pm_prep_for_reset( const fapi::Target &i_primary_chip_target,
}
// Secondary
+ // Primary passed in for FFDC reasons upon error
if ( i_secondary_chip_target.getType() != TARGET_TYPE_NONE )
{
- FAPI_EXEC_HWP(rc, p8_pmc_force_vsafe, i_secondary_chip_target);
+ FAPI_EXEC_HWP(rc, p8_pmc_force_vsafe, i_secondary_chip_target, i_primary_chip_target);
if (rc)
{
FAPI_ERR("Failed to force Vsafe value into voltage controller. With rc = 0x%x", (uint32_t)rc);
@@ -747,13 +800,11 @@ p8_pm_prep_for_reset( const fapi::Target &i_primary_chip_target,
rc = rc_hold;
}
- FAPI_INF("p8_pm_prep_for_reset start ....");
+ FAPI_INF("p8_pm_prep_for_reset end ....");
return rc;
} // Procedure
-
-
/**
* special_wakeup_all - Sets or clears special wake-up on all configured EX on a
* target
@@ -817,9 +868,6 @@ special_wakeup_all (const fapi::Target &i_target, bool i_action)
return rc;
}
-
-
-
//------------------------------------------------------------------------------
/**
* Trace PCBS FSMs across primary and secondary chips
@@ -862,8 +910,5 @@ p4rs_pcbs_fsm_trace(const fapi::Target& i_primary_target,
return rc;
}
-
-
-
} //end extern C
diff --git a/src/usr/hwpf/hwp/occ/p8_pmc_force_vsafe.H b/src/usr/hwpf/hwp/occ/p8_pmc_force_vsafe.H
index 00d9207d6..1dc2b80f3 100755
--- a/src/usr/hwpf/hwp/occ/p8_pmc_force_vsafe.H
+++ b/src/usr/hwpf/hwp/occ/p8_pmc_force_vsafe.H
@@ -5,7 +5,7 @@
/* */
/* IBM CONFIDENTIAL */
/* */
-/* COPYRIGHT International Business Machines Corp. 2013 */
+/* COPYRIGHT International Business Machines Corp. 2013,2014 */
/* */
/* p1 */
/* */
@@ -20,7 +20,7 @@
/* Origin: 30 */
/* */
/* IBM_PROLOG_END_TAG */
-// $Id: p8_pmc_force_vsafe.H,v 1.2 2012/09/17 14:00:00 pchatnah Exp $
+// $Id: p8_pmc_force_vsafe.H,v 1.3 2014/03/05 21:10:02 stillgs Exp $
// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_pmc_force_vsafe.H,v $
//------------------------------------------------------------------------------
// *|
@@ -43,7 +43,8 @@
// function pointer typedef definition for HWP call support
-typedef fapi::ReturnCode (*p8_pmc_force_vsafe_FP_t) (const fapi::Target& );
+typedef fapi::ReturnCode (*p8_pmc_force_vsafe_FP_t) (const fapi::Target&,
+ const fapi::Target& );
extern "C" {
@@ -63,12 +64,14 @@ extern "C" {
//------------------------------------------------------------------------------
// Function prototype
//------------------------------------------------------------------------------
-/// \param[in] i_target Chip target
+/// \param[in] i_target Chip target
+/// \param[in] i_dcm_target Chip target of the other DCM chip (for FFDC)
/// \retval ECMD_SUCCESS if something good happens,
/// \retval BAD_RETURN_CODE otherwise
fapi::ReturnCode
-p8_pmc_force_vsafe(const fapi::Target& i_target );
+p8_pmc_force_vsafe( const fapi::Target& i_target,
+ const fapi::Target& i_dcm_target );
} // extern "C"
diff --git a/src/usr/hwpf/hwp/pstates/pstates/pstate_tables.c b/src/usr/hwpf/hwp/pstates/pstates/pstate_tables.c
index f1c899dd0..8be742714 100755
--- a/src/usr/hwpf/hwp/pstates/pstates/pstate_tables.c
+++ b/src/usr/hwpf/hwp/pstates/pstates/pstate_tables.c
@@ -20,7 +20,7 @@
/* Origin: 30 */
/* */
/* IBM_PROLOG_END_TAG */
-// $Id: pstate_tables.c,v 1.18 2014/04/11 19:15:17 stillgs Exp $
+// $Id: pstate_tables.c,v 1.20 2014/04/16 17:56:30 cmolsen Exp $
/// \file pstate_tables.c
/// \brief This file contains code used to generate Pstate tables from real or
@@ -578,8 +578,9 @@ gpst_create(GlobalPstateTable *gpst,
// Hardcode the vrm delay settings for GA1
// This should be set by gpst_stepping_setup() in the future.
gpst->pstate_stepsize = pstate_stepsize;
- gpst->vrm_stepdelay_range = 0xF;
- gpst->vrm_stepdelay_value = 0xFF;
+ // SW256954: Updated following two values
+ gpst->vrm_stepdelay_range = 0x8;
+ gpst->vrm_stepdelay_value = 0x9;
} while (0);
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