diff options
| -rw-r--r-- | src/build/citest/etc/patches/mdia-actions.patch | 204 | ||||
| -rw-r--r-- | src/build/citest/etc/patches/patchlist.txt | 5 | ||||
| -rwxr-xr-x | src/build/citest/etc/workarounds.postsimsetup | 6 | ||||
| -rwxr-xr-x | src/usr/diag/prdf/common/plat/pegasus/Mba.rule | 19 | ||||
| -rwxr-xr-x | src/usr/diag/prdf/common/plat/pegasus/prdfCenMba.C | 68 | ||||
| -rw-r--r-- | src/usr/diag/prdf/framework/service/prdfPlatServices.C | 6 | ||||
| -rw-r--r-- | src/usr/diag/prdf/framework/service/prdfPlatServices.H | 8 | ||||
| -rw-r--r-- | src/usr/diag/prdf/plat/pegasus/prdfCenMbaDataBundle.H | 13 |
8 files changed, 310 insertions, 19 deletions
diff --git a/src/build/citest/etc/patches/mdia-actions.patch b/src/build/citest/etc/patches/mdia-actions.patch new file mode 100644 index 000000000..b8e510850 --- /dev/null +++ b/src/build/citest/etc/patches/mdia-actions.patch @@ -0,0 +1,204 @@ +--- a/simu/data/cec-chip/centaur.chip ++++ b/simu/data/cec-chip/centaur.chip +@@ -11,6 +11,7 @@ + # uy01 859534 yadlapat 10/31/12 Correct p1 include file + # 858520 cphan 11/02/12 Add VPO_ACTIONS + # uy01 859534 yadlapat 11/02/12 Correct p1 include file ++# 871945 bradleyb 03/01/13 add prd/mdia logic regs + + + VERSION 1 # .chip file format ID +@@ -73,4 +74,17 @@ END + INTERNALREGS # List all scom registers + 0xFF00000F, 64 # Simics workaround + END ++ ++INTERNALREGS # prd / mdia testing ++ 0xFF010000, 64 # mba0 maint cmd counter ++ 0xFF010001, 64 # mba0 maint cmd error inject ++ 0xFF010002, 64 # mba0 maint cmd to inject ++ # ... ++ 0xFF018000, 64 # mba1 maint cmd counter ++ 0xFF018001, 64 # mba1 maint cmd error inject ++ 0xFF018002, 64 # mba1 maint cmd to inject ++ # ... ++ #0xFF01FFFF, 64 ++END ++ + DONE +--- a/simu/data/cec-chip/centaur.act ++++ b/simu/data/cec-chip/centaur.act +@@ -36,6 +36,7 @@ + # SW176884 bradleyb 12/15/12 re-enable command complete + # SW180168 vanlee 01/02/13 Centaur Mem PLL lock action + # SW182865 thi 01/18/13 Action file for Centaur SBE ++# SW189255 bradleyb 03/01/13 Add test logic to maint cmds + #******************************************************************** + # + +@@ -215,83 +216,115 @@ CAUSE_EFFECT { + } + + #****************************************** +-# BEGIN - Maintenance Command Complete ++# BEGIN - Maintenance Commands + #****************************************** + +-#Set command in progress + CAUSE_EFFECT { +- LABEL=[Maint Cmd Complete MBA0] +- WATCH=[REG(0x0301060B)] #MBMCC=0301060B +- CAUSE: TARGET=[REG(0x0301060B)] OP=[BIT,ON] BIT=[0] # Command Started +- EFFECT: TARGET=[REG(0x0301060B)] OP=[BIT,OFF] BIT=[0] # Clear Command Valid +- EFFECT: TARGET=[REG(0x0301060C)] OP=[BIT,ON] BIT=[0] # Set Command in progress ++ LABEL=[Abort Maint Cmd - MBA0] ++ WATCH=[REG(0x0301060B)] #mbmcc ++ CAUSE: TARGET=[REG(0x0301060B)] OP=[BIT,ON] BIT=[1] #stop_cmd ++ EFFECT: TARGET=[REG(0x0301060C)] OP=[BIT,OFF] BIT=[0] #cmd_nip ++ EFFECT: TARGET=[REG(0x0301060B)] OP=[BIT,OFF] BIT=[1] #reset stop_cmd + } + +-# Set Cmd not in progress + CAUSE_EFFECT { +- LABEL=[Maint Cmd Stopped MBA0] +- WATCH=[REG(0x0301060B)] #MBMCC=0301060B +- CAUSE: TARGET=[REG(0x0301060B)] OP=[BIT,ON] BIT=[1] # Initiate stopping cmd +- EFFECT: TARGET=[REG(0x0301060B)] OP=[BIT,OFF] BIT=[1] # Clear request to stop cmd +- EFFECT: TARGET=[REG(0x0301060C)] OP=[BIT,OFF] BIT=[0] # Set cmd not in progress ++ LABEL=[Start Maint Cmd - MBA0] ++ WATCH=[REG(0x0301060B)] #mbmcc ++ CAUSE: TARGET=[REG(0x0301060B)] OP=[BIT,ON] BIT=[0] #start_cmd ++ EFFECT: TARGET=[REG(0x0301060B)] OP=[BIT,OFF] BIT=[0] #reset start_cmd ++ #testing counter ++ EFFECT: TARGET=[LOGIC(0xFF010000)] OP=[INCREMENT,MASK] INCVAL=[1] MASK=[LITERAL(64,FFFFFFFF 00000000)] ++ EFFECT: TARGET=[REG(0x0301060C)] OP=[BIT,ON] BIT=[0] #cmd_ip + } + +-# Set maint cmd complete on reaching end address + CAUSE_EFFECT { +- LABEL=[Maint Cmd Complete on end addr MBA0] +- WATCH=[REG(0x0301060C)] #MBMSR=0301060C +- CAUSE: TARGET=[REG(0x0301060C)] OP=[BIT,ON] BIT=[0] # Command Complete +- CAUSE: TARGET=[REG(0x0301060F)] OP=[BIT,ON] BIT=[10] # Stop on end address +- EFFECT: TARGET=[REG(0x0301060C)] OP=[BIT,OFF] BIT=[0] # Clear when maint cmd complete ++ # Set logical Centaur register 0xff010001 (first word) to the nth ++ # command that should not reach mbmea. For example: ++ # p8Centaur03.membuf_chip.regwrite "LOGIC" 0xff010001 "00000002" 32 ++ LABEL=[Maint Cmd Error Inject - MBA0] ++ WATCH=[REG(0x0301060C)] #mbmsr ++ CAUSE: TARGET=[REG(0x0301060C)] OP=[BIT,ON] BIT=[0] #cmd_ip ++ #error inject ++ CAUSE: TARGET=[LOGIC(0xFF010000)] OP=[EQUALTO,BUF,ON] DATA=[LOGIC(0xFF010001)] ++ EFFECT: TARGET=[REG(0x0301060C)] OP=[BIT,OFF] BIT=[0] #cmd_nip + } + +-# trigger special attention on maint cmd complete + CAUSE_EFFECT { +- LABEL=[Maint Cmd Complete Special Attention MBA0] +- WATCH=[REG(0x0301060C)] #MBMSR=0301060C +- CAUSE: TARGET=[REG(0x0301060C)] OP=[BIT,OFF] BIT=[0] # Maint Cmd Complete +- CAUSE: TARGET=[REG(0x0301060F)] OP=[BIT,ON] BIT=[11] # Enable Special attn +- EFFECT: TARGET=[REG(0x03010611)] OP=[BIT,ON] BIT=[0] # Set Special attn bit ++ # Set logical Centaur register 0xff010002 to the nth ++ # command that should never finish ++ LABEL=[Maint Cmd Done - MBA0] ++ WATCH=[REG(0x0301060C)] #mbmsr ++ CAUSE: TARGET=[REG(0x0301060C)] OP=[BIT,ON] BIT=[0] #cmd_ip ++ #no error inject ++ CAUSE: TARGET=[LOGIC(0xFF010000)] OP=[EQUALTO,BUF,OFF] DATA=[LOGIC(0xFF010001)] ++ CAUSE: TARGET=[LOGIC(0xFF010000)] OP=[EQUALTO,BUF,OFF] DATA=[LOGIC(0xFF010002)] ++ EFFECT: TARGET=[REG(0x0301060D)] OP=[EQUALTO,BUF] DATA=[REG(0x0301060E)] #mbmaca ++ EFFECT: TARGET=[REG(0x0301060C)] OP=[BIT,OFF] BIT=[0] #cmd_nip + } + +-#Set command in progress + CAUSE_EFFECT { +- LABEL=[Maint Cmd Complete MBA1] +- WATCH=[REG(0x03010E0B)] #MBMCC=03010E0B +- CAUSE: TARGET=[REG(0x03010E0B)] OP=[BIT,ON] BIT=[0] # Command Started +- EFFECT: TARGET=[REG(0x03010E0B)] OP=[BIT,OFF] BIT=[0] # Clear Command Valid +- EFFECT: TARGET=[REG(0x03010E0C)] OP=[BIT,ON] BIT=[0] # Set Command in progress ++ LABEL=[Maint Cmd Complete Special Attention - MBA0] ++ WATCH=[REG(0x0301060C)] #mbmsr ++ CAUSE: TARGET=[REG(0x0301060C)] OP=[BIT,OFF] BIT=[0] #cmd_nip ++ CAUSE: TARGET=[REG(0x0301060F)] OP=[BIT,ON] BIT=[11] #enabled ++ EFFECT: TARGET=[REG(0x03010611)] OP=[BIT,ON] BIT=[0] #set special attn bit ++ EFFECT: TARGET=[REG(0x03010611)] OP=[BIT,ON] BIT=[8] #set wat_debug_attn + } + +-# Set Cmd not in progress + CAUSE_EFFECT { +- LABEL=[Maint Cmd Stopped MBA1] +- WATCH=[REG(0x03010E0B)] #MBMCC=03010E0B +- CAUSE: TARGET=[REG(0x03010E0B)] OP=[BIT,ON] BIT=[1] # Initiate stopping cmd +- EFFECT: TARGET=[REG(0x03010E0B)] OP=[BIT,OFF] BIT=[1] # Clear request to stop cmd +- EFFECT: TARGET=[REG(0x03010E0C)] OP=[BIT,OFF] BIT=[0] # Set cmd not in progress ++ LABEL=[Abort Maint Cmd - MBA1] ++ WATCH=[REG(0x03010E0B)] #mbmcc ++ CAUSE: TARGET=[REG(0x03010E0B)] OP=[BIT,ON] BIT=[1] #stop_cmd ++ EFFECT: TARGET=[REG(0x03010E0C)] OP=[BIT,OFF] BIT=[0] #cmd_nip ++ EFFECT: TARGET=[REG(0x03010E0B)] OP=[BIT,OFF] BIT=[1] #reset stop_cmd + } + +-# Set maint cmd complete on reaching end address + CAUSE_EFFECT { +- LABEL=[Maint Cmd Complete on end addr MBA1] +- WATCH=[REG(0x03010E0C)] #MBMSR=03010E0C +- CAUSE: TARGET=[REG(0x03010E0C)] OP=[BIT,ON] BIT=[0] # Command Complete +- CAUSE: TARGET=[REG(0x03010E0F)] OP=[BIT,ON] BIT=[10] # Stop on end address +- EFFECT: TARGET=[REG(0x03010E0C)] OP=[BIT,OFF] BIT=[0] # Clear when maint cmd complete ++ LABEL=[Start Maint Cmd - MBA1] ++ WATCH=[REG(0x03010E0B)] #mbmcc ++ CAUSE: TARGET=[REG(0x03010E0B)] OP=[BIT,ON] BIT=[0] #start_cmd ++ EFFECT: TARGET=[REG(0x03010E0B)] OP=[BIT,OFF] BIT=[0] #reset start_cmd ++ #testing counter ++ EFFECT: TARGET=[LOGIC(0xFF018000)] OP=[INCREMENT,MASK] INCVAL=[1] MASK=[LITERAL(64,FFFFFFFF 00000000)] ++ EFFECT: TARGET=[REG(0x03010E0C)] OP=[BIT,ON] BIT=[0] #cmd_ip + } + +-# trigger special attention on maint cmd complete + CAUSE_EFFECT { +- LABEL=[Maint Cmd Complete Special Attention MBA1] +- WATCH=[REG(0x03010E0C)] #MBMSR=03010E0C +- CAUSE: TARGET=[REG(0x03010E0C)] OP=[BIT,OFF] BIT=[0] # Maint Cmd Complete +- CAUSE: TARGET=[REG(0x03010E0F)] OP=[BIT,ON] BIT=[11] # Enable Special attn +- EFFECT: TARGET=[REG(0x03010E11)] OP=[BIT,ON] BIT=[0] # Set Special attn bit ++ # Set logical Centaur register 0xff018001 (first word) to the nth ++ # command that should not reach mbmea. For example: ++ # p8Centaur03.membuf_chip.regwrite "LOGIC" 0xff018001 "00000002" 32 ++ LABEL=[Maint Cmd Error Inject - MBA1] ++ WATCH=[REG(0x03010E0C)] #mbmsr ++ CAUSE: TARGET=[REG(0x03010E0C)] OP=[BIT,ON] BIT=[0] #cmd_ip ++ #error inject ++ CAUSE: TARGET=[LOGIC(0xFF018000)] OP=[EQUALTO,BUF,ON] DATA=[LOGIC(0xFF018001)] ++ EFFECT: TARGET=[REG(0x03010E0C)] OP=[BIT,OFF] BIT=[0] #cmd_nip ++} ++ ++CAUSE_EFFECT { ++ # Set logical Centaur register 0xff018002 to the nth ++ # command that should never finish ++ LABEL=[Maint Cmd Done - MBA1] ++ WATCH=[REG(0x03010E0C)] #mbmsr ++ CAUSE: TARGET=[REG(0x03010E0C)] OP=[BIT,ON] BIT=[0] #cmd_ip ++ #no error inject ++ CAUSE: TARGET=[LOGIC(0xFF018000)] OP=[EQUALTO,BUF,OFF] DATA=[LOGIC(0xFF018001)] ++ CAUSE: TARGET=[LOGIC(0xFF018000)] OP=[EQUALTO,BUF,OFF] DATA=[LOGIC(0xFF018002)] ++ EFFECT: TARGET=[REG(0x03010E0D)] OP=[EQUALTO,BUF] DATA=[REG(0x03010E0E)] #mbmaca ++ EFFECT: TARGET=[REG(0x03010E0C)] OP=[BIT,OFF] BIT=[0] #cmd_nip ++} ++ ++CAUSE_EFFECT { ++ LABEL=[Maint Cmd Complete Special Attention - MBA1] ++ WATCH=[REG(0x03010E0C)] #mbmsr ++ CAUSE: TARGET=[REG(0x03010E0C)] OP=[BIT,OFF] BIT=[0] #cmd_nip ++ CAUSE: TARGET=[REG(0x03010E0F)] OP=[BIT,ON] BIT=[11] #enabled ++ EFFECT: TARGET=[REG(0x03010E11)] OP=[BIT,ON] BIT=[0] #set special attn bit ++ EFFECT: TARGET=[REG(0x03010E11)] OP=[BIT,ON] BIT=[8] #set wat_debug_attn + } + + #*************************************** +-# END - Maintenance Command Complete ++# END - Maintenance Commands + #*************************************** + + #*************************************** diff --git a/src/build/citest/etc/patches/patchlist.txt b/src/build/citest/etc/patches/patchlist.txt index e0cbde4d1..05edc5256 100644 --- a/src/build/citest/etc/patches/patchlist.txt +++ b/src/build/citest/etc/patches/patchlist.txt @@ -5,3 +5,8 @@ Brief description of the problem or reason for patch -Files: list of files -Coreq: list of associated changes, e.g. workarounds.presimsetup +Improve maint cmd actions. +-RTC: 66137 +-CMVC: 871945 +-Files: mdia-actions.patch +-Coreq: None diff --git a/src/build/citest/etc/workarounds.postsimsetup b/src/build/citest/etc/workarounds.postsimsetup index beb1983d2..d76d9abd3 100755 --- a/src/build/citest/etc/workarounds.postsimsetup +++ b/src/build/citest/etc/workarounds.postsimsetup @@ -25,4 +25,8 @@ ## Workarounds that are run after start_simics is executed for the first time ## to setup the sandbox ## - +mkdir -p $sb/simu/data/cec-chip +echo "+++ Updating actions for mdia" +cp $BACKING_BUILD/src/simu/data/cec-chip/centaur.act $sb/simu/data/cec-chip +cp $BACKING_BUILD/src/simu/data/cec-chip/centaur.chip $sb/simu/data/cec-chip +patch -p1 -d $sb < $HOSTBOOTROOT/src/build/citest/etc/patches/mdia-actions.patch diff --git a/src/usr/diag/prdf/common/plat/pegasus/Mba.rule b/src/usr/diag/prdf/common/plat/pegasus/Mba.rule index 1ea679109..a76687bd4 100755 --- a/src/usr/diag/prdf/common/plat/pegasus/Mba.rule +++ b/src/usr/diag/prdf/common/plat/pegasus/Mba.rule @@ -227,6 +227,25 @@ chip Mba capture type secondary; capture group default; }; + + ############################################################################ + # Maintenance command addresses + ############################################################################ + + register MBMACA + { + name "MBU.MBA01.MBA_MCBIST.SCOMFIR.MBMACAQ"; + scomaddr 0x0301060D; + capture group default; + }; + + register MBMEA + { + name "MBU.MBA01.MBA_MCBIST.SCOMFIR.MBMEAQ"; + scomaddr 0x0301060E; + capture group default; + }; + }; ############################################################################## diff --git a/src/usr/diag/prdf/common/plat/pegasus/prdfCenMba.C b/src/usr/diag/prdf/common/plat/pegasus/prdfCenMba.C index 5c767d6ab..6b0561046 100755 --- a/src/usr/diag/prdf/common/plat/pegasus/prdfCenMba.C +++ b/src/usr/diag/prdf/common/plat/pegasus/prdfCenMba.C @@ -74,21 +74,29 @@ int32_t PostAnalysis( ExtensibleChip * i_mbaChip, using namespace TARGETING; - // In hostboot, we need to clear MCI Fir bits. Do we will get the mcs - // chiplet connected with Mba and call its plugin to clear those FIR bits + // In hostboot, we need to clear associated bits in the MCIFIR bits. int32_t l_rc = MemUtil::clearHostAttns( i_mbaChip, i_sc ); if ( SUCCESS != l_rc ) PRDF_ERR( "[Mba::PostAnalysis] MemUtil::clearHostAttns failed" ); // Send command complete to MDIA. // This must be done in post analysis after attentions have been cleared. - if ( PlatServices::isInMdiaMode() ) - { - TargetHandle_t mbaTarget = i_mbaChip->GetChipHandle(); - CenMbaDataBundle * mbadb = getMbaDataBundle( i_mbaChip ); + TargetHandle_t mbaTarget = i_mbaChip->GetChipHandle(); + CenMbaDataBundle * mbadb = getMbaDataBundle( i_mbaChip ); + + if ( mbadb->iv_sendCmdCompleteMsg ) + { mbadb->iv_sendCmdCompleteMsg = false; - PlatServices::mdiaSendCmdComplete( mbaTarget ); + + l_rc = PlatServices::mdiaSendEventMsg( mbaTarget, + mbadb->iv_cmdCompleteMsgData ); + + if ( l_rc ) + { + PRDF_ERR( "[Mba::PostAnalysis] PlatServices::mdiaSendEventMsg" + " failed" ); + } } #endif // __HOSTBOOT_MODULE @@ -121,9 +129,47 @@ int32_t MaintCmdComplete( ExtensibleChip * i_mbaChip, { #ifdef __HOSTBOOT_MODULE - // TODO: Will need to change design once this for error path. - CenMbaDataBundle * mbadb = getMbaDataBundle( i_mbaChip ); - mbadb->iv_sendCmdCompleteMsg = true; + if ( PlatServices::isInMdiaMode() ) + { + // Immediately inform mdia that the command + // has finished. + + l_rc = PlatServices::mdiaSendEventMsg( mbaTarget, + MDIA::RESET_TIMER ); + + if(l_rc) + { + PRDF_ERR( "[Mba::MaintCmdComplete] " + "PlatServices::mdiaSendEventMsg" + " failed" ); + + // keep going + } + + // Determine for mdia whether or not the command + // finished at the end of the last rank or if + // the command will need to be restarted. + // Tuck this away until PostAnalysis. + + CenMbaDataBundle * mbadb = getMbaDataBundle( i_mbaChip ); + + SCAN_COMM_REGISTER_CLASS * MBMACA = + i_mbaChip->getRegister("MBMACA"); + SCAN_COMM_REGISTER_CLASS * MBMEA = i_mbaChip->getRegister("MBMEA"); + + l_rc = MBMACA->Read(); + if (l_rc != SUCCESS) break; + + l_rc = MBMEA->Read(); + if (l_rc != SUCCESS) break; + + mbadb->iv_sendCmdCompleteMsg = true; + mbadb->iv_cmdCompleteMsgData = + (MBMACA->GetBitFieldJustified(0, 40) + == MBMEA->GetBitFieldJustified(0, 40)) + ? MDIA::COMMAND_COMPLETE + : MDIA::COMMAND_STOPPED; + } #endif // __HOSTBOOT_MODULE @@ -136,7 +182,7 @@ int32_t MaintCmdComplete( ExtensibleChip * i_mbaChip, CalloutUtil::defaultError( i_sc ); } - return SUCCESS; + return l_rc; } PRDF_PLUGIN_DEFINE( Mba, MaintCmdComplete ); diff --git a/src/usr/diag/prdf/framework/service/prdfPlatServices.C b/src/usr/diag/prdf/framework/service/prdfPlatServices.C index 7bc5fa78f..ecbfa109f 100644 --- a/src/usr/diag/prdf/framework/service/prdfPlatServices.C +++ b/src/usr/diag/prdf/framework/service/prdfPlatServices.C @@ -114,7 +114,8 @@ bool isInMdiaMode() //------------------------------------------------------------------------------ -int32_t mdiaSendCmdComplete( TargetHandle_t i_mbaTarget ) +int32_t mdiaSendEventMsg( TargetHandle_t i_mbaTarget, + MDIA::MaintCommandEventType i_eventType ) { int32_t o_rc = SUCCESS; @@ -132,8 +133,9 @@ int32_t mdiaSendCmdComplete( TargetHandle_t i_mbaTarget ) // Send command complete to MDIA. MDIA::MaintCommandEvent l_mdiaEvent; - l_mdiaEvent.type = MDIA::COMMAND_COMPLETE; + l_mdiaEvent.target = i_mbaTarget; + l_mdiaEvent.type = i_eventType; errlHndl_t errl = MDIA::processEvent( l_mdiaEvent ); if ( NULL != errl ) diff --git a/src/usr/diag/prdf/framework/service/prdfPlatServices.H b/src/usr/diag/prdf/framework/service/prdfPlatServices.H index 0eaaa12e8..28dc2f6e0 100644 --- a/src/usr/diag/prdf/framework/service/prdfPlatServices.H +++ b/src/usr/diag/prdf/framework/service/prdfPlatServices.H @@ -32,6 +32,8 @@ * is common between FSP and Hostboot should be in the respective common file. */ +#include <diag/mdia/mdia.H> + // This must be included after all other includes. This will take care of cases // where a file must be included in the common code, but the include paths are // different between FSP and Hostboot. @@ -64,11 +66,13 @@ namespace PlatServices bool isInMdiaMode(); /** - * @brief Sends a command complete message to MDIA. + * @brief Sends a maintenance command message to MDIA. * @param i_mbaTarget An MBA target. + * @param i_eventType MDIA event type * @return Non-SUCCESS in internal function fails, SUCCESS otherwise. */ -int32_t mdiaSendCmdComplete( TARGETING::TargetHandle_t i_mbaTarget ); +int32_t mdiaSendEventMsg( TARGETING::TargetHandle_t i_mbaTarget, + MDIA::MaintCommandEventType i_eventType ); /** * @brief Invokes the restore DRAM repairs hardware procedure. diff --git a/src/usr/diag/prdf/plat/pegasus/prdfCenMbaDataBundle.H b/src/usr/diag/prdf/plat/pegasus/prdfCenMbaDataBundle.H index eaf6c068e..ffa254849 100644 --- a/src/usr/diag/prdf/plat/pegasus/prdfCenMbaDataBundle.H +++ b/src/usr/diag/prdf/plat/pegasus/prdfCenMbaDataBundle.H @@ -30,6 +30,8 @@ #include <prdfCenMbaDataBundle_common.H> +#include <diag/mdia/mdia.H> + //------------------------------------------------------------------------------ namespace PRDF @@ -47,9 +49,9 @@ class CenMbaDataBundle : public CenMbaDataBundleCommon * @param i_mbaChip The MBA chip. */ explicit CenMbaDataBundle( ExtensibleChip * i_mbaChip ) : - CenMbaDataBundleCommon( i_mbaChip ), iv_sendCmdCompleteMsg(false) - { - } + CenMbaDataBundleCommon(i_mbaChip), iv_sendCmdCompleteMsg(false), + iv_cmdCompleteMsgData() + {} /** * @brief Destructor. @@ -69,6 +71,11 @@ class CenMbaDataBundle : public CenMbaDataBundleCommon * post analysis plugin, FALSE otherwise. */ bool iv_sendCmdCompleteMsg; + /** + * Maintenance command message to send. + */ + MDIA::MaintCommandEventType iv_cmdCompleteMsgData; + }; //------------------------------------------------------------------------------ |
