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-rw-r--r--src/import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml39
-rw-r--r--src/import/hwpf/fapi2/xml/attribute_info/hb_temp_defaults.xml8
2 files changed, 46 insertions, 1 deletions
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml
index 2c2e34bbd..5fad5802f 100644
--- a/src/import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml
@@ -324,7 +324,8 @@
<id>ATTR_PROC_FABRIC_SYSTEM_ID</id>
<targetType>TARGET_TYPE_PROC_CHIP</targetType>
<description>
- Logical fabric system ID associated with this chip.Provided by the MRW.
+ Logical fabric system ID associated with this chip.
+ Provided by the MRW.
</description>
<valueType>uint32</valueType>
<platInit/>
@@ -335,6 +336,8 @@
<targetType>TARGET_TYPE_PROC_CHIP</targetType>
<description>
Logical fabric group ID associated with this chip.
+ Directly drives programming of pervasive group ID registers (PIR).
+ Compared with ATTR_PROC_EFF_FABRIC_GROUP_ID to configure FBC XOR masking.
Provided by the MRW.
</description>
<valueType>uint8</valueType>
@@ -346,10 +349,28 @@
</attribute>
<!-- ********************************************************************** -->
<attribute>
+ <id>ATTR_PROC_EFF_FABRIC_GROUP_ID</id>
+ <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+ <description>
+ Effective fabric group ID associated with this chip.
+ Directly drives programming of chip memory map layout.
+ Compared with ATTR_PROC_FABRIC_GROUP_ID to configure FBC XOR masking.
+ </description>
+ <valueType>uint8</valueType>
+ <platInit/>
+ <!-- TODO: Story 155081
+ Not supposed to be writeable, PPE needs to resolve this issue in
+ p9_sbe_attr_setup.C -->
+ <writeable/>
+</attribute>
+<!-- ********************************************************************** -->
+<attribute>
<id>ATTR_PROC_FABRIC_CHIP_ID</id>
<targetType>TARGET_TYPE_PROC_CHIP</targetType>
<description>
Logical fabric chip ID associated with this chip.
+ Directly drives programming of pervasive chip ID registers (PIR).
+ Compared with ATTR_PROC_EFF_FABRIC_CHIP_ID to configure FBC XOR masking.
Provided by the MRW.
</description>
<valueType>uint8</valueType>
@@ -361,6 +382,22 @@
</attribute>
<!-- ********************************************************************** -->
<attribute>
+ <id>ATTR_PROC_EFF_FABRIC_CHIP_ID</id>
+ <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+ <description>
+ Effective fabric chip ID associated with this chip.
+ Directly drives programming of chip memory map layout.
+ Compared with ATTR_PROC_FABRIC_CHIP_ID to configure FBC XOR masking.
+ </description>
+ <valueType>uint8</valueType>
+ <platInit/>
+ <!-- TODO: Story 155081
+ Not supposed to be writeable, PPE needs to resolve this issue in
+ p9_sbe_attr_setup.C -->
+ <writeable/>
+</attribute>
+<!-- ********************************************************************** -->
+<attribute>
<id>ATTR_PROC_FABRIC_SYSTEM_MASTER_CHIP</id>
<targetType>TARGET_TYPE_PROC_CHIP</targetType>
<description>
diff --git a/src/import/hwpf/fapi2/xml/attribute_info/hb_temp_defaults.xml b/src/import/hwpf/fapi2/xml/attribute_info/hb_temp_defaults.xml
index 0e97ff67a..9a4c0ab13 100644
--- a/src/import/hwpf/fapi2/xml/attribute_info/hb_temp_defaults.xml
+++ b/src/import/hwpf/fapi2/xml/attribute_info/hb_temp_defaults.xml
@@ -131,6 +131,14 @@
<id>ATTR_IO_X_MFG_MIN_EYE_WIDTH</id>
<default>0x0</default>
</attribute>
+ <attribute>
+ <id>ATTR_PROC_EFF_FABRIC_GROUP_ID</id>
+ <default>0x0</default>
+ </attribute>
+ <attribute>
+ <id>ATTR_PROC_EFF_FABRIC_CHIP_ID</id>
+ <default>0x0</default>
+ </attribute>
<!-- =====================================================================
End of temporary definitions
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