diff options
| -rwxr-xr-x | src/build/citest/etc/workarounds.postsimsetup | 9 | ||||
| -rw-r--r-- | src/usr/hwas/hwasPlat.C | 149 |
2 files changed, 73 insertions, 85 deletions
diff --git a/src/build/citest/etc/workarounds.postsimsetup b/src/build/citest/etc/workarounds.postsimsetup index f4ca5ebe6..e1a9bdcc2 100755 --- a/src/build/citest/etc/workarounds.postsimsetup +++ b/src/build/citest/etc/workarounds.postsimsetup @@ -39,7 +39,14 @@ mkdir -p $sb/simu/configs/ grep -v PROC_EC $BACKING_BUILD/src/simu/configs/P9_NIMBUS.config > $sb/simu/configs/P9_NIMBUS.config echo "SETENV PROC_EC 22" >> $sb/simu/configs/P9_NIMBUS.config -# TODO 215621 remove when simics gets dimmspd.dat updated +# TODO RTC:215621 +# remove when simics gets dimmspd.dat updated mkdir -p $sb/../simics/import/vpd/ cp /gsa/ausgsa/projects/h/hostboot/.binary_cache/data/09e225d24bd942a0011ca520311d7cbf289e672e $sb/../simics/import/vpd/dimmspd.dat + +# TODO RTC:244050 +# update the por value of the EFUSE_OUT_IMAGE_3 register +if [[ -f "$sb/../simics/import/cec-chip/uchip_default.por" ]]; then + sed -i 's/UCHIP(0x0020b08c)=0x0/UCHIP(0x0020b08c)=0x00000400/' $sb/../simics/import/cec-chip/uchip_default.por +fi ########################################################################## diff --git a/src/usr/hwas/hwasPlat.C b/src/usr/hwas/hwasPlat.C index 9f60de51d..ac18f9dd8 100644 --- a/src/usr/hwas/hwasPlat.C +++ b/src/usr/hwas/hwasPlat.C @@ -43,6 +43,7 @@ #include <sys/misc.h> #include <pnor/pnorif.H> +#include <fapiwrap/fapiWrapif.H> #include <hwas/common/hwas_reasoncodes.H> #include <targeting/common/utilFilter.H> @@ -243,47 +244,6 @@ DEVICE_REGISTER_ROUTE(DeviceFW::WRITE, TARGETING::TYPE_MEMBUF, cfamIDEC); -/* @brief A helper function used to convert the contents of the IDEC register - * to the CFAM ID format. - * - * @param[in] i_idec The contents of the IDEC register - * - * @return uint64_t The converted result. - */ -uint64_t formatOcmbIdecToCfamStandard(const uint64_t i_idec, - const TARGETING::ATTR_CHIP_ID_type i_chipType ) -{ - uint64_t convertedIdec = 0; - - // Need to convert IDEC register - // i_idec is in formation: Mm0L00CC for explorer - // MmL000CC for gemini - // - // We must convert to format MLmCC000 - uint32_t idec = static_cast<uint32_t>(i_idec); - uint32_t major = 0xF0000000 & idec; - uint32_t minor = 0x0F000000 & idec; - - // Location byte is in a different location - // for Gemini cards - uint32_t location; - - if(i_chipType == POWER_CHIPID::EXPLORER_16) - { - location = 0x000F0000 & idec; - convertedIdec = (major | (location << 8) | (minor >> 4) - | ((idec & 0x000000FF) << 12)); - } - else - { - location = 0x00F00000 & idec; - convertedIdec = (major | (location << 4) | (minor >> 4) - | ((idec & 0x000000FF) << 12)); - } - - return convertedIdec; -} - /** * @brief During early IPL the OCMB isn't able to be read from so this function, * executed during discover targets, will read from the SPD and set the @@ -654,57 +614,78 @@ errlHndl_t ocmbIdecPhase1(const TARGETING::TargetHandle_t& i_target) errlHndl_t ocmbIdecPhase2(const TARGETING::TargetHandle_t& i_target) { - - const uint32_t EXP_IDEC_SCOM_REGISTER = 0x2134; const uint32_t GEM_IDEC_SCOM_REGISTER = 0x0801240e; - const TARGETING::ATTR_CHIP_ID_type chipIdFromSpd = + const TARGETING::ATTR_CHIP_ID_type l_chipIdFromSpd = i_target->getAttr<TARGETING::ATTR_CHIP_ID>(); - uint32_t idec_reg = (chipIdFromSpd == POWER_CHIPID::EXPLORER_16) ? - EXP_IDEC_SCOM_REGISTER : GEM_IDEC_SCOM_REGISTER ; - - errlHndl_t error = nullptr; - uint64_t idec = 0; - size_t op_size = sizeof(idec); + errlHndl_t l_errl = nullptr; + uint64_t l_idec = 0; + size_t l_op_size = sizeof(l_idec); + uint8_t l_ec = 0; + uint16_t l_id = 0; do { - error = DeviceFW::deviceRead(i_target, - &idec, - op_size, - DEVICE_SCOM_ADDRESS(idec_reg)); - if (error != nullptr) + if(l_chipIdFromSpd == POWER_CHIPID::EXPLORER_16) { - HWAS_ERR("ocmbIdecPhase2> OCMB 0x%.8X - failed to read ID/EC", - TARGETING::get_huid(i_target)); + // Call platform independent lookup for Explorer OCMBs + l_errl = FAPIWRAP::explorer_getidec(i_target, l_id, l_ec); - break; + if (l_errl != nullptr) + { + HWAS_ERR("ocmbIdecPhase2> explorer OCMB 0x%.8X - failed to read ID/EC", + TARGETING::get_huid(i_target)); + + break; + } } + else + { + // read the register containing IDEC info on Gemini OCMBs + l_errl = DeviceFW::deviceRead(i_target, + &l_idec, + l_op_size, + DEVICE_SCOM_ADDRESS(GEM_IDEC_SCOM_REGISTER)); + + if (l_errl != nullptr) + { + HWAS_ERR("ocmbIdecPhase2> gemini OCMB 0x%.8X - failed to read ID/EC", + TARGETING::get_huid(i_target)); - idec = formatOcmbIdecToCfamStandard(idec, chipIdFromSpd); + break; + } - uint8_t ec = POWER_CHIPID::extract_ddlevel(idec); - uint32_t id = POWER_CHIPID::extract_chipid16(idec); + // Need to convert Gemini's IDEC register from MmL000CC + // to cfam standard format MLmCC000 + uint32_t l_major = 0xF0000000 & static_cast<uint32_t>(l_idec); + uint32_t l_minor = 0x0F000000 & static_cast<uint32_t>(l_idec); + uint32_t l_location = 0x00F00000 & static_cast<uint32_t>(l_idec); + l_idec = (l_major | (l_location << 4) | (l_minor >> 4) + | ((l_idec & 0x000000FF) << 12)); + // Parse out the information we need + l_ec = POWER_CHIPID::extract_ddlevel(l_idec); + l_id = POWER_CHIPID::extract_chipid16(l_idec); + } HWAS_INF("ocmbIdecPhase2> OCMB 0x%.8X - read ID/EC successful. " "ID = 0x%.4X, EC = 0x%.2X, Full IDEC 0x%x", TARGETING::get_huid(i_target), - id, - ec, - idec); + l_id, + l_ec, + l_idec); - if (id != chipIdFromSpd) + if (l_id != l_chipIdFromSpd) { HWAS_ERR("ocmbIdecPhase2> OCMB Chip Id and associated SPD Chip Id " "don't match: OCMB ID=0x%.4X; SPD ID=0x%.4X;", - id, - chipIdFromSpd); + l_id, + l_chipIdFromSpd); HWAS_ERR("ocmbIdecPhase2> Previous CHIP_ID 0x%.4X was set based on values from " "SPD read will now be overwritten with values from OCMB IDEC register " "ID=0x%.4X", - chipIdFromSpd, - id); + l_chipIdFromSpd, + l_id); /*@ * @errortype * @severity ERRL_SEV_PREDICTIVE @@ -717,36 +698,36 @@ errlHndl_t ocmbIdecPhase2(const TARGETING::TargetHandle_t& i_target) * did not match the expected values. * @custdesc Firmware Error */ - error = hwasError(ERRORLOG::ERRL_SEV_PREDICTIVE, + l_errl = hwasError(ERRORLOG::ERRL_SEV_PREDICTIVE, MOD_OCMB_IDEC, RC_OCMB_CHIP_ID_MISMATCH, - TWO_UINT32_TO_UINT64(id, chipIdFromSpd), + TWO_UINT32_TO_UINT64(l_id, l_chipIdFromSpd), TARGETING::get_huid(i_target)); // Add callouts and commit - ocmbErrlCommit(i_target, error); + ocmbErrlCommit(i_target, l_errl); // Since there was an error then the ID values don't agree between // the OCMB read and the SPD read. Since the OCMB has the correct // answer, set the attributes to the values read from that instead // of the SPD. - i_target->setAttr<TARGETING::ATTR_CHIP_ID>(id); + i_target->setAttr<TARGETING::ATTR_CHIP_ID>(l_id); } - const uint8_t ecFromSpd = i_target->getAttr<TARGETING::ATTR_EC>(); + const uint8_t l_ecFromSpd = i_target->getAttr<TARGETING::ATTR_EC>(); - if (ec != ecFromSpd) + if (l_ec != l_ecFromSpd) { HWAS_ERR("ocmbIdecPhase2> OCMB Revision and associated SPD " "Revision don't match: OCMB EC=0x%.2X; " "SPD EC=0x%.2X; ", - ec, ecFromSpd); + l_ec, l_ecFromSpd); HWAS_ERR("ocmbIdecPhase2> Previous EC and HDAT_EC attributes 0x%.2X," " which were set with values found in SPD will be overwritten" " with value from OCMB IDEC register ID=0x%.2X", - ecFromSpd, - ec); + l_ecFromSpd, + l_ec); /*@ * @errortype @@ -761,28 +742,28 @@ errlHndl_t ocmbIdecPhase2(const TARGETING::TargetHandle_t& i_target) * SPD did not match the expected values. * @custdesc Firmware Error */ - error = hwasError(ERRORLOG::ERRL_SEV_PREDICTIVE, + l_errl = hwasError(ERRORLOG::ERRL_SEV_PREDICTIVE, MOD_OCMB_IDEC, RC_OCMB_SPD_REVISION_MISMATCH, - TWO_UINT32_TO_UINT64(ec, ecFromSpd), + TWO_UINT32_TO_UINT64(l_ec, l_ecFromSpd), TWO_UINT32_TO_UINT64( i_target->getAttr<TARGETING::ATTR_CHIP_ID>(), TARGETING::get_huid(i_target))); // Add callouts and commit - ocmbErrlCommit(i_target, error); + ocmbErrlCommit(i_target, l_errl); // Since there was an error then the EC values don't agree between // the OCMB read and the SPD read. Since the OCMB has the correct // answer, set the attributes to the values read from that instead // of the SPD. - i_target->setAttr<TARGETING::ATTR_EC>(ec); - i_target->setAttr<TARGETING::ATTR_HDAT_EC>(ec); + i_target->setAttr<TARGETING::ATTR_EC>(l_ec); + i_target->setAttr<TARGETING::ATTR_HDAT_EC>(l_ec); } } while(0); - return error; + return l_errl; } |
