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-rwxr-xr-xsrc/build/citest/etc/workarounds.postsimsetup68
-rwxr-xr-xsrc/build/citest/etc/workarounds.presimsetup6
-rw-r--r--src/usr/hwpf/hwp/dram_training/dram_training.C12
-rw-r--r--src/usr/hwpf/hwp/nest_chiplets/nest_chiplets.C22
-rw-r--r--src/usr/scan/scandd.C31
-rw-r--r--src/usr/scan/test/scantest.H102
6 files changed, 154 insertions, 87 deletions
diff --git a/src/build/citest/etc/workarounds.postsimsetup b/src/build/citest/etc/workarounds.postsimsetup
index 06aadb666..585e72744 100755
--- a/src/build/citest/etc/workarounds.postsimsetup
+++ b/src/build/citest/etc/workarounds.postsimsetup
@@ -37,15 +37,21 @@ echo "+++ Updating Centaur Action File to support slew calibration"
patch -p0 $sb/simu/data/cec-chip/centaur.act $HOSTBOOTROOT/src/build/citest/etc/patches/centaur.act.slew.patch
#### Update config file with new variables (Remove with RTC: 59984) ####
+#### Update config file with new GFW_P8_MURANO_CENTAUR_MODEL_EC separate RTC:60617) ###
+#### Update config file with new GFW_P8_VENICE_CENTAUR_MODEL_EC separate RTC:60617) ###
+
echo "+++ Forcing SBE header usage till Fips defaults to ON"
+echo "+++ Forcing GFW_P8_MURANO_CENTAUR_MODEL_EC to 790 from 730 there currently"
mkdir -p $sb/simu/configs
mkdir -p $sb/simu/data/cec-chip
-egrep -v "SETENV GFW_P8_MURANO_HB_BASE_IMG_USE_PNOR|SETENV GFW_P8_MURANO_HB_BASE_IMG_WITH_ECC" $BACKING_BUILD/src/simu/configs/P8_MURANO.config> $sb/simu/configs/P8_MURANO.config
-egrep -v "SETENV GFW_P8_VENICE_HB_BASE_IMG_USE_PNOR|SETENV GFW_P8_VENICE_HB_BASE_IMG_WITH_ECC" $BACKING_BUILD/src/simu/configs/P8_VENICE.config> $sb/simu/configs/P8_VENICE.config
+egrep -v "SETENV GFW_P8_MURANO_HB_BASE_IMG_USE_PNOR|SETENV GFW_P8_MURANO_HB_BASE_IMG_WITH_ECC|GFW_P8_MURANO_CENTAUR_MODEL_EC" $BACKING_BUILD/src/simu/configs/P8_MURANO.config> $sb/simu/configs/P8_MURANO.config
+egrep -v "SETENV GFW_P8_VENICE_HB_BASE_IMG_USE_PNOR|SETENV GFW_P8_VENICE_HB_BASE_IMG_WITH_ECC|GFW_P8_VENICE_CENTAUR_MODEL_EC" $BACKING_BUILD/src/simu/configs/P8_VENICE.config> $sb/simu/configs/P8_VENICE.config
echo "SETENV GFW_P8_MURANO_HB_BASE_IMG_USE_PNOR yes" >> $sb/simu/configs/P8_MURANO.config
echo "SETENV GFW_P8_VENICE_HB_BASE_IMG_USE_PNOR yes" >> $sb/simu/configs/P8_VENICE.config
echo "SETENV GFW_P8_MURANO_HB_BASE_IMG_WITH_ECC yes" >> $sb/simu/configs/P8_MURANO.config
echo "SETENV GFW_P8_VENICE_HB_BASE_IMG_WITH_ECC yes" >> $sb/simu/configs/P8_VENICE.config
+echo "SETENV GFW_P8_VENICE_CENTAUR_MODEL_EC 910790" >> $sb/simu/configs/P8_VENICE.config
+echo "SETENV GFW_P8_MURANO_CENTAUR_MODEL_EC 910790" >> $sb/simu/configs/P8_MURANO.config
echo "+++ Updating s1.act and p8_common.chip"
mkdir -p $sb/simu/data/cec-chip
@@ -63,3 +69,61 @@ sed -i -e's/0xE0, 32 #MBOX_SCRATCH_0/0x38, 32 #MBOX_SCRATCH_0/' $sb/simu/data/
sed -i -e's/0xE4, 32 #MBOX_SCRATCH_1/0x39, 32 #MBOX_SCRATCH_1/' $sb/simu/data/cec-chip/p8_common.chip
sed -i -e's/0xE8, 32 #MBOX_SCRATCH_2/0x3A, 32 #MBOX_SCRATCH_2/' $sb/simu/data/cec-chip/p8_common.chip
sed -i -e's/0xEC, 32 #MBOX_SCRATCH_3/0x3B, 32 #MBOX_SCRATCH_3/' $sb/simu/data/cec-chip/p8_common.chip
+
+#### Update actions files for proc_a_x_pci_dmi_pll_setup -
+#### Remove when F864674 under RTC 60617
+echo "
+ #A Bus PLL workaround
+ CAUSE_EFFECT {
+ LABEL=[P8 ABUS PLL Lock]
+ WATCH=[REG(0x080F0013)]
+ CAUSE: TARGET=[REG(0x080F0013)] OP=[EQUALTO,BUF] DATA=[LITERAL(64,F7FFFFFF FFFFFFFF)]
+ EFFECT: TARGET=[REG(0x080F0019)] OP=[BIT,ON] BIT=[0] # PLL Lock
+} " >> $sb/simu/data/cec-chip/s1.act
+
+echo "
+ #A Bus PLL workaround
+ CAUSE_EFFECT {
+ LABEL=[P8 ABUS PLL Lock]
+ WATCH=[REG(0x080F0013)]
+ CAUSE: TARGET=[REG(0x080F0013)] OP=[EQUALTO,BUF] DATA=[LITERAL(64,F7FFFFFF FFFFFFFF)]
+ EFFECT: TARGET=[REG(0x080F0019)] OP=[BIT,ON] BIT=[0] # PLL Lock
+} " >> $sb/simu/data/cec-chip/p8.act
+
+echo "
+ #DMI PLL workaround
+CAUSE_EFFECT {
+ LABEL=[P8 DMI PLL Lock]
+ WATCH=[REG(0x020F0013)]
+ CAUSE: TARGET=[REG(0x020F0013)] OP=[EQUALTO,BUF] DATA=[LITERAL(64,F7FFFFFF FFFFFFFF)]
+ EFFECT: TARGET=[REG(0x020F0019)] OP=[BIT,ON] BIT=[0] # PLL Lock
+} " >> $sb/simu/data/cec-chip/s1.act
+
+
+echo "
+ #DMI PLL workaround
+CAUSE_EFFECT {
+ LABEL=[P8 DMI PLL Lock]
+ WATCH=[REG(0x020F0013)]
+ CAUSE: TARGET=[REG(0x020F0013)] OP=[EQUALTO,BUF] DATA=[LITERAL(64,F7FFFFFF FFFFFFFF)]
+ EFFECT: TARGET=[REG(0x020F0019)] OP=[BIT,ON] BIT=[0] # PLL Lock
+} " >> $sb/simu/data/cec-chip/p8.act
+
+
+echo "
+ #PCIE PLL workaround
+CAUSE_EFFECT {
+ LABEL=[P8 PCIE PLL Lock]
+ WATCH=[REG(0x090F0013)]
+ CAUSE: TARGET=[REG(0x090F0013)] OP=[EQUALTO,BUF] DATA=[LITERAL(64,F7FFFFFF FFFFFFFF)]
+ EFFECT: TARGET=[REG(0x090F0019)] OP=[BIT,ON] BIT=[0] # PLL Lock
+} " >> $sb/simu/data/cec-chip/s1.act
+
+echo "
+ #PCIE PLL workaround
+CAUSE_EFFECT {
+ LABEL=[P8 PCIE PLL Lock]
+ WATCH=[REG(0x090F0013)]
+ CAUSE: TARGET=[REG(0x090F0013)] OP=[EQUALTO,BUF] DATA=[LITERAL(64,F7FFFFFF FFFFFFFF)]
+ EFFECT: TARGET=[REG(0x090F0019)] OP=[BIT,ON] BIT=[0] # PLL Lock
+} " >> $sb/simu/data/cec-chip/p8.act
diff --git a/src/build/citest/etc/workarounds.presimsetup b/src/build/citest/etc/workarounds.presimsetup
index c9b05c5cf..ff8ff16ca 100755
--- a/src/build/citest/etc/workarounds.presimsetup
+++ b/src/build/citest/etc/workarounds.presimsetup
@@ -32,3 +32,9 @@
#egrep -v "WSALIAS HOSTBOOT_LEVEL FIPSLEVEL|WSALIAS HOSTBOOT_LEVEL SIMICSLEVEL" $BACKING_BUILD/src/simu/data/simicsInfo > $sb/simu/data/simicsInfo
#echo "WSALIAS HOSTBOOT_LEVEL FIPSLEVEL env/gfwb/simics-4.2.0/simics-4.2.83/fips/fld36/fi120201a700.42" >> $sb/simu/data/simicsInfo
#echo "WSALIAS HOSTBOOT_LEVEL SIMICSLEVEL env/vtechb/simics-4.2.0/simics-4.2.83/bin" >> $sb/simu/data/simicsInfo
+
+echo "+++ Backing to Simics Build for Scan support remove with RTC:60617."
+mkdir -p $sb/simu/data
+egrep -v "WSALIAS DEFAULT FIPSLEVEL " $BACKING_BUILD/src/simu/data/simicsInfo > $sb/simu/data/simicsInfo
+echo "WSALIAS DEFAULT FIPSLEVEL env/gfwf/simics-4.2.0/simics-4.2.98/fips/fld36/fi121211q800.42 " >> $sb/simu/data/simicsInfo
+echo "WSALIAS DEFAULT SIMICSLEVEL env/vtechb/simics-4.2.0/simics-4.2.98/bin" >> $sb/simu/data/simicsInfo
diff --git a/src/usr/hwpf/hwp/dram_training/dram_training.C b/src/usr/hwpf/hwp/dram_training/dram_training.C
index ca6c709d8..2da2c66f1 100644
--- a/src/usr/hwpf/hwp/dram_training/dram_training.C
+++ b/src/usr/hwpf/hwp/dram_training/dram_training.C
@@ -179,18 +179,6 @@ void* call_mem_pll_setup( void *io_pArgs )
TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_mem_pll_setup entry" );
- //TODO - Enable this procedure in SIMICs when RTC 46643 is done.
- // For now, only run this procedure in VPO.
- if ( !(TARGETING::is_vpo()) )
- {
- TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
- "WARNING: mem_pll_setup HWP is disabled in SIMICS run!");
- // end task
- return l_err;
-
- }
-
-
// Get all Centaur targets
TARGETING::TargetHandleList l_membufTargetList;
getAllChips(l_membufTargetList, TYPE_MEMBUF);
diff --git a/src/usr/hwpf/hwp/nest_chiplets/nest_chiplets.C b/src/usr/hwpf/hwp/nest_chiplets/nest_chiplets.C
index 594981119..c136104e5 100644
--- a/src/usr/hwpf/hwp/nest_chiplets/nest_chiplets.C
+++ b/src/usr/hwpf/hwp/nest_chiplets/nest_chiplets.C
@@ -95,17 +95,6 @@ void* call_proc_a_x_pci_dmi_pll_initf( void *io_pArgs )
TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
"call_proc_a_x_pci_dmi_pll_initf entry" );
- //TODO - Enable this procedure in SIMICs when RTC 46643 is done.
- // For now, only run this procedure in VPO.
- if ( !(TARGETING::is_vpo()) )
- {
- TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
- "WARNING: proc_a_x_pci_dmi_pll_initf HWP"
- " is disabled in SIMICS run!");
- // end task
- return l_err ;
- }
-
TARGETING::TargetHandleList l_procTargetList;
getAllChips(l_procTargetList, TYPE_PROC);
@@ -187,17 +176,6 @@ void* call_proc_a_x_pci_dmi_pll_setup( void *io_pArgs )
TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
"call_proc_a_x_pci_dmi_pll_setup entry" );
- //TODO - Enable this procedure in SIMICs when RTC 46643 is done.
- // For now, only run this procedure in VPO.
- if ( !(TARGETING::is_vpo()) )
- {
- TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
- "WARNING: proc_a_x_pci_dmi_pll_setup HWP "
- "is disabled in SIMICS run!");
- // end task
- return l_err ;
- }
-
TARGETING::TargetHandleList l_procTargetList;
getAllChips(l_procTargetList, TYPE_PROC);
diff --git a/src/usr/scan/scandd.C b/src/usr/scan/scandd.C
index a96ddfeda..4ea77d0e0 100644
--- a/src/usr/scan/scandd.C
+++ b/src/usr/scan/scandd.C
@@ -227,7 +227,7 @@ errlHndl_t scanDoScan( DeviceFW::OperationType i_opType,
do
{
- TRACDCOMP( g_trac_scandd,"SCAN::scanDoScan> Start::: i_ring=%.8X, i_ringLength=%d, i_flag=%.8X, i_opType=%.8X",i_ring, i_ringlength, i_flag, i_opType);
+ TRACFCOMP( g_trac_scandd,"SCAN::scanDoScan> Start::: i_ring=%lX, i_ringLength=%d, i_flag=%lX, i_opType=%.8X",i_ring, i_ringlength, i_flag, i_opType);
// To get the remaining bits of data
// If not on a 32bit boundary need to know how many bits to shift.
@@ -278,13 +278,13 @@ errlHndl_t scanDoScan( DeviceFW::OperationType i_opType,
op_size,
DEVICE_SCOM_ADDRESS(l_scanTypeAddr));
- TRACDCOMP( g_trac_scandd,"SCAN: ScanSelect PUTSCOM %.8x = %.8x, %.8x", l_scanTypeAddr , l_buffer[0], l_buffer[1]);
+ TRACDCOMP( g_trac_scandd,"SCAN: ScanSelect PUTSCOM %lX = %.8x, %.8x", l_scanTypeAddr , l_buffer[0], l_buffer[1]);
if(l_err)
{
TRACFCOMP( g_trac_scandd, ERR_MRK
- "SCAN::scanDoScan> SCOM Write to scan select register failed. i_ring=%.8X, scanTypeData=%llX,scanTypeAddr=%.8X, target =%.8X", i_ring, l_scanTypeData,l_scanTypeAddr, TARGETING::get_huid(i_target) );
+ "SCAN::scanDoScan> SCOM Write to scan select register failed. i_ring=%lX, scanTypeData=%lX,scanTypeAddr=%lX, target =%.8X", i_ring, l_scanTypeData,l_scanTypeAddr, TARGETING::get_huid(i_target) );
// TODO: Add usrDetails
break;
@@ -329,7 +329,7 @@ errlHndl_t scanDoScan( DeviceFW::OperationType i_opType,
op_size,
DEVICE_SCOM_ADDRESS(l_headerDataAddr));
- TRACDCOMP( g_trac_scandd,"SCAN:(Cent Headr) GETSCOM %.8x = %.8x %.8x",l_headerDataAddr , l_buffer[0], l_buffer[1]);
+ TRACDCOMP( g_trac_scandd,"SCAN:(Cent Headr) GETSCOM %lX = %.8x %.8x",l_headerDataAddr , l_buffer[0], l_buffer[1]);
if(l_err)
{
@@ -427,7 +427,7 @@ errlHndl_t scanDoScan( DeviceFW::OperationType i_opType,
// and there are no additional bits left..
// then set bit 18
if ((l_wordCnt == l_wordsInChain-1) && (l_setPulse) &&
- (l_lastDataBits == 0))
+ (l_lastDataBits == 0) && (!l_isCentaur))
{
l_scanDataAddr |= 0x00002000;
l_setPulse = 0;
@@ -435,7 +435,7 @@ errlHndl_t scanDoScan( DeviceFW::OperationType i_opType,
l_buffer[0] = *temp_buffer;
- TRACDCOMP( g_trac_scandd,"SCAN: Word PUTSCOM %.8x = %.8x %.8x",l_scanDataAddr , l_buffer[0], l_buffer[1]);
+ TRACDCOMP( g_trac_scandd,"SCAN: Word PUTSCOM %lX = %.8x %.8x",l_scanDataAddr , l_buffer[0], l_buffer[1]);
}
@@ -463,7 +463,7 @@ errlHndl_t scanDoScan( DeviceFW::OperationType i_opType,
// the buffer we will return
*temp_buffer = l_buffer[0];
- TRACDCOMP( g_trac_scandd,"SCAN: Word GETSCOM %.8x = %.8x %.8x",l_scanDataAddr , l_buffer[0], l_buffer[1]);
+ TRACDCOMP( g_trac_scandd,"SCAN: Word GETSCOM %lX = %.8x %.8x",l_scanDataAddr , l_buffer[0], l_buffer[1]);
}
@@ -518,7 +518,7 @@ errlHndl_t scanDoScan( DeviceFW::OperationType i_opType,
// TRACDCOMP( g_trac_scandd,"SCAN::scanDoScan: Last Bits WRITE> scanTypeDataAddr=%.8X, l_lastDataBits=%d, bytes copied %d,",l_scanDataAddr, l_lastDataBits, ((l_lastDataBits-1)/8 + 1));
- TRACDCOMP( g_trac_scandd,"SCAN: <32Bits PUTSCOM %.8x = %.8x %.8x",l_scanDataAddr , l_buffer[0], l_buffer[1]);
+ TRACDCOMP( g_trac_scandd,"SCAN: <32Bits PUTSCOM %lX = %.8x %.8x",l_scanDataAddr , l_buffer[0], l_buffer[1]);
}
// read/write remaining bits and shift
@@ -539,6 +539,11 @@ errlHndl_t scanDoScan( DeviceFW::OperationType i_opType,
// If this was a read operation.
if( DeviceFW::READ == i_opType )
{
+
+ // Need to shift the data bits to have the data bits be left
+ // justified
+ l_buffer[0] = l_buffer[0]<<(32-l_lastDataBits);
+
// Need to copy the last data bits read in by scom back into
// the buffer we will return
// subtracting 1 from the bits before dividing by 8 to insure
@@ -547,7 +552,7 @@ errlHndl_t scanDoScan( DeviceFW::OperationType i_opType,
//TRACDCOMP( g_trac_scandd, "SCAN::scanDoScan: Last Bits READ> scanTypeDataAddr=%.8X, l_lastDataBits=%d, bytes copied = %d",l_scanDataAddr, l_lastDataBits, ((l_lastDataBits-1)/8 + 1));
- TRACDCOMP( g_trac_scandd,"SCAN: <32bits GETSCOM %.8x = %.8x %.8x",l_scanDataAddr , l_buffer[0], l_buffer[1]);
+ TRACDCOMP( g_trac_scandd,"SCAN: <32bits GETSCOM %lX = %.8x %.8x",l_scanDataAddr , l_buffer[0], l_buffer[1]);
}
}
@@ -589,7 +594,7 @@ errlHndl_t scanDoScan( DeviceFW::OperationType i_opType,
// then set bit 18
if (l_setPulse)
{
- l_scanDataAddr |= 0x00002000;
+ l_headerDataAddr |= 0x00002000;
l_setPulse = 0;
}
}
@@ -602,7 +607,7 @@ errlHndl_t scanDoScan( DeviceFW::OperationType i_opType,
op_size,
DEVICE_SCOM_ADDRESS(l_headerDataAddr));
- TRACDCOMP( g_trac_scandd,"SCAN: Headr GETSCOM %.8x = %.8x %.8x",l_headerDataAddr , l_buffer[0], l_buffer[1]);
+ TRACDCOMP( g_trac_scandd,"SCAN: Headr GETSCOM %lX = %.8x %.8x",l_headerDataAddr , l_buffer[0], l_buffer[1]);
if(l_err)
{
@@ -618,9 +623,9 @@ errlHndl_t scanDoScan( DeviceFW::OperationType i_opType,
// If the header data did not match..
if ((l_buffer[0] != HEADER_CHECK_DATA))
{
- TRACFCOMP( g_trac_scandd,"SCAN::scanDoScan> Header Check expect deadbeef.. i_ring=%.8X, i_opType=%.8X , ring data=%.8X, i_flag=%.8X,", i_ring, i_opType, l_buffer[0], i_flag );
+ TRACDCOMP( g_trac_scandd,"SCAN::scanDoScan> Header Check Failed expect deadbeef.. i_ring=%.8X, i_opType=%.8X , ring data=%.8X, i_flag=%.8X,", i_ring, i_opType, l_buffer[0], i_flag );
- TRACFCOMP( g_trac_scandd,"SCAN: HEADER DATA FAILED%.8x = %.8x %.8x",l_headerDataAddr , l_buffer[0], l_buffer[1]);
+ TRACFCOMP( g_trac_scandd,"SCAN: HEADER DATA FAILED!! %.8x = %.8x %.8x",l_headerDataAddr , l_buffer[0], l_buffer[1]);
/*@
* @errortype
diff --git a/src/usr/scan/test/scantest.H b/src/usr/scan/test/scantest.H
index 666dcd590..0b15a677a 100644
--- a/src/usr/scan/test/scantest.H
+++ b/src/usr/scan/test/scantest.H
@@ -48,17 +48,7 @@ public:
*
*/
- void test_SCANreadWrite_proc(void)
- {
-
-
- }
-
-// Skipping the real scan test for now because the SCOM regs are not defined and simics
-// is broken for the actions required.
-
- void skip_SCANreadWrite_proc(void)
-// void test_SCANreadWrite_proc(void)
+ void test_SCANreadWrite_proc(void)
{
TRACFCOMP( g_trac_scandd, "scanTest::test_SCANreadWrite_proc> Start" );
@@ -70,7 +60,7 @@ public:
// Setup some targets to use
enum {
myPROC0,
- centaur0,
+ memBuf0,
NUM_TARGETS
};
TARGETING::Target* scan_targets[NUM_TARGETS];
@@ -87,8 +77,22 @@ public:
scan_targets[myPROC0] = TARGETING::targetService().toTarget(epath);
epath.removeLast();
- epath.addLast(TARGETING::TYPE_MEMBUF,0);
- scan_targets[centaur0] = TARGETING::targetService().toTarget(epath);
+ // target membuf 0
+ epath.addLast(TARGETING::TYPE_MEMBUF,4);
+ scan_targets[memBuf0] = TARGETING::targetService().toTarget(epath);
+
+ //printk("Scan Proc target functional state %X present %X \n",
+ //scan_targets[myPROC0]->getAttr<TARGETING::ATTR_HWAS_STATE>().functional,scan_targets[myPROC0]->getAttr<TARGETING::ATTR_HWAS_STATE>().present );
+
+ TARGETING::HwasState l_hwasState;
+ l_hwasState = scan_targets[myPROC0]->getAttr<TARGETING::ATTR_HWAS_STATE>();
+
+ l_hwasState.functional = true;
+ scan_targets[myPROC0]->setAttr<TARGETING::ATTR_HWAS_STATE>(l_hwasState);
+
+ //printk("Scan Proc target functional state after updating is %X present %X \n",
+ //scan_targets[myPROC0]->getAttr<TARGETING::ATTR_HWAS_STATE>().functional,scan_targets[myPROC0]->getAttr<TARGETING::ATTR_HWAS_STATE>().present );
+
for( uint64_t x = 0; x < NUM_TARGETS; x++ )
{
@@ -96,32 +100,38 @@ public:
if(scan_targets[x] == NULL)
{
TRACFCOMP( g_trac_scandd, "scanTest::test_SCANreadWrite_proc> scan target is null %d", x );
+ scan_targets[x] = NULL; //remove from our list
continue;
}
-/* else if (scan_targets[x]->getAttr<TARGETING::ATTR_HWAS_STATE>().functional != true)
+ else if ((scan_targets[x]->getAttr<TARGETING::ATTR_SCOM_SWITCHES>().useXscom == 0) &&
+ (scan_targets[x]->getAttr<TARGETING::ATTR_SCOM_SWITCHES>().useFsiScom== 0))
{
- TRACFCOMP( g_trac_scandd, "scanTest::test_SCANreadWrite_proc> Target %d is not functional", x );
+ TRACFCOMP( g_trac_scandd, "scanTest::test_SCANreadWrite_proc> Target %lX cannot use FSI or Xscom", TARGETING::get_huid(scan_targets[x]));
scan_targets[x] = NULL; //remove from our list
- } */
+
+ }
+ else if (scan_targets[x]->getAttr<TARGETING::ATTR_HWAS_STATE>().functional != true)
+ {
+ TRACFCOMP( g_trac_scandd,"scanTest::test_SCANreadWrite_proc> Target %lX is not functional\n",TARGETING::get_huid(scan_targets[x]) );
+ scan_targets[x] = NULL; //remove from our list
+ }
}
- // scratch data to use
- //@fixme: Need to either fabricate some fake registers to use or save off data before modifying scans to avoid
- // corrupting the HW.
+ // Scan data ..
struct {
TARGETING::Target* target;
- uint64_t data;
+ uint32_t data[8];
uint64_t ring;
uint64_t length;
- uint64_t flag; // Set to zero now until simics works or the header will fail
+ uint64_t flag; // used for header check..
} test_data[] = {
- { scan_targets[myPROC0], 0x1234123456785678, 0x1103400A, 96, 0x0},
- { scan_targets[centaur0], 0xaaaaaaaaaaaaaaaa, 0x00030088, 436, 0x0},
+ { scan_targets[myPROC0], {0x12121212, 0x12341234, 0x12341234, 0x12341234, 0x12341234, 0x12341234, 0x10000000, 0x00000000}, 0x14030803, 197, 0x0},
+ { scan_targets[memBuf0], {0x34343434, 0xaaaaaaaa, 0xbbbbbbbb, 0xb0000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 0x01034001, 100, 0x2},
};
const uint64_t NUM_ADDRS = sizeof(test_data)/sizeof(test_data[0]);
// allocate space for read data
- uint64_t read_data[NUM_ADDRS];
+ uint32_t read_data[8];
// write all the test registers
for( uint64_t x = 0; x < NUM_ADDRS; x++ )
@@ -130,12 +140,12 @@ public:
if(test_data[x].target == NULL)
{
TRACDCOMP( g_trac_scandd, "scanTest::test_SCANreadWrite_proc> TARGEt does not exist 2 %d", x );
-
continue;
}
size_t op_size = test_data[x].length;
+ //printk("Before a write for TARGET %X\n", TARGETING::get_huid(test_data[x].target));
TRACDCOMP( g_trac_scandd, "scanTest::test_SCANreadWrite_proc> Before Device Write 2>>> " );
total++;
l_err = deviceWrite( test_data[x].target,
@@ -154,9 +164,16 @@ public:
}
}
- // read all the test registers
+
+
+ // read all the scan data
for( uint64_t x = 0; x < NUM_ADDRS; x++ )
{
+ for (int j = 0; j<8;j++)
+ {
+ read_data[j] = 0;
+ }
+
//only run if the target exists
if(test_data[x].target == NULL)
{
@@ -167,9 +184,12 @@ public:
total++;
l_err = deviceRead( test_data[x].target,
- &(read_data[x]),
+ &(read_data),
op_size,
- DEVICE_SCAN_ADDRESS(test_data[x].ring, test_data[x].length,test_data[x].flag) );
+ DEVICE_SCAN_ADDRESS(test_data[x].ring,
+ test_data[x].length,
+ test_data[x].flag) );
+
if( l_err )
{
TRACFCOMP(g_trac_scandd, "scanTest::SCANreadWrite_proc> [%d] Read: Error from device : ring=0x%X, RC=%X", x, test_data[x].ring, l_err->reasonCode() );
@@ -177,12 +197,22 @@ public:
fails++;
errlCommit(l_err,SCAN_COMP_ID);
}
-// NOTE:: currently expect fails
- else if(read_data[x] != test_data[x].data)
+ else // read and verify each word read back from the scan read.
{
- TRACFCOMP(g_trac_scandd, "scanTest::test_SCANreadWrite_proc> [%d] Read: EXPECTED Data miss-match : ring=0x%X, read_data=0x%llx, write_data=0x%llx", x, test_data[x].ring, read_data[x], test_data[x].data);
- //TS_FAIL( "scanTest::test_SCANreadWrite_proc> ERROR : Data miss-match between read and expected data" );
- //fails++;
+ // dont need to check the first word.. that is the header.
+ for (uint64_t y=1;y < (test_data[x].length/32 + 1);y++)
+ {
+
+ //printk("scanTest::test_SCANreadWrite_proc> [%ld] Read: Data : ring=0x%lX, read_data=0x%.8x, //write_data=0x%.8x\n", x, test_data[x].ring, read_data[y], test_data[x].data[y]);
+
+ if(read_data[y] != test_data[x].data[y])
+ {
+ TRACFCOMP(g_trac_scandd,
+ "scanTest::test_SCANreadWrite_proc> [%d] Read: EXPECTED Data miss-match : ring=0x%X, read_data=0x%.8x, write_data=0x%llx", x, test_data[x].ring, read_data[y], test_data[x].data[y]);
+ TS_FAIL("scanTest::test_SCANreadWrite_proc> ERROR : Data miss-match between read and expected data" );
+ fails++;
+ }
+ }
}
}
@@ -191,10 +221,6 @@ public:
}
-
-
-
-
};
#endif
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