diff options
14 files changed, 461 insertions, 119 deletions
diff --git a/src/import/chips/p9/procedures/hwp/lib/p9_hcd_memmap_base.H b/src/import/chips/p9/procedures/hwp/lib/p9_hcd_memmap_base.H index 80e902e9f..1112d4942 100644 --- a/src/import/chips/p9/procedures/hwp/lib/p9_hcd_memmap_base.H +++ b/src/import/chips/p9/procedures/hwp/lib/p9_hcd_memmap_base.H @@ -493,6 +493,8 @@ HCD_CONST(PGPE_PSTATE_OUTPUT_TABLES_REGION_SIZE, (16 * ONE_KB)) HCD_CONST(OCC_WOF_TABLES_PPMR_OFFSET, (768 * ONE_KB)) HCD_CONST(OCC_WOF_TABLES_SIZE, (256 * ONE_KB)) +HCD_CONST(WOF_TABLE_RESERVE, + OCC_WOF_TABLES_PPMR_OFFSET - (PGPE_PSTATE_OUTPUT_TABLES_PPMR_OFFSET + PGPE_PSTATE_OUTPUT_TABLES_REGION_SIZE)) HCD_CONST(PGPE_IMAGE_RESERVE_SIZE, (OCC_PSTATE_PARAM_BLOCK_PPMR_OFFSET - PGPE_IMAGE_PPMR_OFFSET - PGPE_IMAGE_SIZE)) diff --git a/src/import/chips/p9/procedures/hwp/lib/p9_hcode_image_defines.H b/src/import/chips/p9/procedures/hwp/lib/p9_hcode_image_defines.H index 0d8920436..81965886d 100644 --- a/src/import/chips/p9/procedures/hwp/lib/p9_hcode_image_defines.H +++ b/src/import/chips/p9/procedures/hwp/lib/p9_hcode_image_defines.H @@ -187,6 +187,8 @@ HCD_HDR_UINT32(g_ppmr_pstables_offset, 0); // Offset to PState Table HCD_HDR_UINT32(g_ppmr_pstables_length, 0); // Length of P State table HCD_HDR_UINT32(g_ppmr_pgpe_sram_img_size, 0); // PGPE Actual SRAM Image Size HCD_HDR_UINT32(g_ppmr_pgpe_boot_prog_code, 0 );// for debug of PGPE booting +HCD_HDR_UINT32(g_ppmr_wof_table_offset, 0 ); // Offset to start of WOF Table +HCD_HDR_UINT32(g_ppmr_wof_table_length, 0 ); // Length of WOF table HCD_HDR_PAD(0x200); #ifdef __ASSEMBLER__ .endm @@ -336,8 +338,10 @@ HCD_HDR_UINT32(g_pgpe_occ_pstables_sram_addr, 0 ); // Offset to start o HCD_HDR_UINT32(g_pgpe_occ_pstables_len, 0 ); // Length of OCC P-State table HCD_HDR_UINT32(g_pgpe_beacon_addr, 0 ); // SRAM addr where PGPE beacon is located HCD_HDR_UINT32(g_quad_status_addr, 0 ); -HCD_HDR_UINT32(g_wof_table_addr, 0 ); -HCD_HDR_UINT32(g_wof_table_length, 0 ); +HCD_HDR_UINT32(g_pgpe_wof_state_address, 0 ); // SRAM address where PGPE WOF State is located +HCD_HDR_UINT32(g_pgpe_req_active_quad_address, 0 ); // SRAM address where requested quad status is located +HCD_HDR_UINT32(g_wof_table_addr, 0 ); // SRAM address where WOF Table is Located +HCD_HDR_UINT32(g_wof_table_length, 0 ); // WOF Table length in bytes #ifdef __ASSEMBLER__ .endm #else @@ -606,6 +610,8 @@ typedef struct uint8_t occParmBlockReserve[OCC_PSTATE_PARAM_BLOCK_REGION_SIZE - sizeof(OCCPstateParmBlock)]; uint8_t pstateTable[sizeof(GeneratedPstateInfo)]; // PPMR + 144KB uint8_t pstateTableReserve[PGPE_PSTATE_OUTPUT_TABLES_REGION_SIZE - sizeof(GeneratedPstateInfo)]; + uint8_t ppmr_reserved1[WOF_TABLE_RESERVE]; + uint8_t wofTableSize[OCC_WOF_TABLES_SIZE]; //WOF Tables located ar PPMR base + 768KB } PPMRLayout_t; /** diff --git a/src/import/chips/p9/procedures/hwp/lib/p9_pstates_common.h b/src/import/chips/p9/procedures/hwp/lib/p9_pstates_common.h index 72fa4b230..f339a6276 100644 --- a/src/import/chips/p9/procedures/hwp/lib/p9_pstates_common.h +++ b/src/import/chips/p9/procedures/hwp/lib/p9_pstates_common.h @@ -267,138 +267,177 @@ typedef struct // // WOF Voltage, Frequency Ratio Tables // +//VFRT calculation part +#define SYSTEM_VERSION_FRQUENCY(VFRT) (1000 + (16.67 * VFRT)) +#define SYSTEM_VFRT_VALUE(FREQ) ((FREQ - 1000)/16.67) -// VFRT Header -typedef struct -{ +#define HOMER_VFRT_VALUE(FREQ,BSF) ((BSF - FREQ)/16.67) +#define HOMER_VERSION_FREQUENCY(VFRT,BSF) (BSF - (16.67 * VFRT)) - /// Magic Number - /// Set to ASCII "VT" - uint16_t magic_number; - /// Indicator - /// Space for generation tools to be anything unique necessary to ID this - /// VFRT - uint16_t indicator; - - union - { - uint8_t value; - struct - { - uint8_t type : 4; - uint8_t version : 4; - } fields; - } typever; - - uint8_t reserved; - - union - { - uint16_t value; - struct - { -#ifdef _BIG_ENDIAN - uint16_t reserved: 4; - uint16_t vdn_id : 4; - uint16_t vdd_id : 4; - uint16_t qa_id : 4; -#else - uint16_t qa_id : 4; - uint16_t vdd_id : 4; - uint16_t vdn_id : 4; - uint16_t reserved: 4; -#endif // _BIG_ENDIAN - - } fields; - } ids; - -} VFRTHeader_t; - -// WOF Tables Header +//VFRT Header fields +typedef struct __attribute__((__packed__)) VFRTHeaderLayout +{ + // VFRT Magic code "VT" + uint16_t magic_number; -typedef struct + uint16_t reserved_1; + // 0:System type, 1:Homer type (0:3) + // if version 1: VFRT size is 12 row(voltage) X 11 column(freq) of size uint8_t + // (4:7) + // if version 2: VFRT size is 24 row(Voltage) X 5 column (Freq) of size uint8_t + uint8_t type_version; + //Reserved + uint8_t reserved_2; + //Identifies the Vdn assumptions tht went in this VFRT (4:7) + uint8_t res_vdnId; + //Identifies the Vdd assumptions tht went in this VFRT (0:4) + //Identifies the Quad Active assumptions tht went in this VFRT (5:7) + uint8_t VddId_QAId; +} VFRTHeaderLayout_t;// WOF Tables Header + +typedef struct __attribute__((__packed__)) WofTablesHeader { /// Magic Number - /// Set to ASCII "VFRT___x" where x is the version of the VFRT structure - uint64_t magic_number; + /// Set to ASCII "WFTH___x" where x is the version of the VFRT structure + uint32_t magic_number; - /// VFRT Size + uint32_t reserved_version; // reserved:24b, version:8b + + /// VFRT Block Size /// Length, in bytes, of a VFRT - uint8_t vfrt_size; + uint16_t vfrt_block_size; + + /// VFRT block header size + uint16_t vfrt_block_header_size; /// VFRT Data Size /// Length, in bytes, of the data field. - uint8_t vfrt_data_size; - - uint8_t reserved; + uint16_t vfrt_data_size; /// Quad Active Size /// Total number of Active Quads uint8_t quads_active_size; + /// Core count + uint8_t core_count; + /// Ceff Vdn Start - /// CeffVdn value represented by index 0 (in percent) - uint8_t vdn_start; + /// CeffVdn value represented by index 0 (in 0.01%) + uint16_t vdn_start; /// Ceff Vdn Step - /// CeffVdn step value for each CeffVdn index (in percent) - uint8_t vdn_step; + /// CeffVdn step value for each CeffVdn index (in 0.01%) + uint16_t vdn_step; /// Ceff Vdn Size /// Number of CeffVdn indexes - uint8_t vdn_size; + uint16_t vdn_size; /// Ceff Vdd Start - /// CeffVdd value represented by index 0 (in percent) - uint8_t vdd_start; + /// CeffVdd value represented by index 0 (in 0.01%) + uint16_t vdd_start; /// Ceff Vdd Step - /// CeffVdd step value for each CeffVdd index (in percent) - uint8_t vdd_step; + /// CeffVdd step value for each CeffVdd index (in 0.01%) + uint16_t vdd_step; /// Ceff Vdd Size /// Number of CeffVdd indexes - uint8_t vdd_size; + uint16_t vdd_size; /// Vratio Start - /// Vratio value represented by index 0 (in percent) - uint8_t vratio_start; + /// Vratio value represented by index 0 (in 0.01%) + uint16_t vratio_start; /// Vratio Step - /// Vratio step value for each CeffVdd index (in percent) - uint8_t vratio_step; + /// Vratio step value for each CeffVdd index (in 0.01%) + uint16_t vratio_step; /// Vratio Size /// Number of Vratio indexes - uint8_t vratio_size; + uint16_t vratio_size; /// Fratio Start - /// Fratio value represented by index 0 (in percent) - uint8_t fratio_start; + /// Fratio value represented by index 0 (in 0.01%) + uint16_t fratio_start; /// Fratio Step - /// Fratio step value for each CeffVdd index (in percent) - uint8_t fratio_step; + /// Fratio step value for each CeffVdd index (in 0.01%) + uint16_t fratio_step; /// Fratio Size /// Number of Fratio indexes - uint8_t fratio_size; + uint16_t fratio_size; + + /// Future usage + uint16_t Vdn_percent[8]; + + ///Socket Power (in Watts) for the WOF Tables + uint16_t socket_power_w; + + ///Nest Frequency (in MHz) used in building the WOF Tables + uint16_t nest_frequency_mhz; + + //Core Sort Power Target Frequency (in MHz) – The #V frequency associated + //with the sort power target for this table set. This will be either the + //Nominal or + //Turbo #V frequency + uint16_t sort_power_freq_mhz; + + ///Regulator Design Point Capacity (in Amps) + uint16_t rdp_capacity; + + ///Up to 8 ASCII characters to be defined by the Table generation team to + //back reference table sources + uint64_t wof_table_source_tag; + + ///Up to 16 ASCII characters as a Package designator + uint64_t package_name; + + uint8_t reserved[6]; } WofTablesHeader_t; -// VDN -// Data is provided in 12ths (eg 12 core pairs on a 24 core chip) -#define VFRT_VRATIO_SIZE 12 +#define CEF_VDN_INDEX 8 +#define CEF_VDD_INDEX 21 +#define ACTIVE_QUADS 6 + +// Data is provided in 1/24ths granularity with adjustments for integer +// representation +#define VFRT_VRATIO_SIZE 24 + +// 5 steps down from 100% is Fratio_step sizes +#define VFRT_FRATIO_SIZE 5 -// 100%/10% steps -#define VFRT_FRATIO_SIZE 10 +//System VFRT layout +typedef struct __attribute__((__packed__)) HomerSysVFRTLayout +{ + VFRTHeaderLayout_t vfrtHeader; + uint8_t vfrt_data[VFRT_VRATIO_SIZE][VFRT_FRATIO_SIZE]; +} HomerSysVFRTLayout_t; + + + +//HOMER VFRT Layout +typedef struct __attribute__((__packed__)) HomerVFRTLayout +{ + VFRTHeaderLayout_t vfrtHeader; + uint8_t vfrt_data[VFRT_VRATIO_SIZE][VFRT_FRATIO_SIZE]; + uint8_t padding[128]; +} HomerVFRTLayout_t; + +//HOMER WOF layout +typedef struct __attribute__((__packed__)) HomerWOFLayout +{ + WofTablesHeader_t wof_header_data; + HomerVFRTLayout_t homer_vfrt_data[CEF_VDN_INDEX][CEF_VDD_INDEX][ACTIVE_QUADS]; +} HomerWOFLayout_t; -// Holds a frequency that is 1000MHz + 16.667*VFRT_Circuit_t typedef uint8_t VFRT_Circuit_t; typedef Pstate VFRT_Hcode_t; diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C b/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C index b406dee9c..e2afaa2f9 100644 --- a/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C +++ b/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C @@ -1704,6 +1704,8 @@ void updatePgpeHeader( void* const i_pHomer ) //PGPE Beacon SRAM address pPgpeHdr->g_pgpe_beacon_addr = 0; pPgpeHdr->g_quad_status_addr = 0; + pPgpeHdr->g_pgpe_wof_state_address = 0; + pPgpeHdr->g_pgpe_req_active_quad_address = 0; pPgpeHdr->g_wof_table_addr = 0; pPgpeHdr->g_wof_table_length = 0; @@ -1772,6 +1774,8 @@ void updatePpmrHeader( void* const i_pHomer, PpmrHeader_t& io_ppmrHdr ) FAPI_DBG("PS Table Offset : 0x%08x", SWIZZLE_4_BYTE(pPpmrHdr->g_ppmr_pstables_offset)); FAPI_DBG("PS Table Length : 0x%08x", SWIZZLE_4_BYTE(pPpmrHdr->g_ppmr_pstables_length)); FAPI_DBG("PSGPE SRAM Size : 0x%08x", SWIZZLE_4_BYTE(pPpmrHdr->g_ppmr_pgpe_sram_img_size)); + FAPI_DBG("WOF Table Offset : 0x%08x", SWIZZLE_4_BYTE(pPpmrHdr->g_ppmr_wof_table_offset)); + FAPI_DBG("WOF Table End : 0x%08x", SWIZZLE_4_BYTE(pPpmrHdr->g_ppmr_wof_table_length)); FAPI_DBG("=========================== PPMR Header ends ==================================" ); updatePgpeHeader( i_pHomer ); @@ -1789,8 +1793,8 @@ void updatePpmrHeader( void* const i_pHomer, PpmrHeader_t& io_ppmrHdr ) * return fapi2::Returncode */ fapi2::ReturnCode buildParameterBlock( void* const i_pHomer, CONST_FAPI2_PROC& i_procTgt, - PpmrHeader_t& io_ppmrHdr, - ImageType_t i_imgType ) + PpmrHeader_t& io_ppmrHdr, ImageType_t i_imgType, + void * const i_pBuf1, uint32_t i_sizeBuf1 ) { FAPI_INF("buildParameterBlock entered"); @@ -1817,14 +1821,24 @@ fapi2::ReturnCode buildParameterBlock( void* const i_pHomer, CONST_FAPI2_PROC& i uint32_t sizeAligned = 0; uint32_t sizePStateBlock = 0; + uint32_t wofTableSize = i_sizeBuf1; PstateSuperStructure pStateSupStruct; memset( &pStateSupStruct, 0x00, sizeof(PstateSuperStructure) ); + memset(i_pBuf1,0x00,i_sizeBuf1); //Building P-State Parameter block info by calling a HWP FAPI_DBG("Generating P-State Parameter Block" ); - FAPI_EXEC_HWP(retCode, p9_pstate_parameter_block, i_procTgt, &pStateSupStruct); + FAPI_EXEC_HWP( retCode, p9_pstate_parameter_block, i_procTgt, + &pStateSupStruct, (uint8_t*)i_pBuf1, wofTableSize ); FAPI_TRY(retCode); + //Check if WOF Table is copied properly + FAPI_ASSERT( ( wofTableSize <= OCC_WOF_TABLES_SIZE ), + fapi2::PARAM_WOF_TABLE_SIZE_ERR() + .set_ACTUAL_WOF_TABLE_SIZE(wofTableSize) + .set_MAX_SIZE_ALLOCATED(OCC_WOF_TABLES_SIZE), + "Size of WOF Table Exceeds Max Size Allowed" ); + //-------------------------- Local P-State Parameter Block ------------------------------ uint32_t localPspbStartIndex = SWIZZLE_4_BYTE(pCmeHdr->g_cme_hcode_length); @@ -1832,6 +1846,11 @@ fapi2::ReturnCode buildParameterBlock( void* const i_pHomer, CONST_FAPI2_PROC& i sizePStateBlock = sizeof(LocalPstateParmBlock); + //Note: Not checking size here. Once entire CME Image layout is complete, there is a + //size check at last. WE are safe as long as everthing put together doesn't exceed + //maximum SRAM image size allowed(32KB). No need to check size of Local P-State + //parameter block individually. + FAPI_DBG("Copying Local P-State Parameter Block into CPMR" ); memcpy( pLocalPState, &pStateSupStruct.localppb, sizePStateBlock ); @@ -1849,13 +1868,12 @@ fapi2::ReturnCode buildParameterBlock( void* const i_pHomer, CONST_FAPI2_PROC& i FAPI_DBG("Copying Global P-State Parameter Block" ); sizePStateBlock = sizeof(GlobalPstateParmBlock); - // MAKE ASSERT - if (sizePStateBlock > PGPE_PSTATE_OUTPUT_TABLES_SIZE) - { - FAPI_ERR("GlobalPstateParmBlock exceeds allocation: size = %X (%d), allocation = %X (%d)", - sizePStateBlock, sizePStateBlock, - PGPE_PSTATE_OUTPUT_TABLES_SIZE, PGPE_PSTATE_OUTPUT_TABLES_SIZE); - } + FAPI_ASSERT( ( sizePStateBlock <= PGPE_PSTATE_OUTPUT_TABLES_SIZE ), + fapi2::PARAM_BLOCK_SIZE_ERR() + .set_SUPER_STRUCT_SIZE(sizeof(PstateSuperStructure)) + .set_MAX_SIZE_ALLOCATED(PGPE_PSTATE_OUTPUT_TABLES_SIZE) + .set_ACTUAL_SIZE( sizePStateBlock ), + "Size of Global Parameter Block Exceeds Max Size Allowed" ); FAPI_DBG("GPPBB pgpeRunningOffset 0x%08x", pgpeRunningOffset ); memcpy( &pPpmr->pgpeSramImage[pgpeRunningOffset], &pStateSupStruct.globalppb, sizePStateBlock ); @@ -1885,13 +1903,12 @@ fapi2::ReturnCode buildParameterBlock( void* const i_pHomer, CONST_FAPI2_PROC& i sizePStateBlock, sizePStateBlock, sizeAligned, sizeAligned ); - // MAKE ASSERT - if (sizePStateBlock > OCC_PSTATE_PARAM_BLOCK_SIZE) - { - FAPI_ERR("OCCPstateParmBlock exceeds allocation: size = %X (%d), allocation = %X (%d)", - sizePStateBlock, sizePStateBlock, - OCC_PSTATE_PARAM_BLOCK_SIZE, OCC_PSTATE_PARAM_BLOCK_SIZE); - } + FAPI_ASSERT( ( sizePStateBlock <= OCC_PSTATE_PARAM_BLOCK_SIZE ), + fapi2::PARAM_BLOCK_SIZE_ERR() + .set_SUPER_STRUCT_SIZE(sizeof(OCCPstateParmBlock)) + .set_MAX_SIZE_ALLOCATED(PGPE_PSTATE_OUTPUT_TABLES_SIZE) + .set_ACTUAL_SIZE( sizePStateBlock ), + "Size of OCC Parameter Block Exceeds Max Size Allowed" ); // The PPMR offset is from the begining --- which is the ppmrHeader io_ppmrHdr.g_ppmr_oppb_offset = pPpmr->occParmBlock - pPpmr->ppmrHeader; @@ -1902,12 +1919,8 @@ fapi2::ReturnCode buildParameterBlock( void* const i_pHomer, CONST_FAPI2_PROC& i //-------------------------- OCC P-State Parameter Block Ends ------------------------------ - - - io_ppmrHdr.g_ppmr_lppb_offset = CPMR_HOMER_OFFSET + CME_IMAGE_CPMR_OFFSET + localPspbStartIndex; - io_ppmrHdr.g_ppmr_lppb_length = - localPStateBlock; //FIXME RTC 159737 Need to clarify it from booting perspective - + io_ppmrHdr.g_ppmr_lppb_offset = CPMR_HOMER_OFFSET + CME_IMAGE_CPMR_OFFSET + localPspbStartIndex; + io_ppmrHdr.g_ppmr_lppb_length = localPStateBlock; //------------------------------ OCC P-State Table Allocation ------------------------------ @@ -1915,10 +1928,16 @@ fapi2::ReturnCode buildParameterBlock( void* const i_pHomer, CONST_FAPI2_PROC& i io_ppmrHdr.g_ppmr_pstables_offset = pPpmr->pstateTable - pPpmr->ppmrHeader;; io_ppmrHdr.g_ppmr_pstables_length = sizeof(GeneratedPstateInfo); - //------------------------------ OCC P-State Table Allocation Ends ------------------------- + //------------------------------ Copying WOF Table ---------------------------------------------- + + io_ppmrHdr.g_ppmr_wof_table_offset = OCC_WOF_TABLES_PPMR_OFFSET; + io_ppmrHdr.g_ppmr_wof_table_length = OCC_WOF_TABLES_SIZE; + + memcpy( &pPpmr->wofTableSize, i_pBuf1, wofTableSize ); + //------------------------------ Copying WOF Table ---------------------------------------------- - //------------------------------ Calculating total PGPE Image Size in SRAM ------------------------ + //------------------------------ Calculating total PGPE Image Size in SRAM ---------------------- io_ppmrHdr.g_ppmr_pgpe_sram_img_size = SWIZZLE_4_BYTE(io_ppmrHdr.g_ppmr_hcode_length) + io_ppmrHdr.g_ppmr_gppb_length; @@ -1942,6 +1961,8 @@ fapi2::ReturnCode buildParameterBlock( void* const i_pHomer, CONST_FAPI2_PROC& i io_ppmrHdr.g_ppmr_pstables_offset = SWIZZLE_4_BYTE( io_ppmrHdr.g_ppmr_pstables_offset); io_ppmrHdr.g_ppmr_pstables_length = SWIZZLE_4_BYTE(io_ppmrHdr.g_ppmr_pstables_length); io_ppmrHdr.g_ppmr_pgpe_sram_img_size = SWIZZLE_4_BYTE(io_ppmrHdr.g_ppmr_pgpe_sram_img_size); + io_ppmrHdr.g_ppmr_wof_table_offset = SWIZZLE_4_BYTE(io_ppmrHdr.g_ppmr_wof_table_offset); + io_ppmrHdr.g_ppmr_wof_table_length = SWIZZLE_4_BYTE(io_ppmrHdr.g_ppmr_wof_table_length); } while(0); @@ -3487,7 +3508,7 @@ fapi2::ReturnCode p9_hcode_image_build( CONST_FAPI2_PROC& i_procTgt, "Failed to copy PGPE section in HOMER" ); //Update P State parameter block info in HOMER - FAPI_TRY( buildParameterBlock( pChipHomer, i_procTgt, l_ppmrHdr, i_imgType ), + FAPI_TRY( buildParameterBlock( pChipHomer, i_procTgt, l_ppmrHdr, i_imgType, i_pBuf1, i_sizeBuf1 ), "Failed to add parameter block" ); FAPI_INF("PGPE built"); diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.H b/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.H index 076f33cf6..8aa661c0b 100644 --- a/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.H +++ b/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* Contributors Listed Below - COPYRIGHT 2015,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -46,6 +46,9 @@ extern "C" { + +#define HW_IMG_RING_BUF1_SIZE 307200 + typedef const fapi2::Target< fapi2::TARGET_TYPE_PROC_CHIP > CONST_FAPI2_PROC; /** @@ -64,7 +67,7 @@ extern "C" */ enum { - HW_IMG_RING_SIZE = MAX_SEEPROM_IMAGE_SIZE, + HW_IMG_RING_SIZE = HW_IMG_RING_BUF1_SIZE, //300K to accomodate WOF data WORK_BUF_SIZE = MAX_RING_BUF_SIZE, }; diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pstate_parameter_block.C b/src/import/chips/p9/procedures/hwp/pm/p9_pstate_parameter_block.C index a666dfa32..630842a85 100644 --- a/src/import/chips/p9/procedures/hwp/pm/p9_pstate_parameter_block.C +++ b/src/import/chips/p9/procedures/hwp/pm/p9_pstate_parameter_block.C @@ -47,6 +47,7 @@ #include "p9_pm_get_poundv_bucket.H" #include "p9_pm_get_poundw_bucket.H" #include "p9_resclk_defines.H" +#include <attribute_ids.H> fapi2::vdmData_t g_vpdData = {1, 2, @@ -60,18 +61,48 @@ fapi2::vdmData_t g_vpdData = {1, } }; + +uint8_t g_wofData[] = {0x57, 0x46, 0x54, 0x48, /*MAGIC CODE WFTH*/0x00, 0x00, 0x00, + 0x01,/*version*/0x00, 0x80 /*VFRT block size*/, 0x00, 0x08 /*VFRT header size*/, + 0x00, 0x01, 0x6,/*Quad value*/ 0x18 /*core count*/, 0x00, 0xFA /*Vdn start*/, 0x00, 0x64 /*Vdn step*/, + 0x00, 0x08 /*Vdn size*/, 0x00, 0x00 /*Vdd start*/, 0x00, 0x32 /*Vdd step*/, 0x00, 0x15/*Vdd size*/, 0x03, 0xE8 /*Vratio start*/, + 0x00, 0x53 /*Vratio step*/, 0x00, 0x18 /*Vratio size*/, 0x03, 0xE8 /*Fratio start*/, 0x00, 0x64/*Fratio step*/, 0x00, 0x5 /*Fratio size*/, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*Vdn percent*/ + 0x00, 0x64 /*Socket power Watts*/, 0x07, 0x4a /*nest freq*/, 0x09, 0x60 /*nominl freq*/, 0x00, 0x00/*RDP capacity*/, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 /* WOF table source tag*/, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 /*package name*/, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + }; + + +uint8_t g_sysvfrtData[] = {0x56, 0x54, 0x00, 0x00, 0x02, 0x01, 0x01, 0x06, /// VFRT header values + // Magic_codea(2B) + // reserved(2B) + // type(4b),version(4b) + // vdn(1B),vdd(1B) + // quad id(1B) + 0xB1, 0xB1, 0xB0, 0xAF, 0xA9, 0xA1, 0x97, 0x8E, 0x86, 0x7F, 0x78, 0x73, 0x6D, 0x68, 0x63, 0x5F, 0x5B, 0x57, 0x53, 0x4E, 0x4D, 0x4D, 0x4D, 0x4D, + 0xB1, 0xB1, 0xB0, 0xAF, 0xA9, 0xA1, 0x97, 0x8E, 0x86, 0x7F, 0x78, 0x73, 0x6D, 0x68, 0x63, 0x5F, 0x5B, 0x57, 0x53, 0x4E, 0x4D, 0x4D, 0x4D, 0x4D, + 0xB1, 0xB1, 0xB0, 0xAF, 0xA9, 0xA1, 0x97, 0x8E, 0x86, 0x7F, 0x78, 0x73, 0x6D, 0x68, 0x63, 0x5F, 0x5B, 0x57, 0x53, 0x4E, 0x4D, 0x4D, 0x4D, 0x4D, + 0xB1, 0xB1, 0xB0, 0xAF, 0xA9, 0xA1, 0x97, 0x8E, 0x86, 0x7F, 0x78, 0x73, 0x6D, 0x68, 0x63, 0x5F, 0x5B, 0x57, 0x53, 0x4E, 0x4D, 0x4D, 0x4D, 0x4D, + 0xB1, 0xB1, 0xB0, 0xAF, 0xA9, 0xA1, 0x97, 0x8E, 0x86, 0x7F, 0x78, 0x73, 0x6D, 0x68, 0x63, 0x5F, 0x5B, 0x57, 0x53, 0x4E, 0x4D, 0x4D, 0x4D, 0x4D + }; + + // START OF PSTATE PARAMETER BLOCK function /// ------------------------------------------------------------------- /// @brief Populate Pstate super structure from VPD data /// @param[in] i_target => Chip Target -/// @param[inout] *pss => pointer to pstate superstructure +/// @param[inout] *io_pss => pointer to pstate superstructure +/// @param[out] *o_buf => wof table data +/// @param[inout] &io_size => wof table data size /// @return FAPI2::SUCCESS /// ------------------------------------------------------------------- fapi2::ReturnCode p9_pstate_parameter_block( const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target, - PstateSuperStructure* io_pss) + PstateSuperStructure* io_pss, uint8_t* o_buf, uint32_t& io_size) { int rc; FAPI_INF("> p9_pstate_parameter_block"); @@ -363,6 +394,7 @@ p9_pstate_parameter_block( const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_ // frequency_step_khz l_occppb.frequency_step_khz = revle32(l_frequency_step_khz); + // @todo RTC 161279 - Need Pstate 0 definition and freq2pstate function to be coded Pstate pstate_min; @@ -395,6 +427,74 @@ p9_pstate_parameter_block( const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_ (*io_pss).localppb = l_localppb; (*io_pss).occppb = l_occppb; + const fapi2::Target<fapi2::TARGET_TYPE_SYSTEM> FAPI_SYSTEM; + fapi2::ATTR_SYSTEM_WOF_ENABLED_Type l_wof_state; + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SYSTEM_WOF_ENABLED, FAPI_SYSTEM, + l_wof_state), "fapiGetAttribute of ATTR_SYSTEM_WOF_ENABLED failed"); + + //Check WOF is enabled or not + if (!l_wof_state) + { + FAPI_INF("WOF is not enabled"); + io_size = 0; + break; + } + + //If this attribute is set then read the VFRT data from static table. + uint8_t l_sys_vfrt_static_data = 0; + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SYS_VFRT_STATIC_DATA_ENABLE, + FAPI_SYSTEM, + l_sys_vfrt_static_data), + "Error from FAPI_ATTR_GET for attribute ATTR_SYS_VFRT_STATIC_DATA_ENABLE"); + + // Read System VFRT data + fapi2::ATTR_WOF_TABLE_DATA_Type l_wof_table_data; + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_WOF_TABLE_DATA, FAPI_SYSTEM, + l_wof_table_data), "fapiGetAttribute of ATTR_WOF_TABLE_DATA failed"); + + //this structure has VFRT header + data + HomerVFRTLayout_t l_vfrt; + uint32_t l_base_state_frequency = attr_mvpd_voltage_control[VPD_PV_ULTRA][0]; + FAPI_INF("Entering WOF initialization part"); + + if (l_sys_vfrt_static_data) + { + FAPI_DBG("ATTR_SYS_VFRT_STATIC_DATA_ENABLE is SET"); + // Copy WOF header data + memcpy (o_buf, g_wofData, sizeof (g_wofData)); + uint32_t l_index = sizeof (g_wofData); + + for (uint32_t vfrt_index = 0; vfrt_index < (CEF_VDN_INDEX * CEF_VDD_INDEX * ACTIVE_QUADS); ++vfrt_index) + { + p9_pstate_update_vfrt (g_sysvfrtData, &l_vfrt, l_base_state_frequency); + + memcpy(o_buf + l_index, &l_vfrt, sizeof (l_vfrt)); + l_index += sizeof (l_vfrt); + } + + io_size = l_index; + } + else + { + FAPI_DBG("ATTR_SYS_VFRT_STATIC_DATA_ENABLE is not SET"); + // Copy WOF header data + memcpy (o_buf, l_wof_table_data, sizeof (WofTablesHeader_t)); + uint32_t l_wof_table_index = sizeof (WofTablesHeader_t); + uint32_t l_index = sizeof (WofTablesHeader_t); + + // Convert system vfrt to homer vfrt + for (uint32_t vfrt_index = 0; vfrt_index < (CEF_VDN_INDEX * CEF_VDD_INDEX * ACTIVE_QUADS); ++vfrt_index) + { + + p9_pstate_update_vfrt ((l_wof_table_data + l_wof_table_index), &l_vfrt, l_base_state_frequency); + l_wof_table_index += 128; //System vFRT size is 128B..hence need to jump after each VFRT entry + + memcpy(o_buf + l_index, &l_vfrt, sizeof (l_vfrt)); + l_index += sizeof (l_vfrt); + } + + io_size = l_index; + } } while(0); @@ -2403,3 +2503,48 @@ proc_set_resclk_table_attrs(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i fapi_try_exit: return fapi2::current_err; } + +//@brief Initialize HOMER VFRT data +void p9_pstate_update_vfrt(uint8_t* i_pBuffer, + HomerVFRTLayout_t* o_vfrt_data, + uint32_t i_reference_freq) +{ + uint32_t l_index_0 = 0; + uint32_t l_index_1 = 0; + uint8_t l_type = 0; + uint32_t l_freq = 0; + + do + { + //Initialize VFRT header + o_vfrt_data->vfrtHeader.magic_number = revle16(UINT16_GET(i_pBuffer)); + i_pBuffer += 2; + o_vfrt_data->vfrtHeader.reserved_1 = revle16(UINT16_GET(i_pBuffer)); + i_pBuffer += 2; + o_vfrt_data->vfrtHeader.type_version = *i_pBuffer; + i_pBuffer++; + o_vfrt_data->vfrtHeader.reserved_2 = *i_pBuffer; + i_pBuffer++; + o_vfrt_data->vfrtHeader.res_vdnId = *i_pBuffer; + i_pBuffer++; + o_vfrt_data->vfrtHeader.VddId_QAId = *i_pBuffer; + i_pBuffer++; + + //find type + l_type = (o_vfrt_data->vfrtHeader.type_version) >> 4; + + //Initialize VFRT data part + for (l_index_0 = 0; l_index_0 < VFRT_VRATIO_SIZE; ++l_index_0) + { + for (l_index_1 = 0; l_index_1 < VFRT_FRATIO_SIZE; ++l_index_1) + { + l_freq = (l_type) ? HOMER_VERSION_FREQUENCY(*i_pBuffer, i_reference_freq) : SYSTEM_VERSION_FRQUENCY(*i_pBuffer); + o_vfrt_data->vfrt_data[l_index_0][l_index_1] = HOMER_VFRT_VALUE(l_freq, i_reference_freq); + i_pBuffer++; + } + } + + } + while(0); + +} diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pstate_parameter_block.H b/src/import/chips/p9/procedures/hwp/pm/p9_pstate_parameter_block.H index 04fec05da..23c91d46d 100644 --- a/src/import/chips/p9/procedures/hwp/pm/p9_pstate_parameter_block.H +++ b/src/import/chips/p9/procedures/hwp/pm/p9_pstate_parameter_block.H @@ -50,6 +50,7 @@ extern "C" { // can remove from here if below structure is moved to p9_pstates.h #define MAX_ACTIVE_CORES 24 +#define HOMER_WOF_TABLE_SIZE 258176 /// An internal operating point /// /// Internal operating points include characterization (both the original, @@ -505,12 +506,23 @@ oppb_print(OCCPstateParmBlock* i_oppb); int freq2pState (const GlobalPstateParmBlock* gppb, const uint32_t freq_khz, Pstate* pstate); +// @brief Pstate VFRT initialization +// @param[in] i_pBuffer VFRT data coming from HB +// @param[out] o_vfrt_data Homer VFRT version +// @param[in] i_reference_freq Ultra frequency +void p9_pstate_update_vfrt(uint8_t* i_pBuffer, + HomerVFRTLayout_t* o_vfrt_data, + uint32_t i_reference_freq); + + + + /// @typedef p9_pstate_parameter_block_FP_t /// function pointer typedef definition for HWP call support typedef fapi2::ReturnCode (*p9_pstate_parameter_block_FP_t) ( const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>&, - PstateSuperStructure*); + PstateSuperStructure*, uint8_t*, uint32_t&); extern "C" { @@ -519,11 +531,14 @@ extern "C" /// @brief Populate Pstate super structure from VPD data /// @param[in] i_target => Chip Target /// @param[inout] *io_pss => pointer to pstate superstructure +/// @param[out] *o_buf => wof table data +/// @param[inout] &io_size => wof table data size /// @return FAPI2::SUCCESS /// ------------------------------------------------------------------- fapi2::ReturnCode p9_pstate_parameter_block( const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target, - PstateSuperStructure* io_pss); + PstateSuperStructure* io_pss, uint8_t* o_buf, uint32_t& io_size); + } // extern C diff --git a/src/import/chips/p9/procedures/xml/attribute_info/pm_plat_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/pm_plat_attributes.xml index eb6ad0379..005c95260 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/pm_plat_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/pm_plat_attributes.xml @@ -948,6 +948,20 @@ </attribute> <!-- ********************************************************************* --> <attribute> + <id>ATTR_WOF_TABLE_DATA</id> + <targetType>TARGET_TYPE_SYSTEM</targetType> + <description> + WOF data from PNOR which contains WOF header data + VFRT data (vfrt header + + data for 8 Vdn, 21Vdd and 6 Quads) + Consumed by p9_pstate_parameter_block procedure + </description> + <valueType>uint8</valueType> + <initToZero/> + <array>131072</array> + <platInit/> + </attribute> + <!-- ********************************************************************* --> + <attribute> <id>ATTR_DUMP_STOP_INFO_SUPPRESS_ERROR_TRACE</id> <targetType>TARGET_TYPE_PROC_CHIP</targetType> <description> @@ -1711,4 +1725,27 @@ <platInit/> </attribute> <!-- ********************************************************************* --> + <attribute> + <id>ATTR_SYS_VFRT_STATIC_DATA_ENABLE</id> + <description> + + Enables pstate parameter block code to use the static system vfrt data + Consumer: p9_pstate_parameter_block.C -> + + Platform default: OFF + <!-- + @todo RTC 169662 at some point in the program, this default may be switched to + the opposite setting. However, coordination needs to occur with all CIs + as this will enable functions that may not be modeled across the board. + --> + </description> + <targetType>TARGET_TYPE_SYSTEM</targetType> + <valueType>uint8</valueType> + <enum> + OFF = 0x00, ON = 0x01 + </enum> + <initToZero/> + <platInit/> + </attribute> + <!-- ********************************************************************* --> </attributes> diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_hcode_image_build_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_hcode_image_build_errors.xml index 4728875b3..c8c572f6b 100755 --- a/src/import/chips/p9/procedures/xml/error_info/p9_hcode_image_build_errors.xml +++ b/src/import/chips/p9/procedures/xml/error_info/p9_hcode_image_build_errors.xml @@ -197,4 +197,28 @@ </callout> </hwpError> <!-- *********************************************************************** --> + <hwpError> + <rc>RC_PARAM_BLOCK_SIZE_ERR</rc> + <description>hcode image build procedure failed due to size error P-State parameter block super struct</description> + <ffdc>SUPER_STRUCT_SIZE</ffdc> + <ffdc>MAX_SIZE_ALLOCATED</ffdc> + <ffdc>ACTUAL_SIZE</ffdc> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + </hwpError> + <!-- *********************************************************************** --> + <hwpError> + <rc>RC_PARAM_WOF_TABLE_SIZE_ERR</rc> + <description>hcode image build procedure failed due to WOF Table exceeding permissible size limit</description> + <ffdc>ACTUAL_WOF_TABLE_SIZE</ffdc> + <ffdc>MAX_SIZE_ALLOCATED</ffdc> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + </hwpError> + <!-- *********************************************************************** --> + </hwpErrors> diff --git a/src/import/hwpf/fapi2/xml/attribute_info/hb_temp_defaults.xml b/src/import/hwpf/fapi2/xml/attribute_info/hb_temp_defaults.xml index 46ac410d2..2c157a87b 100644 --- a/src/import/hwpf/fapi2/xml/attribute_info/hb_temp_defaults.xml +++ b/src/import/hwpf/fapi2/xml/attribute_info/hb_temp_defaults.xml @@ -115,7 +115,11 @@ <!-- this setting enables to use #W static data--> <default>0x0</default> </attribute> - + <attribute> + <id>ATTR_SYS_VFRT_STATIC_DATA_ENABLE</id> + <!-- this setting enables to use #W static data--> + <default>0x0</default> + </attribute> <attribute> <id>ATTR_IO_OBUS_DCCAL_FLAGS</id> <default>0x0</default> diff --git a/src/usr/isteps/istep15/host_build_stop_image.C b/src/usr/isteps/istep15/host_build_stop_image.C index 27b4d2893..e6a549275 100644 --- a/src/usr/isteps/istep15/host_build_stop_image.C +++ b/src/usr/isteps/istep15/host_build_stop_image.C @@ -346,7 +346,7 @@ void* host_build_stop_image (void *io_pArgs) TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "host_build_stop_image entry" ); // allocate three temporary work buffers - void* l_temp_buffer0 = malloc(MAX_SEEPROM_IMAGE_SIZE); + void* l_temp_buffer0 = malloc(HW_IMG_RING_SIZE); void* l_temp_buffer1 = malloc(MAX_RING_BUF_SIZE); void* l_temp_buffer2 = malloc(MAX_RING_BUF_SIZE); @@ -482,7 +482,7 @@ void* host_build_stop_image (void *io_pArgs) PHASE_IPL, img_type, l_temp_buffer0, - MAX_SEEPROM_IMAGE_SIZE, + HW_IMG_RING_SIZE, l_temp_buffer1, MAX_RING_BUF_SIZE, l_temp_buffer2, diff --git a/src/usr/isteps/pm/pm_common.C b/src/usr/isteps/pm/pm_common.C index 50125e29c..ce5ba6ccc 100644 --- a/src/usr/isteps/pm/pm_common.C +++ b/src/usr/isteps/pm/pm_common.C @@ -235,7 +235,7 @@ namespace HBPM const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> l_fapiTarg(i_target); - void *l_buffer0 = (void*)malloc(MAX_SEEPROM_IMAGE_SIZE); + void *l_buffer0 = (void*)malloc(HW_IMG_RING_SIZE); void *l_buffer1 = (void*)malloc(MAX_RING_BUF_SIZE); void *l_buffer2 = (void*)malloc(MAX_RING_BUF_SIZE); @@ -319,7 +319,7 @@ namespace HBPM ? PHASE_IPL : PHASE_REBUILD, l_imgType, l_buffer0, - MAX_SEEPROM_IMAGE_SIZE, + HW_IMG_RING_SIZE, l_buffer1, MAX_RING_BUF_SIZE, l_buffer2, diff --git a/src/usr/targeting/common/xmltohb/attribute_types.xml b/src/usr/targeting/common/xmltohb/attribute_types.xml index a3a5a80d8..818b66a7a 100644 --- a/src/usr/targeting/common/xmltohb/attribute_types.xml +++ b/src/usr/targeting/common/xmltohb/attribute_types.xml @@ -20129,6 +20129,50 @@ Measured in GB</description> <writeable/> </attribute> +<attribute> + <id>WOF_TABLE_DATA</id> + <description> + WOF data from PNOR which contains WOF header data + VFRT data (vfrt header + + data for 8 Vdn, 21Vdd and 6 Quads) + Consumed by p9_pstate_parameter_block procedure + </description> + <simpleType> + <uint8_t> + </uint8_t> + <array>131072</array> + </simpleType> + <hwpfToHbAttrMap> + <id>ATTR_WOF_TABLE_DATA</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> +</attribute> + +<attribute> + <id>SYS_VFRT_STATIC_DATA_ENABLE</id> + <description> + Enables pstate parameter block code to use the static system vfrt data + Consumer: p9_pstate_parameter_block.C + 0 = OFF, 1 = ON + Platform default: OFF + <!-- + @todo RTC 169662 at some point in the program, this default may be switched to + the opposite setting. However, coordination needs to occur with all CIs + as this will enable functions that may not be modeled across the board. + --> + </description> + <simpleType> + <uint8_t></uint8_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> + <hwpfToHbAttrMap> + <id>ATTR_SYS_VFRT_STATIC_DATA_ENABLE</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> <attribute> <id>SYSTEM_RESCLK_STEP_DELAY</id> diff --git a/src/usr/targeting/common/xmltohb/target_types.xml b/src/usr/targeting/common/xmltohb/target_types.xml index 438021e40..867aed0c6 100755 --- a/src/usr/targeting/common/xmltohb/target_types.xml +++ b/src/usr/targeting/common/xmltohb/target_types.xml @@ -896,6 +896,8 @@ <attribute><id>MSS_VMEM_REGULATOR_MAX_DIMM_COUNT</id></attribute> <attribute><id>SYSTEM_WOF_ENABLED</id></attribute> <attribute><id>WOF_POWER_LIMIT</id></attribute> + <attribute><id>WOF_TABLE_DATA</id></attribute> + <attribute><id>SYS_VFRT_STATIC_DATA_ENABLE</id></attribute> <attribute><id>AVSBUS_FREQUENCY</id></attribute> <attribute><id>PROC_FABRIC_ASYNC_SAFE_MODE</id></attribute> <attribute><id>VDM_ENABLE</id></attribute> |
