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-rw-r--r--src/usr/fapi2/test/fapi2GetChildrenTest.H2
-rw-r--r--src/usr/fapi2/test/fapi2TestUtils.H2
-rwxr-xr-xsrc/usr/targeting/common/genHwsvMrwXml.pl193
-rw-r--r--src/usr/targeting/common/xmltohb/simics_NIMBUS.system.xml80
-rwxr-xr-xsrc/usr/targeting/common/xmltohb/target_types.xml4
-rw-r--r--src/usr/targeting/common/xmltohb/vbu_NIMBUS.system.xml39
-rw-r--r--src/usr/targeting/test/testtargeting.H83
7 files changed, 137 insertions, 266 deletions
diff --git a/src/usr/fapi2/test/fapi2GetChildrenTest.H b/src/usr/fapi2/test/fapi2GetChildrenTest.H
index f06c167d1..3a35113c1 100644
--- a/src/usr/fapi2/test/fapi2GetChildrenTest.H
+++ b/src/usr/fapi2/test/fapi2GetChildrenTest.H
@@ -289,7 +289,7 @@ void test_fapi2GetChildren()
{ return i_perv.getChildren<fapi2::TARGET_TYPE_CAPP>(
TARGET_STATE_PRESENT).size(); } },
- // NV pervasive has 2 NV children
+ // NV pervasive has 1 NV children
{PERV_NV_CHILDREN,
[](TARGETING::ATTR_CHIP_UNIT_type i_unit)
{ return (i_unit == NV_RANGE); },
diff --git a/src/usr/fapi2/test/fapi2TestUtils.H b/src/usr/fapi2/test/fapi2TestUtils.H
index 5be8931d9..21ba562d7 100644
--- a/src/usr/fapi2/test/fapi2TestUtils.H
+++ b/src/usr/fapi2/test/fapi2TestUtils.H
@@ -77,7 +77,7 @@ enum PERVASIVE_CHILDREN {
PERV_XBUS_CHILDREN = 2,
PERV_OBUS_CHILDREN = 1,
PERV_CAPP_CHILDREN = 1,
- PERV_NV_CHILDREN = 2,
+ PERV_NV_CHILDREN = 1,
PERV_MCBIST_CHILDREN = 1,
PERV_MCS_CHILDREN = 2,
PERV_MCA_CHILDREN = 4,
diff --git a/src/usr/targeting/common/genHwsvMrwXml.pl b/src/usr/targeting/common/genHwsvMrwXml.pl
index 5cd232122..1e42b5040 100755
--- a/src/usr/targeting/common/genHwsvMrwXml.pl
+++ b/src/usr/targeting/common/genHwsvMrwXml.pl
@@ -79,15 +79,15 @@ use constant
MAX_MCS_PER_PROC => 4,
MAX_MCA_PER_PROC => 8,
MAX_MCBIST_PER_PROC => 2,
- MAX_PEC_PER_PROC => 3,
- MAX_PHB_PER_PROC => 6,
+ MAX_PEC_PER_PROC => 3, # PEC is same as PBCQ
+ MAX_PHB_PER_PROC => 6, # PHB is same as PCIE
MAX_MBA_PER_MEMBUF => 2,
MAX_OBUS_PER_PROC => 4,
MAX_PPE_PER_PROC => 51, #Only 21, but they are sparsely populated
MAX_PERV_PER_PROC => 56, #Only 42, but they are sparsely populated
MAX_CAPP_PER_PROC => 2,
MAX_SBE_PER_PROC => 1,
- MAX_NV_PER_PROC => 2,
+ MAX_NV_PER_PROC => 1, # FW only for GARD purposes
MAX_MI_PER_PROC => 4,
};
@@ -1856,12 +1856,8 @@ for (my $do_core = 0, my $i = 0; $i <= $#STargets; $i++)
\%fapiPosH);
generate_occ($proc, $proc_ordinal_id);
-
generate_nx($proc,$proc_ordinal_id,$node);
-
- #TODO-RTC:149326-Finish up the rest of the misc units
- #generate_pcies($proc,$proc_ordinal_id);
- #generate_pore($proc,$proc_ordinal_id,$node);
+ generate_nv($proc,$proc_ordinal_id,$node);
# call to do any fsp per-proc targets (ie, occ, psi)
do_plugin('fsp_proc_targets', $proc, $i, $proc_ordinal_id,
@@ -2993,8 +2989,6 @@ sub calcAndAddFapiPos
$typeToLimit{"pec"} = ARCH_LIMIT_PEC_PER_PROC;
$typeToLimit{"phb"} = ARCH_LIMIT_PHB_PER_PEC;
- #TODO RTC 149326 Add calcAndAddFapiPos logic for NV unit
- # when generate_nv is available
}
my $parentFapiPos = 0;
@@ -3752,8 +3746,6 @@ sub getPervasiveForUnit
{
$unitToPervasive{"phb$phb"} = 13 + ($phb>0) + ($phb>2);
}
- #TODO: RTC 149326 add calls to addPervasiveParentLink for nv
- # in the generate_nv function when it gets created
for my $nv (0..MAX_NV_PER_PROC-1)
{
$unitToPervasive{"nv$nv"} = 5;
@@ -4746,94 +4738,72 @@ sub generate_sbe
";
}
-sub generate_pcies
+sub generate_nv
{
my ($proc,$ordinalId) = @_;
my $proc_name = "n${node}:p${proc}";
- print "\n<!-- $SYSNAME n${node}p${proc} PCI units -->\n";
- my $max_index = 2;
-
- # TODO RTC: 116091
- # Note: Originally the MRW parser created 3 PCI targets for every processor
- # using a hard coded max_index value of 2. Defect SW238553 added logic to
- # differentiate the number of targets based on processor type (3 for Murano,
- # 4 for Brazos). This was erroneous, but by the time the problem was
- # caught, it was too late in the release process to fix because the change
- # would end up renumbering the HUID space. Since the extra target is
- # benign, it was decided to leave the bad code in for the remainder of P8.
- # This issue should be fixed in the first release of P9. If the number of
- # PCI targets will be fixed across all P9 processors, simply remove the
- # dynamic selection code in favor of a hard coded value. Otherwise, make
- # the computation data driven by reading the # of PCI targets from
- # appropriate MRW processor part.
- if ($CHIPNAME eq "venice")
- {
- $max_index = 3;
- }
-
- my $max_pcie = $max_index+1;
+ print "\n<!-- $SYSNAME n${node}p${proc} NV units -->\n";
- for my $i ( 0 .. $max_index )
+ for my $i ( 0 .. MAX_NV_PER_PROC-1 )
{
- generate_a_pcie( $proc, $i, $max_pcie, ($ordinalId*$max_pcie)+$i );
+ generate_a_nv( $proc, $i, MAX_NV_PER_PROC,
+ ($ordinalId*MAX_NV_PER_PROC)+$i );
}
}
-my $phbInit = 0;
-my %phbList = ();
-sub generate_phb
+my $nvIpathInit = 0;
+my %nvList = ();
+sub generate_nv_ipath
{
- my $targets_file = open_mrw_file($::mrwdir, "${sysname}-targets.xml");
- my $phbTargets = parse_xml_file($targets_file);
-
- #get the PHB details
- foreach my $Target (@{$phbTargets->{target}})
+ #get the nv ipath detail using previously computed $eTargets
+ foreach my $Target (@{$eTargets->{target}})
{
- if($Target->{'ecmd-common-name'} eq "phb")
+ #get the nv ipath detail
+ #@TODO-RTC:156600
+ if($Target->{'ecmd-common-name'} eq "nvbus")
{
- my $node = $Target->{'node'};
- my $proc = $Target->{'position'};
+ my $node = $Target->{'node'};
+ my $position = $Target->{'position'};
my $chipUnit = $Target->{'chip-unit'};
- my $ipath = $Target->{'instance-path'};
-
+ my $ipath = $Target->{'instance-path'};
- $phbList{$node}{$proc}{$chipUnit} = {
- 'node' => $node,
- 'proc' => $proc,
- 'phbChipUnit' => $chipUnit,
- 'phbIpath' => $ipath,
+ $nvList{$node}{$position}{$chipUnit} = {
+ 'node' => $node,
+ 'position' => $position,
+ 'nvChipUnit' => $chipUnit,
+ 'nvIpath' => $ipath,
}
}
}
}
-sub generate_a_pcie
+sub generate_a_nv
{
- my ($proc, $phb, $max_pcie, $ordinalId) = @_;
- my $uidstr = sprintf("0x%02X10%04X",${node},$proc*$max_pcie + $phb);
+ my ($proc, $nv, $max_nv, $ordinalId) = @_;
+ my $uidstr = sprintf("0x%02X29%04X",${node},$proc*$max_nv + $nv);
- # Get the PHB info
- if ($phbInit == 0)
+ # Get the NV info
+ if ($nvIpathInit == 0)
{
- generate_phb;
- $phbInit = 1;
+ generate_nv_ipath;
+ $nvIpathInit = 1;
}
- my $fapi_name = "NA"; # pcie not FAPI target
+ my $fapi_name = "NA"; # NV not FAPI target
print "
<targetInstance>
- <id>sys${sys}node${node}proc${proc}pci${phb}</id>
- <type>unit-pci-power9</type>
+ <id>sys${sys}node${node}proc${proc}nv${nv}</id>
+ <type>unit-nv-power9</type>
<attribute><id>HUID</id><default>${uidstr}</default></attribute>
<attribute><id>FAPI_NAME</id><default>$fapi_name</default></attribute>
<attribute>
<id>PHYS_PATH</id>
- <default>physical:sys-$sys/node-$node/proc-$proc/pci-$phb</default>
+ <default>physical:sys-$sys/node-$node/proc-$proc/nv-$nv</default>
</attribute>
<attribute>
<id>AFFINITY_PATH</id>
- <default>affinity:sys-$sys/node-$node/proc-$proc/pci-$phb</default>
+ <default>affinity:sys-$sys/node-$node/proc-$proc/nv-$nv</default>
</attribute>
<attribute>
<id>ORDINAL_ID</id>
@@ -4841,41 +4811,26 @@ sub generate_a_pcie
</attribute>
<compileAttribute>
<id>INSTANCE_PATH</id>
- <default>instance:$phbList{$node}{$proc}{$phb}->{'phbIpath'}</default>
+ <default>instance:$nvList{$node}{$proc}{$nv}->{'nvIpath'}</default>
</compileAttribute>
<attribute>
<id>CHIP_UNIT</id>
- <default>$phb</default>
+ <default>$nv</default>
</attribute>";
- # call to do any fsp per-pcie attributes
- do_plugin('fsp_pcie', $proc, $phb, $ordinalId );
+ addPervasiveParentLink($sys,$node,$proc,$nv,"nv");
print "
</targetInstance>
";
}
-my $poreNxInit = 0;
-my %poreList = ();
+my $nxInit = 0;
my %nxList = ();
-sub generate_pore_nx_ipath
+sub generate_nx_ipath
{
- #get the PORE ipath detail using previously computed $eTargets
foreach my $Target (@{$eTargets->{target}})
{
- if($Target->{'ecmd-common-name'} eq "pore")
- {
- my $ipath = $Target->{'instance-path'};
- my $node = $Target->{node};
- my $position = $Target->{position};
-
- $poreList{$node}{$position} = {
- 'node' => $node,
- 'position' => $position,
- 'instancePath' => $ipath,
- }
- }
#get the nx ipath detail
if($Target->{'ecmd-common-name'} eq "nx")
{
@@ -4897,11 +4852,11 @@ sub generate_nx
my ($proc, $ordinalId, $node) = @_;
my $uidstr = sprintf("0x%02X1E%04X",${node},$proc);
- # Get the nx and PORE info
- if ($poreNxInit == 0)
+ # Get the nx info
+ if ($nxInit == 0)
{
- generate_pore_nx_ipath;
- $poreNxInit = 1;
+ generate_nx_ipath;
+ $nxInit = 1;
}
my $ipath = $nxList{$node}{$proc}->{'instancePath'};
@@ -4948,62 +4903,6 @@ sub generate_nx
";
}
-sub generate_pore
-{
- my ($proc, $ordinalId, $node) = @_;
- my $uidstr = sprintf("0x%02X1F%04X",${node},$proc);
-
- # Get the nx and PORE info
- if ($poreNxInit == 0)
- {
- generate_pore_nx_ipath;
- $poreNxInit = 1;
- }
-
- my $ipath = $poreList{$node}{$proc}->{'instancePath'};
- my $mruData = get_mruid($ipath);
- my $fapi_name = "NA"; # pore not FAPI target
-
- print "\n<!-- $SYSNAME n${node}p$proc PORE units -->\n";
- print "
-<targetInstance>
- <id>sys${sys}node${node}proc${proc}pore0</id>
- <type>unit-pore-power9</type>
- <attribute><id>HUID</id><default>${uidstr}</default></attribute>
- <attribute><id>FAPI_NAME</id><default>$fapi_name</default></attribute>
- <attribute>
- <id>PHYS_PATH</id>
- <default>physical:sys-$sys/node-$node/proc-$proc/pore-0</default>
- </attribute>
- <attribute>
- <id>MRU_ID</id>
- <default>$mruData</default>
- </attribute>
- <attribute>
- <id>AFFINITY_PATH</id>
- <default>affinity:sys-$sys/node-$node/proc-$proc/pore-0</default>
- </attribute>
- <attribute>
- <id>ORDINAL_ID</id>
- <default>$ordinalId</default>
- </attribute>
- <compileAttribute>
- <id>INSTANCE_PATH</id>
- <default>instance:$ipath</default>
- </compileAttribute>
- <attribute>
- <id>CHIP_UNIT</id>
- <default>0</default>
- </attribute>";
-
- # call to do any fsp per-pore attributes
- do_plugin('fsp_pore', $proc, $ordinalId );
-
- print "
-</targetInstance>
-";
-}
-
my $logicalDimmInit = 0;
my %logicalDimmList = ();
sub generate_logicalDimms
diff --git a/src/usr/targeting/common/xmltohb/simics_NIMBUS.system.xml b/src/usr/targeting/common/xmltohb/simics_NIMBUS.system.xml
index 4c41d7d6d..91b6af19f 100644
--- a/src/usr/targeting/common/xmltohb/simics_NIMBUS.system.xml
+++ b/src/usr/targeting/common/xmltohb/simics_NIMBUS.system.xml
@@ -2528,7 +2528,7 @@
<targetInstance>
<id>sys0node0proc0nv0</id>
<type>unit-nv-nimbus</type>
- <attribute><id>HUID</id><default>0x002E0300</default></attribute>
+ <attribute><id>HUID</id><default>0x00290000</default></attribute>
<attribute>
<id>FAPI_NAME</id><default>NA</default>
</attribute>
@@ -2541,10 +2541,6 @@
<default>affinity:sys-0/node-0/proc-0/nv-0</default>
</attribute>
<attribute>
- <id>FAPI_POS</id>
- <default>0</default>
- </attribute>
- <attribute>
<id>ORDINAL_ID</id>
<default>0</default>
</attribute>
@@ -2558,39 +2554,6 @@
</attribute>
</targetInstance>
-<targetInstance>
- <id>sys0node0proc0nv1</id>
- <type>unit-nv-nimbus</type>
- <attribute><id>HUID</id><default>0x002E0301</default></attribute>
- <attribute>
- <id>FAPI_NAME</id><default>NA</default>
- </attribute>
- <attribute>
- <id>PHYS_PATH</id>
- <default>physical:sys-0/node-0/proc-0/nv-1</default>
- </attribute>
- <attribute>
- <id>AFFINITY_PATH</id>
- <default>affinity:sys-0/node-0/proc-0/nv-1</default>
- </attribute>
- <attribute>
- <id>FAPI_POS</id>
- <default>1</default>
- </attribute>
- <attribute>
- <id>ORDINAL_ID</id>
- <default>1</default>
- </attribute>
- <attribute>
- <id>CHIP_UNIT</id>
- <default>1</default>
- </attribute>
- <attribute>
- <id>PARENT_PERVASIVE</id>
- <default>physical:sys-0/node-0/proc-0/perv-5</default>
- </attribute>
-</targetInstance>
-
<!-- Nimbus n0p0 PPE units
Up to 18 PPEs per Nimbus, only create 2 in this config for now -->
<targetInstance>
@@ -7354,7 +7317,7 @@
<targetInstance>
<id>sys0node0proc1nv0</id>
<type>unit-nv-nimbus</type>
- <attribute><id>HUID</id><default>0x002E0302</default></attribute>
+ <attribute><id>HUID</id><default>0x00290001</default></attribute>
<attribute>
<id>FAPI_NAME</id><default>NA</default>
</attribute>
@@ -7367,12 +7330,8 @@
<default>affinity:sys-0/node-0/proc-1/nv-0</default>
</attribute>
<attribute>
- <id>FAPI_POS</id>
- <default>2</default>
- </attribute>
- <attribute>
<id>ORDINAL_ID</id>
- <default>2</default>
+ <default>1</default>
</attribute>
<attribute>
<id>CHIP_UNIT</id>
@@ -7385,39 +7344,6 @@
</targetInstance>
<targetInstance>
- <id>sys0node0proc1nv1</id>
- <type>unit-nv-nimbus</type>
- <attribute><id>HUID</id><default>0x002E0303</default></attribute>
- <attribute>
- <id>FAPI_NAME</id><default>NA</default>
- </attribute>
- <attribute>
- <id>PHYS_PATH</id>
- <default>physical:sys-0/node-0/proc-1/nv-1</default>
- </attribute>
- <attribute>
- <id>AFFINITY_PATH</id>
- <default>affinity:sys-0/node-0/proc-1/nv-1</default>
- </attribute>
- <attribute>
- <id>FAPI_POS</id>
- <default>3</default>
- </attribute>
- <attribute>
- <id>ORDINAL_ID</id>
- <default>3</default>
- </attribute>
- <attribute>
- <id>CHIP_UNIT</id>
- <default>1</default>
- </attribute>
- <attribute>
- <id>PARENT_PERVASIVE</id>
- <default>physical:sys-0/node-0/proc-1/perv-5</default>
- </attribute>
-</targetInstance>
-
-<targetInstance>
<id>sys0node0proc1ppe0</id>
<type>unit-ppe-power9</type>
<attribute><id>HUID</id><default>0x000B0015</default></attribute>
diff --git a/src/usr/targeting/common/xmltohb/target_types.xml b/src/usr/targeting/common/xmltohb/target_types.xml
index 5a6df37bc..b297db830 100755
--- a/src/usr/targeting/common/xmltohb/target_types.xml
+++ b/src/usr/targeting/common/xmltohb/target_types.xml
@@ -3059,8 +3059,8 @@
</targetType>
<!-- NV
- Nimbus : 2 per chip
- Cumulus: 2 -->
+ Nimbus : 1 per chip
+ Cumulus: 1 per chip -->
<targetType>
<id>unit-nv-power9</id>
<parent>unit</parent>
diff --git a/src/usr/targeting/common/xmltohb/vbu_NIMBUS.system.xml b/src/usr/targeting/common/xmltohb/vbu_NIMBUS.system.xml
index 1ff876556..cfce2f29f 100644
--- a/src/usr/targeting/common/xmltohb/vbu_NIMBUS.system.xml
+++ b/src/usr/targeting/common/xmltohb/vbu_NIMBUS.system.xml
@@ -2502,7 +2502,7 @@
<targetInstance>
<id>sys0node0proc0nv0</id>
<type>unit-nv-nimbus</type>
- <attribute><id>HUID</id><default>0x002E0300</default></attribute>
+ <attribute><id>HUID</id><default>0x00290000</default></attribute>
<attribute>
<id>FAPI_NAME</id><default>NA</default>
</attribute>
@@ -2515,10 +2515,6 @@
<default>affinity:sys-0/node-0/proc-0/nv-0</default>
</attribute>
<attribute>
- <id>FAPI_POS</id>
- <default>0</default>
- </attribute>
- <attribute>
<id>ORDINAL_ID</id>
<default>0</default>
</attribute>
@@ -2532,39 +2528,6 @@
</attribute>
</targetInstance>
-<targetInstance>
- <id>sys0node0proc0nv1</id>
- <type>unit-nv-nimbus</type>
- <attribute><id>HUID</id><default>0x002E0301</default></attribute>
- <attribute>
- <id>FAPI_NAME</id><default>NA</default>
- </attribute>
- <attribute>
- <id>PHYS_PATH</id>
- <default>physical:sys-0/node-0/proc-0/nv-1</default>
- </attribute>
- <attribute>
- <id>AFFINITY_PATH</id>
- <default>affinity:sys-0/node-0/proc-0/nv-1</default>
- </attribute>
- <attribute>
- <id>FAPI_POS</id>
- <default>1</default>
- </attribute>
- <attribute>
- <id>ORDINAL_ID</id>
- <default>1</default>
- </attribute>
- <attribute>
- <id>CHIP_UNIT</id>
- <default>1</default>
- </attribute>
- <attribute>
- <id>PARENT_PERVASIVE</id>
- <default>physical:sys-0/node-0/proc-0/perv-5</default>
- </attribute>
-</targetInstance>
-
<!-- Nimbus n0p0 PPE units
Up to 18 PPEs per Nimbus, only create 2 in this config for now -->
<targetInstance>
diff --git a/src/usr/targeting/test/testtargeting.H b/src/usr/targeting/test/testtargeting.H
index 73f7c0d1b..e7312e694 100644
--- a/src/usr/targeting/test/testtargeting.H
+++ b/src/usr/targeting/test/testtargeting.H
@@ -312,6 +312,89 @@ class TargetingTestSuite : public CxxTest::TestSuite
TS_TRACE(EXIT_MRK "testSignedAttribute");
}
+ void testPciPhbTarget()
+ {
+ TS_TRACE(ENTER_MRK "testPciPhbTarget" );
+
+ using namespace ERRORLOG;
+ using namespace TARGETING;
+
+ TargetHandleList l_targs;
+
+ getAllChiplets( l_targs, TYPE_PCI);
+
+ // There is no PCI target in P9, ensure we got 0 back
+ if(l_targs.size() != 0)
+ {
+ TS_FAIL("TYPE_PCIE target incorrectly returned non-zero size: %d",
+ l_targs.size());
+ }
+
+ // The PCI target is actually the PHB target in P9
+ getAllChiplets( l_targs, TYPE_PHB);
+ if(l_targs.size() == 0)
+ {
+ TS_FAIL("TYPE_PHB target incorrectly returned zero size");
+ }
+ else
+ {
+ TS_TRACE("Correctly returned non-zero number of PHB units: %d",
+ l_targs.size());
+ }
+
+ for (auto l_targ : l_targs)
+ {
+ // Do a basic validation of PHB target by reading HUID
+ uint32_t l_huid = get_huid(l_targ);
+ if(l_huid == 0)
+ {
+ TS_FAIL("Failed to read HUID for a PHB target");
+ }
+ else
+ {
+ TS_TRACE("PHB HUID:0x%.8X",l_huid);
+ }
+ }
+
+ TS_TRACE(EXIT_MRK "testPciPhbTarget");
+ }
+
+ void testNvTarget()
+ {
+ TS_TRACE(ENTER_MRK "testNvTarget" );
+
+ using namespace ERRORLOG;
+ using namespace TARGETING;
+
+ TargetHandleList l_targs;
+
+ getAllChiplets( l_targs, TYPE_NV);
+ if(l_targs.size() == 0)
+ {
+ TS_FAIL("TYPE_NV target incorrectly returned zero size");
+ }
+ else
+ {
+ TS_TRACE("Correctly returned non-zero number of NV units: %d",
+ l_targs.size());
+ }
+
+ for (auto l_targ : l_targs)
+ {
+ // Do a basic validation of NV target by reading HUID
+ uint32_t l_huid = get_huid(l_targ);
+ if(l_huid == 0)
+ {
+ TS_FAIL("Failed to read HUID for a NV target");
+ }
+ else
+ {
+ TS_TRACE("NV HUID:0x%.8X",l_huid);
+ }
+ }
+
+ TS_TRACE(EXIT_MRK "testNvTarget");
+ }
};
#endif // End __TARGETING_TESTTARGETING_H
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