diff options
| -rw-r--r-- | src/build/citest/etc/bbuild | 2 | ||||
| -rw-r--r-- | src/build/citest/etc/patches/patchlist.txt | 19 | ||||
| -rwxr-xr-x | src/build/citest/etc/workarounds.postsimsetup | 21 | ||||
| -rw-r--r-- | src/usr/fsi/test/fsiddtest.H | 47 | ||||
| -rw-r--r-- | src/usr/scan/test/scantest.H | 4 |
5 files changed, 28 insertions, 65 deletions
diff --git a/src/build/citest/etc/bbuild b/src/build/citest/etc/bbuild index 715136f06..e2b412abd 100644 --- a/src/build/citest/etc/bbuild +++ b/src/build/citest/etc/bbuild @@ -1 +1 @@ -/esw/fips801/Builds/b0111a_1303.801 +/esw/fips801/Builds/b0226a_1309.801 diff --git a/src/build/citest/etc/patches/patchlist.txt b/src/build/citest/etc/patches/patchlist.txt index 8a870a8b3..e0cbde4d1 100644 --- a/src/build/citest/etc/patches/patchlist.txt +++ b/src/build/citest/etc/patches/patchlist.txt @@ -5,22 +5,3 @@ Brief description of the problem or reason for patch -Files: list of files -Coreq: list of associated changes, e.g. workarounds.presimsetup -Centaur SBE image requires VDD and Nest PLL lock bits set in 0x1007 reg -Action file need to be updated to set these bits when Centaur SBE code expects them. --RTC: Task 62644 will remove this patch --CMVC: SW182865 --Files: centaur.act.centaur_sbe_patch --Coreq: None - -Ipoll mask register actions are inverted --RTC: Issue 62864 will remove this patch --CMVC: SW183465 --Files: ipoll-inverted.patch --Coreq: None - -S1 requires action for dmi pll lock -Action file need to be updated to set these bits when proc_a_x_pci_dmi_pll_setup needs them --RTC: Task 63307 will remove this patch --CMVC: SW185124 --Files: s1.act.dmi_pll_lock_patch --Coreq: None diff --git a/src/build/citest/etc/workarounds.postsimsetup b/src/build/citest/etc/workarounds.postsimsetup index 7992f134d..beb1983d2 100755 --- a/src/build/citest/etc/workarounds.postsimsetup +++ b/src/build/citest/etc/workarounds.postsimsetup @@ -26,24 +26,3 @@ ## to setup the sandbox ## -echo "+++ Updating centaur.act" -mkdir -p $sb/simu/data/cec-chip -cp $BACKING_BUILD/src/simu/data/cec-chip/centaur.act $sb/simu/data/cec-chip - -## Added action for proc_start_clock_chiplets v1.10 and beyond -echo "+++ Update actions for Centaur SBE image" -patch -p0 $sb/simu/data/cec-chip/centaur.act $HOSTBOOTROOT/src/build/citest/etc/patches/centaur.act.centaur_sbe_patch - -echo "+++ Update actions inverted ipoll" -cp $BACKING_BUILD/src/simu/data/cec-chip/p8_mba.act $sb/simu/data/cec-chip -cp $BACKING_BUILD/src/simu/data/cec-chip/s1_mba.act $sb/simu/data/cec-chip -patch -p0 $sb/simu/data/cec-chip/p8_mba.act $HOSTBOOTROOT/src/build/citest/etc/patches/ipoll-inverted.patch -patch -p0 $sb/simu/data/cec-chip/s1_mba.act $HOSTBOOTROOT/src/build/citest/etc/patches/ipoll-inverted.patch - -echo "+++ Updating s1.act" -mkdir -p $sb/simu/data/cec-chip -cp $BACKING_BUILD/src/simu/data/cec-chip/s1.act $sb/simu/data/cec-chip - -## Added action for dmi pll lock -echo "+++ Update actions for S1 dmi pll lock" -patch -p0 $sb/simu/data/cec-chip/s1.act $HOSTBOOTROOT/src/build/citest/etc/patches/s1.act.dmi_pll_lock_patch diff --git a/src/usr/fsi/test/fsiddtest.H b/src/usr/fsi/test/fsiddtest.H index c4be51db0..c43cc9841 100644 --- a/src/usr/fsi/test/fsiddtest.H +++ b/src/usr/fsi/test/fsiddtest.H @@ -1,26 +1,25 @@ -/* IBM_PROLOG_BEGIN_TAG - * This is an automatically generated prolog. - * - * $Source: src/usr/fsi/test/fsiddtest.H $ - * - * IBM CONFIDENTIAL - * - * COPYRIGHT International Business Machines Corp. 2011-2012 - * - * p1 - * - * Object Code Only (OCO) source materials - * Licensed Internal Code Source Materials - * IBM HostBoot Licensed Internal Code - * - * The source code for this program is not published or other- - * wise divested of its trade secrets, irrespective of what has - * been deposited with the U.S. Copyright Office. - * - * Origin: 30 - * - * IBM_PROLOG_END_TAG - */ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/fsi/test/fsiddtest.H $ */ +/* */ +/* IBM CONFIDENTIAL */ +/* */ +/* COPYRIGHT International Business Machines Corp. 2011,2013 */ +/* */ +/* p1 */ +/* */ +/* Object Code Only (OCO) source materials */ +/* Licensed Internal Code Source Materials */ +/* IBM HostBoot Licensed Internal Code */ +/* */ +/* The source code for this program is not published or otherwise */ +/* divested of its trade secrets, irrespective of what has been */ +/* deposited with the U.S. Copyright Office. */ +/* */ +/* Origin: 30 */ +/* */ +/* IBM_PROLOG_END_TAG */ #ifndef __FSIDDTEST_H #define __FSIDDTEST_H @@ -187,7 +186,7 @@ class FsiDDTest : public CxxTest::TestSuite } test_data[] = { //** Master Control Space // version number - { PROC0, 0x003074, 0x91010800, false, true }, //CMFSI MVER + { PROC0, 0x003074, 0x92010800, false, true }, //CMFSI MVER { PROC0, 0x003474, 0x92010800, false, true }, //MFSI MVER //** Slave Regs (via absolute address) diff --git a/src/usr/scan/test/scantest.H b/src/usr/scan/test/scantest.H index 041587d4a..7f843358d 100644 --- a/src/usr/scan/test/scantest.H +++ b/src/usr/scan/test/scantest.H @@ -51,6 +51,10 @@ public: void test_SCANreadWrite_proc(void) { + // Comment out until bbuild level has the fix. Use RTC 64716 + // to re-enable the testcase + return; + TRACFCOMP( g_trac_scandd, "scanTest::test_SCANreadWrite_proc> Start" ); uint64_t fails = 0; |
