diff options
-rw-r--r-- | src/include/usr/isteps/istep_reasoncodes.H | 4 | ||||
-rw-r--r-- | src/usr/htmgt/htmgt_cfgdata.C | 2 | ||||
-rw-r--r-- | src/usr/isteps/istep06/call_host_voltage_config.C | 253 | ||||
-rw-r--r-- | src/usr/isteps/istep06/makefile | 20 | ||||
-rw-r--r-- | src/usr/isteps/istep07/call_mss_freq.C | 27 | ||||
-rw-r--r-- | src/usr/isteps/istep07/makefile | 2 | ||||
-rwxr-xr-x | src/usr/targeting/common/genHwsvMrwXml.pl | 2 | ||||
-rw-r--r-- | src/usr/targeting/common/xmltohb/attribute_types.xml | 53 | ||||
-rwxr-xr-x | src/usr/targeting/common/xmltohb/target_types.xml | 2 |
9 files changed, 344 insertions, 21 deletions
diff --git a/src/include/usr/isteps/istep_reasoncodes.H b/src/include/usr/isteps/istep_reasoncodes.H index bbf439d01..f135f5595 100644 --- a/src/include/usr/isteps/istep_reasoncodes.H +++ b/src/include/usr/isteps/istep_reasoncodes.H @@ -52,6 +52,7 @@ namespace ISTEP MOD_THREAD_ACTIVATE = 0x10, MOD_CHECK_SLAVE_SBE_SEEPROM_COMPLETE = 0x11, MOD_PM_LOAD_HOST_DATA_TO_SRAM = 0x12, + MOD_VOLTAGE_CONFIG = 0x13, }; /** @@ -84,6 +85,9 @@ namespace ISTEP RC_NO_MASTER_CORE_TARGET = ISTEP_COMP_ID | 0x16, RC_SBE_SLAVE_TIMEOUT = ISTEP_COMP_ID | 0x17, RC_ECMD_INSERT_FAILED = ISTEP_COMP_ID | 0x18, + RC_NO_FUNCTIONAL_PROCS = ISTEP_COMP_ID | 0x19, + RC_NO_PRESENT_EQS = ISTEP_COMP_ID | 0x1A, + RC_NOMINAL_FREQ_MISMATCH = ISTEP_COMP_ID | 0x1B, }; }; diff --git a/src/usr/htmgt/htmgt_cfgdata.C b/src/usr/htmgt/htmgt_cfgdata.C index 75d118b7a..bdd530b28 100644 --- a/src/usr/htmgt/htmgt_cfgdata.C +++ b/src/usr/htmgt/htmgt_cfgdata.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2014,2015 */ +/* Contributors Listed Below - COPYRIGHT 2014,2016 */ /* [+] International Business Machines Corp. */ /* */ /* */ diff --git a/src/usr/isteps/istep06/call_host_voltage_config.C b/src/usr/isteps/istep06/call_host_voltage_config.C index 12954ef47..4b787fcd5 100644 --- a/src/usr/isteps/istep06/call_host_voltage_config.C +++ b/src/usr/isteps/istep06/call_host_voltage_config.C @@ -27,19 +27,266 @@ #include <errl/errlentry.H> #include <errl/errlmanager.H> #include <isteps/hwpisteperror.H> +#include <initservice/isteps_trace.H> +#include <fapi2.H> +#include <fapi2/plat_hwp_invoker.H> + +//Targeting +#include <targeting/common/commontargeting.H> +#include <targeting/common/util.H> +#include <targeting/common/utilFilter.H> +#include <targeting/common/target.H> + +#include <p9_pm_get_poundv_bucket.H> +#include <p9_setup_evid.H> + + + +using namespace TARGETING; + namespace ISTEP_06 { void* call_host_voltage_config( void *io_pArgs ) { - ISTEP_ERROR::IStepError l_stepError; - TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_host_voltage_config entry" ); + ISTEP_ERROR::IStepError l_stepError; + errlHndl_t l_err = nullptr; + Target * l_sys = nullptr; + TargetHandleList l_procList; + TargetHandleList l_eqList; + fapi2::voltageBucketData_t l_voltageData; + fapi2::ReturnCode l_rc; + + uint32_t l_nominalFreq = 0; //ATTR_NOMINAL_FREQ_MHZ + uint32_t l_floorFreq = 0; //ATTR_FREQ_FLOOR_MHZ + uint32_t l_ceilingFreq = 0; //ATTR_FREQ_CORE_CEILING_MHZ + uint32_t l_ultraTurboFreq = 0; //ATTR_ULTRA_TURBO_FREQ_MHZ + uint32_t l_turboFreq = 0; //ATTR_FREQ_CORE_MAX + uint32_t l_vddBootVoltage = 0; //ATTR_VDD_BOOT_VOLTAGE + uint32_t l_vdnBootVoltage = 0; //ATTR_VDN_BOOT_VOLTAGE + uint32_t l_vcsBootVoltage = 0; //ATTR_VCS_BOOT_VOLTAGE + + bool l_firstPass = true; + + PredicateCTM l_eqFilter(CLASS_UNIT, TYPE_EQ); + PredicateHwas l_predPres; + l_predPres.present(true); + PredicatePostfixExpr l_presentEqs; + l_presentEqs.push(&l_eqFilter).push(&l_predPres).And(); + + + do + { + // Get the system target + targetService().getTopLevelTarget(l_sys); + + // Get the child proc chips + getChildAffinityTargets( l_procList, + l_sys, + CLASS_CHIP, + TYPE_PROC ); + + // for each proc target + for( const auto & l_proc : l_procList ) + { + // get the child EQ targets + targetService().getAssociated( + l_eqList, + l_proc, + TargetService::CHILD_BY_AFFINITY, + TargetService::ALL, + &l_presentEqs ); + + + if( l_eqList.empty() ) + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "No children of proc 0x%x found to have type EQ", + get_huid(l_proc)); + + + + /*@ + * @errortype + * @moduleid ISTEP::MOD_VOLTAGE_CONFIG + * @reasoncode ISTEP::RC_NO_PRESENT_EQS + * @userdata1 Parent PROC huid + * @devdesc No present EQs found on processor + * @custdesc A problem occurred during the IPL of the system. + */ + l_err = new ERRORLOG::ErrlEntry + (ERRORLOG::ERRL_SEV_CRITICAL_SYS_TERM, + ISTEP::MOD_VOLTAGE_CONFIG, + ISTEP::RC_NO_PRESENT_EQS, + get_huid(l_proc), + 0, + true /*HB SW error*/ ); + break; + } + // for each child EQ target + for( const auto & l_eq : l_eqList ) + { + // cast to fapi2 target + fapi2::Target<fapi2::TARGET_TYPE_EQ> l_fapiEq( l_eq ); + + // get the #V data for this EQ + FAPI_INVOKE_HWP( l_err, + p9_pm_get_poundv_bucket, + l_fapiEq, + l_voltageData); + + if( l_err ) + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "Error in call_host_voltage_config::p9_pm_get_poundv_bucket"); + + // Create IStep error log and cross reference occurred error + l_stepError.addErrorDetails( l_err ); + + // Commit Error + errlCommit( l_err, ISTEP_COMP_ID ); + + continue; + } + + // Save the voltage data for future comparison + if( l_firstPass ) + { + l_nominalFreq = l_voltageData.nomFreq; + l_floorFreq = l_voltageData.PSFreq; + l_ceilingFreq = l_voltageData.turboFreq; + l_ultraTurboFreq = l_voltageData.uTurboFreq; + l_turboFreq = l_voltageData.turboFreq; + l_vddBootVoltage = l_voltageData.VddPSVltg; + l_vdnBootVoltage = l_voltageData.VddPSVltg; + l_vcsBootVoltage = l_voltageData.VcsPSVltg; + l_firstPass = false; + } + else + { + // save it to variable and compare agains other nomFreq + // All of the buckets should report the same Nominal frequency + if( l_nominalFreq != l_voltageData.nomFreq ) + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "NOMINAL FREQ MISMATCH! expected: %d actual: %d", + l_nominalFreq, l_voltageData.nomFreq ); + + l_err = new ERRORLOG::ErrlEntry + (ERRORLOG::ERRL_SEV_CRITICAL_SYS_TERM, + ISTEP::MOD_VOLTAGE_CONFIG, + ISTEP::RC_NOMINAL_FREQ_MISMATCH, + l_nominalFreq, + l_voltageData.nomFreq, + false ); + + l_err->addHwCallout(l_proc, + HWAS::SRCI_PRIORITY_HIGH, + HWAS::DECONFIG, + HWAS::GARD_NULL ); + + // Create IStep error log and cross reference occurred error + l_stepError.addErrorDetails( l_err ); + + // Commit Error + errlCommit( l_err, ISTEP_COMP_ID ); + + continue; + } + + // Floor frequency is the maximum of the Power Save Freqs + l_floorFreq = + (l_voltageData.PSFreq > l_floorFreq) ? l_voltageData.PSFreq : l_floorFreq; + + // Ceiling frequency is the minimum of the Turbo Freqs + l_ceilingFreq = (l_voltageData.turboFreq < l_ceilingFreq) ? + l_voltageData.turboFreq : l_ceilingFreq; + + // Ultra Turbo frequency is the minimum of the Ultra Turbo Freqs + l_ultraTurboFreq = (l_voltageData.uTurboFreq < l_ultraTurboFreq) ? + l_voltageData.uTurboFreq : l_ultraTurboFreq; + + // Turbo frequency is the minimum of the Turbo Freqs + l_turboFreq = l_ceilingFreq; + } + + } // EQ for-loop + + + // set the approprate attributes on the processor + l_proc->setAttr<ATTR_VDD_BOOT_VOLTAGE>( l_vddBootVoltage ); + + l_proc->setAttr<ATTR_VDN_BOOT_VOLTAGE>( l_vdnBootVoltage ); + + l_proc->setAttr<ATTR_VCS_BOOT_VOLTAGE>( l_vcsBootVoltage ); + + TRACDCOMP(ISTEPS_TRACE::g_trac_isteps_trace, + "Setting VDD/VDN/VCS boot voltage for proc huid = 0x%x" + " VDD = %d, VDN = %d, VCS = %d", + get_huid(l_proc), + l_vddBootVoltage, + l_vdnBootVoltage, + l_vcsBootVoltage ); + + + // call p9_setup_evid for each processor + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>l_fapiProc(l_proc); + FAPI_INVOKE_HWP(l_err, p9_setup_evid, l_fapiProc, COMPUTE_VOLTAGE_SETTINGS); + + if( l_err ) + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "Error in call_host_voltage_config::p9_setup_evid"); + + // Create IStep error log and cross reference occurred error + l_stepError.addErrorDetails( l_err ); + + // Commit Error + errlCommit( l_err, ISTEP_COMP_ID ); + continue; + } + + } // PROC for-loop + + // If we hit an error from p9_setup_evid, quit + if( l_err ) + { + break; + } + + // set the frequency system targets + l_sys->setAttr<ATTR_NOMINAL_FREQ_MHZ>( l_nominalFreq ); + + l_sys->setAttr<ATTR_MIN_FREQ_MHZ>( l_floorFreq ); + + l_sys->setAttr<ATTR_FREQ_CORE_CEILING_MHZ>( l_ceilingFreq ); + + l_sys->setAttr<ATTR_FREQ_CORE_MAX>( l_turboFreq ); + + l_sys->setAttr<ATTR_ULTRA_TURBO_FREQ_MHZ>(l_ultraTurboFreq); + + TRACDCOMP(ISTEPS_TRACE::g_trac_isteps_trace, + "Setting System Frequency Attributes: " + "Nominal = %d, Floor = %d, Ceiling = %d, " + "Turbo = %d, UltraTurbo = %d", + l_nominalFreq, l_floorFreq, l_ceilingFreq, + l_turboFreq, l_ultraTurboFreq ); + + // TODO RTC:157890 need interface to look at the SBE and set NEST_FREQ_MHZ and PREV_NEST_FREQ_MHZ to whatever we boot from + } while( 0 ); + + if( l_err ) + { + // Create IStep error log and cross reference occurred error + l_stepError.addErrorDetails( l_err ); - // TODO-RTC: 144620 + // Commit Error + errlCommit( l_err, ISTEP_COMP_ID ); + } TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_host_voltage_config exit" ); diff --git a/src/usr/isteps/istep06/makefile b/src/usr/isteps/istep06/makefile index 2c08e6038..07eee71fe 100644 --- a/src/usr/isteps/istep06/makefile +++ b/src/usr/isteps/istep06/makefile @@ -23,7 +23,6 @@ # # IBM_PROLOG_END_TAG ROOTPATH = ../../../.. -MODULE = istep06 #Add all the object files required for istep06 module OBJS += host_init_fsi.o @@ -37,23 +36,34 @@ OBJS += call_host_voltage_config.o SUBDIRS += thread_activate.d -HWP_PATH += ${ROOTPATH}/src/import/chips/p9/procedures/hwp/nest -VPATH += ${HWP_PATH} +NEST_HWP_PATH += ${ROOTPATH}/src/import/chips/p9/procedures/hwp/nest +PM_HWP_PATH += ${ROOTPATH}/src/import/chips/p9/procedures/hwp/pm +LIB_HWP_PATH += ${ROOTPATH}/src/import/chips/p9/procedures/hwp/lib + +VPATH += ${NEST_HWP_PATH} +VPATH += ${PM_HWP_PATH} +VPATH += ${LIB_HWP_PATH} #Add all the extra include paths EXTRAINCDIR += ${ROOTPATH}/src/usr/sbe EXTRAINCDIR += ${ROOTPATH}/src/include/usr/fapi2 EXTRAINCDIR += ${ROOTPATH}/src/include/usr/secureboot EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/common/include -EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/procedures/hwp/nest +EXTRAINCDIR += ${NEST_HWP_PATH} EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/utils EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/utils/imageProcs/ EXTRAINCDIR += ${ROOTPATH}/src/import/hwpf/fapi2/include +EXTRAINCDIR += ${PM_HWP_PATH} +EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/procedures/hwp/pm/include/registers +EXTRAINCDIR += ${LIB_HWP_PATH} #Required include before all the procedure.mk are included include ${ROOTPATH}/procedure.rules.mk #Include all the procedure makefiles -include $(HWP_PATH)/p9_revert_sbe_mcs_setup.mk +include $(NEST_HWP_PATH)/p9_revert_sbe_mcs_setup.mk +include $(PM_HWP_PATH)/p9_setup_evid.mk +include $(LIB_HWP_PATH)/p9_avsbus_lib.mk +MODULE=istep06 include ${ROOTPATH}/config.mk diff --git a/src/usr/isteps/istep07/call_mss_freq.C b/src/usr/isteps/istep07/call_mss_freq.C index 365938535..1fd5438d9 100644 --- a/src/usr/isteps/istep07/call_mss_freq.C +++ b/src/usr/isteps/istep07/call_mss_freq.C @@ -49,6 +49,10 @@ #include <fapi2.H> #include <fapi2/plat_hwp_invoker.H> + +// SBE +#include <sbeif.H> + // HWP #include <p9_mss_freq.H> #include <p9_mss_freq_system.H> @@ -68,7 +72,6 @@ void* call_mss_freq( void *io_pArgs ) { IStepError l_StepError; errlHndl_t l_err = NULL; - TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_mss_freq entry" ); TARGETING::TargetHandleList l_membufTargetList; @@ -110,6 +113,9 @@ void* call_mss_freq( void *io_pArgs ) } } // End memBuf loop + + + if(l_StepError.getErrorHandle() == NULL) { TARGETING::TargetHandleList l_mcbistTargetList; @@ -152,6 +158,25 @@ void* call_mss_freq( void *io_pArgs ) "WARNING skipping p9_mss_freq_system HWP due to error detected in p9_mss_freq HWP. An error should have been committed."); } +/* TODO RTC: 157659 Trigger SBE update if nest frequency changed + // Check to see if the nest frequency changed + TARGETING::targetService().getTopLevelTarget( l_sys ); + l_newNest = l_sys->getAttr<TARGETING::ATTR_NEST_FREQ_MHZ>(); + l_originalNest = l_sys->getAttr<TARGETING::ATTR_PREV_NEST_FREQ_MHZ>(); + + // Trigger sbe update if the nest frequency changed. + + if( l_newNest != l_originalNest ) + { + l_err = SBE::updateProcessorSbeSeeproms(); + + if( l_err ) + { + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, + "call_mss_freq.C - Error calling updateProcessorSbeSeeproms"); + } + } +*/ // TODO RTC:138226 // 3c) FW examines current synchronous mode nest freq and will customize the diff --git a/src/usr/isteps/istep07/makefile b/src/usr/isteps/istep07/makefile index 228deb718..20d8d27e8 100644 --- a/src/usr/isteps/istep07/makefile +++ b/src/usr/isteps/istep07/makefile @@ -48,6 +48,7 @@ OBJS += sync.o #Add all the extra include paths EXTRAINCDIR += ${ROOTPATH}/src/include/usr/fapi2/ +EXTRAINCDIR += ${ROOTPATH}/src/include/usr/sbe/ EXTRAINCDIR += ${ROOTPATH}/src/import/hwpf/fapi2/include/ EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/utils/ EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/common/include/ @@ -66,6 +67,7 @@ VPATH += ${HWP_PATH} ${HWP_PATH}/lib/spd VPATH += $(PROCEDURES_PATH)/hwp/nest ${ROOTPATH}/src/usr/fapi2 VPATH += ${HWP_PATH}/lib ${HWP_PATH}/lib/utils ${HWP_PATH}/lib/eff_config VPATH += ${HWP_PATH}/lib/freq ${HWP_PATH}/lib/dimm +VPATH += ${ROOTPATH}/src/usr/sbe #Required include before all the procedure.mk are included include ${ROOTPATH}/procedure.rules.mk diff --git a/src/usr/targeting/common/genHwsvMrwXml.pl b/src/usr/targeting/common/genHwsvMrwXml.pl index 8d06024fb..5b486b7dc 100755 --- a/src/usr/targeting/common/genHwsvMrwXml.pl +++ b/src/usr/targeting/common/genHwsvMrwXml.pl @@ -231,7 +231,7 @@ push @systemAttr, "BOOT_FREQ_MHZ", $reqPol->{'boot-frequency'}->{content}, "FREQ_A_MHZ", $reqPol->{'proc_a_frequency'}->{content}, "FREQ_PB_MHZ", $reqPol->{'proc_pb_frequency'}->{content}, - "NEST_FREQ_MHZ", $reqPol->{'proc_pb_frequency'}->{content}, + "ASYNC_NEST_FREQ_MHZ", $reqPol->{'proc_pb_frequency'}->{content}, "FREQ_PCIE_MHZ", $reqPol->{'proc_pcie_frequency'}->{content}, "FREQ_X_MHZ", $reqPol->{'proc_x_frequency'}->{content}, # TODO: RTC 155880 diff --git a/src/usr/targeting/common/xmltohb/attribute_types.xml b/src/usr/targeting/common/xmltohb/attribute_types.xml index 98479f6d3..f40c3cefb 100644 --- a/src/usr/targeting/common/xmltohb/attribute_types.xml +++ b/src/usr/targeting/common/xmltohb/attribute_types.xml @@ -2542,7 +2542,8 @@ System attribute. The lowest frequency that a core can be set to in MHz. This is the same for all cores in the system. - Data is provided by MVPD #V. + Data is provided by MVPD #V and is calculated as the + Maximum of the power save frequencies. </description> <simpleType> <uint32_t> @@ -3770,7 +3771,8 @@ <description> The ultra turbo frequency in MHz. This is the same for all cores in the system. - Provided by the min of the #V Fvmin field in mvpd LRPx records. + Data is provided by MVPD #V and is calculated as + the minimum of the ultra turbo frequencies. </description> <simpleType><uint32_t></uint32_t></simpleType> <persistency>volatile</persistency> @@ -5754,7 +5756,8 @@ Divider for the 1us PBAX hang pulse. A hang is detected after two divided hang Consumers: proc_build_gpstate_table.C (among others) - Set by the HWSV freq/voltage service based on MVPD #V + Data is is provided by MVPD #V and is calculated as the minimum + of the turbo frequencies </description> <simpleType> <uint32_t></uint32_t> @@ -6638,13 +6641,11 @@ DEPRECATED!!!! </attribute> <!-- Add attributes for sbe_config_update --> - <attribute> -<id>NEST_FREQ_MHZ</id> -<description> - Nest frequency in MHz - Default should be 2000 MHz per Greg Still -</description> + <id>ASYNC_NEST_FREQ_MHZ</id> + <description> + The asynchronous nest frequency + </description> <simpleType> <uint32_t> <default>2000</default> @@ -6652,6 +6653,37 @@ DEPRECATED!!!! </simpleType> <persistency>non-volatile</persistency> <readable/> + <hwpfToHbAttrMap> + <id>ATTR_ASYNC_NEST_FREQ_MHZ</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>PREV_NEST_FREQ_MHZ</id> + <description> + The Nest frequency in MHz the system booted on last. + Populated in istep 6.12 from the SBE. + </description> + <simpleType> + <uint32_t></uint32_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> +</attribute> + +<attribute> + <id>NEST_FREQ_MHZ</id> + <description> + Nest frequency in MHz + </description> + <simpleType> + <uint32_t> + </uint32_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> <writeable/> <hwpfToHbAttrMap> <id>ATTR_NEST_FREQ_MHZ</id> @@ -21681,7 +21713,8 @@ DEPRECATED!!!! <description> The maximum core frequency in MHz. This is the same for all cores in the system. - Data is provided by MVPD #V. + Data is provided by MVPD #V and is calculated as + the minimum of the turbo frequencies. </description> <simpleType> <uint32_t> diff --git a/src/usr/targeting/common/xmltohb/target_types.xml b/src/usr/targeting/common/xmltohb/target_types.xml index 7c9b2d8ae..4ed987d76 100755 --- a/src/usr/targeting/common/xmltohb/target_types.xml +++ b/src/usr/targeting/common/xmltohb/target_types.xml @@ -605,7 +605,9 @@ <attribute><id>BOOT_FREQ_MHZ</id></attribute> <attribute><id>FREQ_A_MHZ</id></attribute> <attribute><id>FREQ_PB_MHZ</id></attribute> + <attribute><id>ASYNC_NEST_FREQ_MHZ</id></attribute> <attribute><id>NEST_FREQ_MHZ</id></attribute> + <attribute><id>PREV_NEST_FREQ_MHZ</id></attribute> <attribute><id>FREQ_PCIE_MHZ</id></attribute> <attribute><id>FREQ_X_MHZ</id></attribute> <attribute><id>MSS_MBA_ADDR_INTERLEAVE_BIT</id></attribute> |