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-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/eff_config/eff_config.C13
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H179
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/p9_mss_eff_config.C5
-rw-r--r--src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml15
-rwxr-xr-xsrc/import/chips/p9/procedures/xml/attribute_info/memory_mrw_attributes.xml78
-rw-r--r--src/import/hwpf/fapi2/xml/attribute_info/hb_temp_defaults.xml15
-rw-r--r--src/usr/targeting/common/xmltohb/attribute_types.xml8
-rwxr-xr-xsrc/usr/targeting/common/xmltohb/target_types.xml4
8 files changed, 21 insertions, 296 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/eff_config.C b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/eff_config.C
index aeb3f1a29..dca96e80d 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/eff_config.C
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/eff_config.C
@@ -2598,12 +2598,21 @@ fapi2::ReturnCode eff_config::geardown_mode(const fapi2::Target<TARGET_TYPE_DIMM
// Attribute storage
uint8_t l_2n_autoset = 0;
+ uint8_t l_2n_mrw_mode = 0;
FAPI_TRY( mss::vpd_mr_mc_2n_mode_autoset(i_target, l_2n_autoset) );
+ FAPI_TRY( mss::mrw_dram_2n_mode(l_2n_mrw_mode) );
+ // Geardown maps directly to autoset = 0 gets 1/2 rate, 1 get 1/4 rate.
FAPI_TRY( eff_geardown_mode(l_mcs, l_attrs_geardown_mode.data()) );
- // TODO RTC:158856 Mirrored eff attribute from vpd attribute.
- // Geardown maps directly to autoset = 0 gets 1/2 rate, 1 get 1/4 rate.
+ // If the MRW states 'auto' we use what's in VPD, otherwise we use what's in the MRW.
+ // (Errr ... does this make sense? The MRW is really just another form of VPD ...)
+ if (l_2n_mrw_mode != fapi2::ENUM_ATTR_MSS_MRW_DRAM_2N_MODE_AUTO)
+ {
+ // MRW values are 1 and 2 (to make room for 0 being the default.) So we subtract one.
+ l_2n_autoset = l_2n_mrw_mode - 1;
+ }
+
l_attrs_geardown_mode[l_port_num] = l_2n_autoset;
FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_GEARDOWN_MODE,
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H b/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H
index 432df773c..215afcaa2 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H
@@ -10424,82 +10424,6 @@ fapi_try_exit:
}
///
-/// @brief ATTR_MSS_DATABUS_UTIL getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCA>
-/// @param[out] ref to the value uint8_t
-/// @note Generated by gen_accessors.pl generateParameters (D)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note DRAM data bus utilization percent to use to determine
-/// cfg_nm_n_per_port
-///
-inline fapi2::ReturnCode databus_util(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, uint8_t& o_value)
-{
- uint8_t l_value[2];
-
- FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_DATABUS_UTIL, i_target.getParent<fapi2::TARGET_TYPE_MCS>(), l_value) );
- o_value = l_value[mss::index(i_target)];
- return fapi2::current_err;
-
-fapi_try_exit:
- FAPI_ERR("failed accessing ATTR_MSS_DATABUS_UTIL: 0x%lx (target: %s)",
- uint64_t(fapi2::current_err), mss::c_str(i_target));
- return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_MSS_DATABUS_UTIL getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_DIMM>
-/// @param[out] ref to the value uint8_t
-/// @note Generated by gen_accessors.pl generateParameters (D.1)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note DRAM data bus utilization percent to use to determine
-/// cfg_nm_n_per_port
-///
-inline fapi2::ReturnCode databus_util(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, uint8_t& o_value)
-{
- uint8_t l_value[2];
- auto l_mca = i_target.getParent<fapi2::TARGET_TYPE_MCA>();
-
- FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_DATABUS_UTIL, l_mca.getParent<fapi2::TARGET_TYPE_MCS>(), l_value) );
- o_value = l_value[mss::index(l_mca)];
- return fapi2::current_err;
-
-fapi_try_exit:
- FAPI_ERR("failed accessing ATTR_MSS_DATABUS_UTIL: 0x%lx (target: %s)",
- uint64_t(fapi2::current_err), mss::c_str(i_target));
- return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_MSS_DATABUS_UTIL getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCS>
-/// @param[out] uint8_t* memory to store the value
-/// @note Generated by gen_accessors.pl generateParameters (E)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note DRAM data bus utilization percent to use to determine
-/// cfg_nm_n_per_port
-///
-inline fapi2::ReturnCode databus_util(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, uint8_t* o_array)
-{
- if (o_array == nullptr)
- {
- FAPI_ERR("nullptr passed to attribute accessor %s", __func__);
- return fapi2::FAPI2_RC_INVALID_PARAMETER;
- }
-
- uint8_t l_value[2];
-
- FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_DATABUS_UTIL, i_target, l_value) );
- memcpy(o_array, &l_value, 2);
- return fapi2::current_err;
-
-fapi_try_exit:
- FAPI_ERR("failed accessing ATTR_MSS_DATABUS_UTIL: 0x%lx (target: %s)",
- uint64_t(fapi2::current_err), mss::c_str(i_target));
- return fapi2::current_err;
-}
-
-///
/// @brief ATTR_MSS_OCC_THROTTLED_N_CMDS getter
/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCA>
/// @param[out] ref to the value uint32_t
@@ -19690,67 +19614,6 @@ fapi_try_exit:
}
///
-/// @brief ATTR_MSS_MRW_OFFSET_GPO getter
-/// @param[out] int8_t& reference to store the value
-/// @note Generated by gen_accessors.pl generateParameters (SYSTEM)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note Global Offset in number of Clocks. Delta from the value calculated or taken from
-/// VPD.
-///
-inline fapi2::ReturnCode mrw_offset_gpo(int8_t& o_value)
-{
-
- FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_MRW_OFFSET_GPO, fapi2::Target<fapi2::TARGET_TYPE_SYSTEM>(), o_value) );
- return fapi2::current_err;
-
-fapi_try_exit:
- FAPI_ERR("failed accessing ATTR_MSS_MRW_OFFSET_GPO: 0x%lx (system target)",
- uint64_t(fapi2::current_err));
- return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_MSS_MRW_OFFSET_RLO getter
-/// @param[out] int8_t& reference to store the value
-/// @note Generated by gen_accessors.pl generateParameters (SYSTEM)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note Read Latency Offset in number of Clocks. Delta from the value calculated or
-/// taken from
-/// VPD.
-///
-inline fapi2::ReturnCode mrw_offset_rlo(int8_t& o_value)
-{
-
- FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_MRW_OFFSET_RLO, fapi2::Target<fapi2::TARGET_TYPE_SYSTEM>(), o_value) );
- return fapi2::current_err;
-
-fapi_try_exit:
- FAPI_ERR("failed accessing ATTR_MSS_MRW_OFFSET_RLO: 0x%lx (system target)",
- uint64_t(fapi2::current_err));
- return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_MSS_MRW_OFFSET_WLO getter
-/// @param[out] int8_t& reference to store the value
-/// @note Generated by gen_accessors.pl generateParameters (SYSTEM)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note Write Latency Offset in number of
-/// Clocks
-///
-inline fapi2::ReturnCode mrw_offset_wlo(int8_t& o_value)
-{
-
- FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_MRW_OFFSET_WLO, fapi2::Target<fapi2::TARGET_TYPE_SYSTEM>(), o_value) );
- return fapi2::current_err;
-
-fapi_try_exit:
- FAPI_ERR("failed accessing ATTR_MSS_MRW_OFFSET_WLO: 0x%lx (system target)",
- uint64_t(fapi2::current_err));
- return fapi2::current_err;
-}
-
-///
/// @brief ATTR_MSS_MRW_PERIODIC_MEMCAL_MODE_OPTIONS getter
/// @param[out] uint16_t& reference to store the value
/// @note Generated by gen_accessors.pl generateParameters (SYSTEM)
@@ -19800,48 +19663,6 @@ fapi_try_exit:
}
///
-/// @brief ATTR_MSS_MRW_TSYS_ADR getter
-/// @param[out] uint8_t& reference to store the value
-/// @note Generated by gen_accessors.pl generateParameters (SYSTEM)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note Phase rotator value for the memory sub-system clock in ticks. Ticks are 1/128 of
-/// one cycle of
-/// clock.
-///
-inline fapi2::ReturnCode mrw_tsys_adr(uint8_t& o_value)
-{
-
- FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_MRW_TSYS_ADR, fapi2::Target<fapi2::TARGET_TYPE_SYSTEM>(), o_value) );
- return fapi2::current_err;
-
-fapi_try_exit:
- FAPI_ERR("failed accessing ATTR_MSS_MRW_TSYS_ADR: 0x%lx (system target)",
- uint64_t(fapi2::current_err));
- return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_MSS_MRW_TSYS_DATA getter
-/// @param[out] uint8_t& reference to store the value
-/// @note Generated by gen_accessors.pl generateParameters (SYSTEM)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note Phase rotator value for the memory sub-system data in ticks. Ticks are 1/128 of
-/// one cycle of
-/// clock.
-///
-inline fapi2::ReturnCode mrw_tsys_data(uint8_t& o_value)
-{
-
- FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_MRW_TSYS_DATA, fapi2::Target<fapi2::TARGET_TYPE_SYSTEM>(), o_value) );
- return fapi2::current_err;
-
-fapi_try_exit:
- FAPI_ERR("failed accessing ATTR_MSS_MRW_TSYS_DATA: 0x%lx (system target)",
- uint64_t(fapi2::current_err));
- return fapi2::current_err;
-}
-
-///
/// @brief ATTR_MSS_MRW_DRAM_2N_MODE getter
/// @param[out] uint8_t& reference to store the value
/// @note Generated by gen_accessors.pl generateParameters (SYSTEM)
diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_eff_config.C b/src/import/chips/p9/procedures/hwp/memory/p9_mss_eff_config.C
index 4589c5fa4..40f7e7514 100644
--- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_eff_config.C
+++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_eff_config.C
@@ -231,11 +231,6 @@ fapi2::ReturnCode p9_mss_eff_config( const fapi2::Target<fapi2::TARGET_TYPE_MCS>
}
{
- uint8_t l_databus_util[mss::PORTS_PER_MCS] = {0x5A, 0x5A};
- FAPI_TRY( FAPI_ATTR_SET( fapi2::ATTR_MSS_DATABUS_UTIL, i_target, l_databus_util ) );
- }
-
- {
uint16_t l_cal_step[mss::PORTS_PER_MCS] = {0xFAC0, 0xFAC0};
FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_MSS_CAL_STEP_ENABLE, i_target, l_cal_step) );
}
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml
index 4e5a41f7a..29ea1984b 100644
--- a/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml
@@ -2121,21 +2121,6 @@
</attribute>
<attribute>
- <id>ATTR_MSS_DATABUS_UTIL</id>
- <targetType>TARGET_TYPE_MCS</targetType>
- <!-- TK Do we need an attr per port & dimm ? P8 only had an attr per port AAM -->
- <!-- TK Does OCC set this for their use, if so, name attr appropriately? AAM -->
- <description>
- DRAM data bus utilization percent to use to determine cfg_nm_n_per_port
- </description>
- <initToZero></initToZero>
- <valueType>uint8</valueType>
- <writeable/>
- <array>2</array>
- <mssAccessorName>databus_util</mssAccessorName>
- </attribute>
-
- <attribute>
<id>ATTR_MSS_OCC_THROTTLED_N_CMDS</id>
<targetType>TARGET_TYPE_MCS</targetType>
<!-- TK Do we need an attr per port & dimm ? P8 only had an attr per port AAM -->
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/memory_mrw_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/memory_mrw_attributes.xml
index f4ee6b02d..79eb711ca 100755
--- a/src/import/chips/p9/procedures/xml/attribute_info/memory_mrw_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/memory_mrw_attributes.xml
@@ -89,6 +89,7 @@
<platInit/>
<initToZero/>
<!-- little comment to tell us this might change during power/thermal implemetation -->
+ <!-- little comment to tell us we implemented - will remove before flight TODO RTC:159145 -->
<mssAccessorName>mrw_mem_m_dram_clocks</mssAccessorName>
</attribute>
@@ -102,6 +103,8 @@
<valueType>uint32</valueType>
<platInit/>
<initToZero/>
+ <!-- little comment to tell us this might change during power/thermal implemetation -->
+ <!-- little comment to tell us we implemented - will remove before flight TODO RTC:159145 -->
<mssAccessorName>mrw_max_dram_databus_util</mssAccessorName>
</attribute>
@@ -128,7 +131,7 @@
<targetType>TARGET_TYPE_SYSTEM</targetType>
<description>Capable power control settings. In MRW.</description>
<valueType>uint8</valueType>
- <enum>OFF = 0x00, SLOWEXIT = 0x01, FASTEXIT = 0x02</enum>
+ <enum>OFF = 0x00, POWER_DOWN = 0x01, STR = 0x02, PD_AND_STR = 0x03</enum>
<platInit/>
<initToZero/>
<!-- little comment to tell us this might change during power/thermal implemetation -->
@@ -243,6 +246,7 @@
<platInit/>
<initToZero/>
<default>NORMAL</default>
+ <!-- little comment to tell us we implemented - will remove before flight TODO RTC:159145 -->
<mssAccessorName>mrw_fine_refresh_mode</mssAccessorName>
</attribute>
@@ -259,6 +263,7 @@
<platInit/>
<initToZero/>
<default>NORMAL</default>
+ <!-- little comment to tell us we implemented - will remove before flight TODO RTC:159145 -->
<mssAccessorName>mrw_temp_refresh_range</mssAccessorName>
</attribute>
@@ -308,48 +313,6 @@
</attribute>
<attribute>
- <id>ATTR_MSS_MRW_OFFSET_GPO</id>
- <targetType>TARGET_TYPE_SYSTEM</targetType>
- <description>
- Global Offset in number of Clocks. Delta from the value calculated or taken from VPD.
- </description>
- <valueType>int8</valueType>
- <mssUnits> nck </mssUnits>
- <initToZero/>
- <default>0</default>
- <platInit/>
- <mssAccessorName>mrw_offset_gpo</mssAccessorName>
- </attribute>
-
- <attribute>
- <id>ATTR_MSS_MRW_OFFSET_RLO</id>
- <targetType>TARGET_TYPE_SYSTEM</targetType>
- <description>
- Read Latency Offset in number of Clocks. Delta from the value calculated or taken from VPD.
- </description>
- <valueType>int8</valueType>
- <mssUnits> nck </mssUnits>
- <initToZero/>
- <default>0</default>
- <platInit/>
- <mssAccessorName>mrw_offset_rlo</mssAccessorName>
- </attribute>
-
- <attribute>
- <id>ATTR_MSS_MRW_OFFSET_WLO</id>
- <targetType>TARGET_TYPE_SYSTEM</targetType>
- <description>
- Write Latency Offset in number of Clocks
- </description>
- <valueType>int8</valueType>
- <mssUnits> nck </mssUnits>
- <initToZero/>
- <default>0</default>
- <platInit/>
- <mssAccessorName>mrw_offset_wlo</mssAccessorName>
- </attribute>
-
- <attribute>
<id>ATTR_MSS_MRW_PERIODIC_MEMCAL_MODE_OPTIONS</id>
<targetType>TARGET_TYPE_SYSTEM</targetType>
<description>
@@ -404,34 +367,6 @@
</attribute>
<attribute>
- <id>ATTR_MSS_MRW_TSYS_ADR</id>
- <targetType>TARGET_TYPE_SYSTEM</targetType>
- <description>
- Phase rotator value for the memory sub-system clock in ticks.
- Ticks are 1/128 of one cycle of clock.
- </description>
- <valueType>uint8</valueType>
- <mssUnits> tick </mssUnits>
- <platInit/>
- <default>0x21</default>
- <mssAccessorName>mrw_tsys_adr</mssAccessorName>
- </attribute>
-
- <attribute>
- <id>ATTR_MSS_MRW_TSYS_DATA</id>
- <targetType>TARGET_TYPE_SYSTEM</targetType>
- <description>
- Phase rotator value for the memory sub-system data in ticks.
- Ticks are 1/128 of one cycle of clock.
- </description>
- <valueType>uint8</valueType>
- <mssUnits> tick </mssUnits>
- <default>0x18</default>
- <platInit/>
- <mssAccessorName>mrw_tsys_data</mssAccessorName>
- </attribute>
-
- <attribute>
<id>ATTR_MSS_MRW_DRAM_2N_MODE</id>
<targetType>TARGET_TYPE_SYSTEM</targetType>
<description>
@@ -444,6 +379,7 @@
<platInit/>
<initToZero/>
<default>AUTO</default>
+ <!-- little comment to tell us we implemented - will remove before flight TODO RTC:159145 -->
<mssAccessorName>mrw_dram_2n_mode</mssAccessorName>
</attribute>
diff --git a/src/import/hwpf/fapi2/xml/attribute_info/hb_temp_defaults.xml b/src/import/hwpf/fapi2/xml/attribute_info/hb_temp_defaults.xml
index 7cfb3daef..e08ce5ce6 100644
--- a/src/import/hwpf/fapi2/xml/attribute_info/hb_temp_defaults.xml
+++ b/src/import/hwpf/fapi2/xml/attribute_info/hb_temp_defaults.xml
@@ -379,24 +379,9 @@
<id>ATTR_MSS_OCC_THROTTLED_N_CMDS</id>
</attribute>
<attribute>
- <id>ATTR_MSS_MRW_OFFSET_WLO</id>
- </attribute>
- <attribute>
- <id>ATTR_MSS_MRW_OFFSET_GPO</id>
- </attribute>
- <attribute>
- <id>ATTR_MSS_MRW_OFFSET_RLO</id>
- </attribute>
- <attribute>
<id>ATTR_MSS_MRW_PERIODIC_MEMCAL_MODE_OPTIONS</id>
</attribute>
<attribute>
- <id>ATTR_MSS_MRW_TSYS_ADR</id>
- </attribute>
- <attribute>
- <id>ATTR_MSS_MRW_TSYS_DATA</id>
- </attribute>
- <attribute>
<id>ATTR_MSS_MRW_DRAM_2N_MODE</id>
</attribute>
<attribute>
diff --git a/src/usr/targeting/common/xmltohb/attribute_types.xml b/src/usr/targeting/common/xmltohb/attribute_types.xml
index 6a4f558c0..6a9cfd19c 100644
--- a/src/usr/targeting/common/xmltohb/attribute_types.xml
+++ b/src/usr/targeting/common/xmltohb/attribute_types.xml
@@ -15308,10 +15308,6 @@ Measured in GB</description>
<persistency>volatile-zeroed</persistency>
<readable/>
<writeable/>
- <hwpfToHbAttrMap>
- <id>ATTR_MSS_DATABUS_UTIL_PER_MBA</id>
- <macro>DIRECT</macro>
- </hwpfToHbAttrMap>
</attribute>
<attribute>
@@ -15328,10 +15324,6 @@ Measured in GB</description>
<persistency>volatile-zeroed</persistency>
<readable/>
<writeable/>
- <hwpfToHbAttrMap>
- <id>ATTR_MSS_DATABUS_UTIL</id>
- <macro>DIRECT</macro>
- </hwpfToHbAttrMap>
</attribute>
<attribute>
diff --git a/src/usr/targeting/common/xmltohb/target_types.xml b/src/usr/targeting/common/xmltohb/target_types.xml
index 9babc1df1..b77edc516 100755
--- a/src/usr/targeting/common/xmltohb/target_types.xml
+++ b/src/usr/targeting/common/xmltohb/target_types.xml
@@ -644,7 +644,6 @@
<attribute><id>MRW_VMEM_REGULATOR_MEMORY_POWER_LIMIT_PER_DIMM</id></attribute>
<attribute><id>PM_SYSTEM_IVRMS_ENABLED</id></attribute>
<attribute><id>PM_SYSTEM_IVRM_VPD_MIN_LEVEL</id></attribute>
- <attribute><id>MRW_HW_MIRRORING_ENABLE</id></attribute>
<attribute><id>MRW_STRICT_MBA_PLUG_RULE_CHECKING</id></attribute>
<attribute><id>MNFG_DMI_MIN_EYE_WIDTH</id></attribute>
<attribute><id>MNFG_DMI_MIN_EYE_HEIGHT</id></attribute>
@@ -768,6 +767,9 @@
<attribute><id>MSS_VPD_MT_1_VERSION_DATA</id></attribute>
<attribute><id>MSS_VPD_MT_2_SIGNATURE_DIMM0RANK_DIMM1RANK</id></attribute>
<attribute><id>MSS_VPD_MT_2_SIGNATURE_HASH</id></attribute>
+ <attribute><id>MSS_MRW_DRAM_2N_MODE</id></attribute>
+ <attribute><id>MRW_HW_MIRRORING_ENABLE</id></attribute>
+
<!-- attributes for sbe_start -->
<attribute><id>BOOT_FLAGS</id></attribute>
<attribute><id>NEST_PLL_BUCKET</id></attribute>
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