diff options
| -rw-r--r-- | src/include/sys/misc.h | 2 | ||||
| -rw-r--r-- | src/include/usr/sbe/sbereasoncodes.H | 2 | ||||
| -rw-r--r-- | src/usr/sbe/makefile | 17 | ||||
| -rw-r--r-- | src/usr/sbe/sbe_update.C | 381 | ||||
| -rw-r--r-- | src/usr/sbe/sbe_update.H | 71 | ||||
| -rw-r--r-- | src/usr/sbe/test/sbeupdatetest.H | 62 | ||||
| -rwxr-xr-x | src/usr/targeting/common/xmltohb/target_types.xml | 15 | ||||
| -rw-r--r-- | src/usr/vpd/makefile | 2 |
8 files changed, 492 insertions, 60 deletions
diff --git a/src/include/sys/misc.h b/src/include/sys/misc.h index 12fb89fa4..1d554f56d 100644 --- a/src/include/sys/misc.h +++ b/src/include/sys/misc.h @@ -49,7 +49,7 @@ enum p9SystemConsts /// max possible processors in a P9 system P9_MAX_PROCS = 8, /// max EC (cores available in a processor ) - P9_MAX_EC_PER_PROC = 16, + P9_MAX_EC_PER_PROC = 24, }; diff --git a/src/include/usr/sbe/sbereasoncodes.H b/src/include/usr/sbe/sbereasoncodes.H index b11afef24..380f6b909 100644 --- a/src/include/usr/sbe/sbereasoncodes.H +++ b/src/include/usr/sbe/sbereasoncodes.H @@ -93,7 +93,7 @@ enum sbeReasonCode SBE_INVALID_SEEPROM_SIDE = SBE_COMP_ID | 0x0E, SBE_ECC_FAIL = SBE_COMP_ID | 0x0F, SBE_PERM_SIDE_DIRTY_BAD_PATH = SBE_COMP_ID | 0x10, - SBE_P8_XIP_CUSTOMIZE_UNSUCCESSFUL = SBE_COMP_ID | 0x11, + SBE_P9_XIP_CUSTOMIZE_UNSUCCESSFUL = SBE_COMP_ID | 0x11, SBE_INFO_LOG = SBE_COMP_ID | 0x12, SBE_MISCOMPARE_WITH_MASTER_VERSION = SBE_COMP_ID | 0x13, SBE_ERROR_ON_UPDATE = SBE_COMP_ID | 0x14, diff --git a/src/usr/sbe/makefile b/src/usr/sbe/makefile index 3a2c7e8f5..618e066b8 100644 --- a/src/usr/sbe/makefile +++ b/src/usr/sbe/makefile @@ -39,7 +39,8 @@ HWP_CUSTOMIZE_PATH += ${ROOTPATH}/src/import/chips/p9/procedures/hwp/customize EXTRAINCDIR += ${HWP_CUSTOMIZE_PATH}/ HWP_ACCESSORS_PATH += ${ROOTPATH}/src/import/chips/p9/procedures/hwp/accessors EXTRAINCDIR += ${HWP_ACCESSORS_PATH}/ -EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/xip +HWP_XIP_PATH += ${ROOTPATH}/src/import/chips/p9/xip +EXTRAINCDIR += ${HWP_XIP_PATH}/ UTILS_PATH += ${ROOTPATH}/src/import/chips/p9/utils/imageProcs EXTRAINCDIR += ${UTILS_PATH}/ @@ -49,13 +50,17 @@ OBJS += sbe_resolve_sides.o SUBDIRS += test.d ## NOTE: add a new directory onto the vpaths when you add a new HWP -VPATH += ${HWP_CUSTOMIZE_PATH} ${HWP_ACCESSORS_PATH} ${UTILS_PATH} +VPATH += ${HWP_CUSTOMIZE_PATH} ${HWP_ACCESSORS_PATH} ${HWP_XIP_PATH} +VPATH += ${UTILS_PATH} include ${ROOTPATH}/procedure.rules.mk -#include ${HWP_CUSTOMIZE_PATH}/p9_xip_customize.mk @TODO RTC:158044 -#include ${HWP_ACCESSORS_PATH}/p9_get_mvpd_ring.mk @TODO RTC:158044 -#include ${HWP_ACCESSORS_PATH}/p9_mvpd_ring_funcs.mk @TODO RTC:158044 -#include ${UTILS_PATH}/p9_scan_compression.mk @TODO RTC:158044 +include ${HWP_CUSTOMIZE_PATH}/p9_xip_customize.mk +include ${HWP_ACCESSORS_PATH}/p9_get_mvpd_ring.mk +include ${HWP_ACCESSORS_PATH}/p9_mvpd_ring_funcs.mk +include ${HWP_XIP_PATH}/p9_xip_image.mk +include ${UTILS_PATH}/p9_ring_identification.mk +include ${UTILS_PATH}/p9_scan_compression.mk +include ${UTILS_PATH}/p9_tor.mk include ${ROOTPATH}/config.mk diff --git a/src/usr/sbe/sbe_update.C b/src/usr/sbe/sbe_update.C index 5de3968a0..c1bc352d8 100644 --- a/src/usr/sbe/sbe_update.C +++ b/src/usr/sbe/sbe_update.C @@ -740,10 +740,14 @@ namespace SBE void* io_imgPtr, size_t& o_actImgSize) { - // @TODO RTC:158044 Code removed after earlier review comment may still - // be needed. Use Story 158044 to replace. errlHndl_t err = NULL; uint32_t tmpImgSize = static_cast<uint32_t>(i_maxImgSize); + fapi2::ReturnCode rc_fapi = fapi2::FAPI2_RC_SUCCESS; + uint32_t coreMask = 0x00FFFFFF; // Bits(8:31) = EC00:EC23 + size_t maxCores = P9_MAX_EC_PER_PROC; + int coreCount = 0; + uint32_t procIOMask = 0; + bool procedure_success = false; TRACUCOMP( g_trac_sbe, ENTER_MRK"procCustomizeSbeImg(): uid=0x%X, i_sbePnorPtr= " @@ -757,52 +761,341 @@ namespace SBE const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> l_fapiTarg(i_target); -#if 0 //temporary removal p9_xip_customize HWP fails - uint8_t l_ringSectionBuf[MAX_SEEPROM_IMAGE_SIZE]; - uint32_t l_bootCoreMask = 0xFFFFFFFF; - uint32_t l_ringSectionBufSize = MAX_SEEPROM_IMAGE_SIZE; - FAPI_INVOKE_HWP( err, - p9_xip_customize, - l_fapiTarg, - i_sbePnorPtr, //image in - tmpImgSize, - (void*)l_ringSectionBuf, - l_ringSectionBufSize, - SYSPHASE_HB_SBE, - MODEBUILD_IPL, - (void*)RING_BUF1_VADDR, - (uint32_t)MAX_RING_BUF_SIZE, - (void*)RING_BUF2_VADDR, - (uint32_t)MAX_RING_BUF_SIZE, - l_bootCoreMask ); - /* @TODO RTC:138226 */ -#endif + // The p9_xip_customize() procedure tries to include as much core + // information as possible, but is limited by SBE Image size + // constraints. + // First, maximize core mask for the target + // Then loop on the procedure call, where the loop is designed to + // remove the number of cores passed into p9_xip_customize() until + // an image can be created successfully. + + // Maximize Core mask for this target + err = selectBestCores(i_target, + maxCores, + coreMask); + if(err) + { + TRACFCOMP( g_trac_sbe, ERR_MRK"procCustomizeSbeImg() - " + "selectBestCores() failed rc=0x%X. " + "MaxCores=0x%.8X. HUID=0x%X. Aborting " + "Customization of SBE Image", + err->reasonCode(), maxCores, + TARGETING::get_huid(i_target)); + break; + } - if ( err ) + // setup loop parameters + coreCount = __builtin_popcount(coreMask); + procIOMask = coreMask; + + while( coreCount >= 0 ) { - TRACFCOMP(g_trac_sbe, - ERR_MRK"procCustomizeSbeImg() - " - "p9_xip_customize HWP failed rc=0x%X. " - "HUID=0x%X. Aborting Customization of SBE Image", - err->reasonCode(), - TARGETING::get_huid(i_target)); + if( !INITSERVICE::spBaseServicesEnabled() ) // FSP not present ==> ok to call @TODO RTC:160466 + { + uint8_t l_ringSectionBuf[MAX_SEEPROM_IMAGE_SIZE]; + uint32_t l_ringSectionBufSize = MAX_SEEPROM_IMAGE_SIZE; + FAPI_EXEC_HWP( rc_fapi, + p9_xip_customize, + l_fapiTarg, + i_sbePnorPtr, //image in + tmpImgSize, + (void*)l_ringSectionBuf, + l_ringSectionBufSize, + SYSPHASE_HB_SBE, + MODEBUILD_IPL, + (void*)RING_BUF1_VADDR, + (uint32_t)MAX_RING_BUF_SIZE, + (void*)RING_BUF2_VADDR, + (uint32_t)MAX_RING_BUF_SIZE, + procIOMask ); // Bits(8:31) = EC00:EC23 + } // @TODO RTC:160466 remove conditional wrapping this call + + // Check the return code + if ( !rc_fapi ) + { + // Procedure was successful + procedure_success = true; + + o_actImgSize = static_cast<size_t>(tmpImgSize); + + TRACUCOMP( g_trac_sbe, "procCustomizeSbeImg(): " + "p9_xip_customize success=%d, procIOMask=0x%X " + "o_actImgSize=0x%X, rc_fapi=0x%X", + procedure_success, procIOMask, o_actImgSize, + uint32_t(rc_fapi)); - // There was an error, so break here + // exit loop + break; + } + /* @TODO RTC:138226 RC does not exist in P9 yet, + need to check if it will exist */ + // Look for a specific return code + else if ( rc_fapi.isRC( + fapi2::RC_XIPC_IMAGE_WOULD_OVERFLOW) ) + { + // This is a specific return code from p9_xip_customize + // where the cores sent in couldn't fit, but possibly + // a different procIOMask would work + + TRACFCOMP( g_trac_sbe, + ERR_MRK"procCustomizeSbeImg(): FAPI_EXEC_HWP(" + "p9_xip_customize) returned rc=0x%X, " + "XIPC_IMAGE_WOULD_OVERFLOW-Retry " + "MaxCores=0x%.8X. HUID=0x%X. coreMask=0x%.8X, " + "procIOMask=0x%.8X. coreCount=%d", + uint32_t(rc_fapi), maxCores, + TARGETING::get_huid(i_target), + coreMask, procIOMask, coreCount); + + // Setup for next loop - update coreMask + err = selectBestCores(i_target, + --coreCount, + procIOMask); + + if ( err ) + { + TRACFCOMP(g_trac_sbe, + ERR_MRK"procCustomizeSbeImg() - " + "selectBestCores() failed rc=0x%X. " + "coreCount=0x%.8X. HUID=0x%X. Aborting " + "Customization of SBE Image", + err->reasonCode(), coreCount, + TARGETING::get_huid(i_target)); + + // break from while loop + break; + } + + TRACFCOMP( g_trac_sbe, "procCustomizeSbeImg(): for " + "next loop: procIOMask=0x%.8X, coreMask=" + "0x%.8X, coreCount=%d", + procIOMask, coreMask, coreCount); + + // No break - keep looping + } + else + { + // Unexpected return code - create err and fail + TRACFCOMP( g_trac_sbe, + ERR_MRK"procCustomizeSbeImg(): FAPI_EXEC_HWP(" + "p9_xip_customize) failed with rc=0x%X, " + "MaxCores=0x%X. HUID=0x%X. coreMask=0x%.8X, " + "procIOMask=0x%.8X. coreCount=%d. Create " + "err and break loop", + uint32_t(rc_fapi), maxCores, + TARGETING::get_huid(i_target), + coreMask, procIOMask, coreCount); + + err = rcToErrl(rc_fapi); + + ERRORLOG::ErrlUserDetailsTarget(i_target, + "Proc Target") + .addToLog(err); + err->collectTrace(SBE_COMP_NAME, 256); + + // break from while loop + break; + } + } // end of while loop + + if(err) + { + // There was a previous error, so break here break; } - o_actImgSize = static_cast<size_t>(tmpImgSize); + if ( procedure_success == false ) + { + // No err, but exit from while loop before successful + TRACFCOMP( g_trac_sbe, ERR_MRK"procCustomizeSbeImg() - " + "Failure to successfully complete p9_xip_customize()" + ". HUID=0x%X, rc=0x%X, coreCount=%d, coreMask=0x%.8X" + " procIOMask=0x%.8X, maxCores=0x%X", + TARGETING::get_huid(i_target), ERRL_GETRC_SAFE(err), + coreCount, coreMask, procIOMask, maxCores); + /*@ + * @errortype + * @moduleid SBE_CUSTOMIZE_IMG + * @reasoncode SBE_P9_XIP_CUSTOMIZE_UNSUCCESSFUL + * @userdata1[0:31] procIOMask in/out parameter + * @userdata1[32:63] rc of procedure + * @userdata2[0:31] coreMask of target + * @userdata2[32:63] coreCount - updated on the loops + * @devdesc Unsuccessful in creating Customized SBE Image + * @custdesc A problem occurred while updating processor + * boot code. + */ + err = new ErrlEntry(ERRL_SEV_UNRECOVERABLE, + SBE_CUSTOMIZE_IMG, + SBE_P9_XIP_CUSTOMIZE_UNSUCCESSFUL, + TWO_UINT32_TO_UINT64(procIOMask, + ERRL_GETRC_SAFE(err)), + TWO_UINT32_TO_UINT64(coreMask, + coreCount)); + + ErrlUserDetailsTarget(i_target + ).addToLog(err); + err->collectTrace("FAPI", 256); + err->collectTrace(SBE_COMP_NAME, 256); + err->addProcedureCallout( HWAS::EPUB_PRC_HB_CODE, + HWAS::SRCI_PRIORITY_HIGH ); + } }while(0); TRACUCOMP( g_trac_sbe, EXIT_MRK"procCustomizeSbeImg(): io_imgPtr=%p, " - "o_actImgSize=0x%X, RC=0x%X", - io_imgPtr, o_actImgSize, ERRL_GETRC_SAFE(err) ); + "o_actImgSize=0x%X, RC=0x%X, procedure_success=%d", + io_imgPtr, o_actImgSize, ERRL_GETRC_SAFE(err), + procedure_success ); + + return err; + } + + +///////////////////////////////////////////////////////////////////// + errlHndl_t selectBestCores(TARGETING::Target* i_target, + size_t i_maxCores, + uint32_t& o_coreMask) + { + TRACUCOMP( g_trac_sbe, + ENTER_MRK"selectBestCores(i_maxCores=0x%.8X)", + i_maxCores); + + errlHndl_t err = NULL; + const uint32_t chipUnitMask = 0x00800000; // Bits(8:31) = EC00:EC23 + uint32_t manGuardEcs = 0x00000000; + uint32_t remainingEcs = 0x00000000; + uint32_t coreCount = 0; + uint32_t deconfigByEid = 0; + + o_coreMask = 0x00000000; + + do{ + + // Special case: if i_maxCores == 0 don't loop through cores + if (unlikely(i_maxCores == 0 )) + { + break; + } + + // find all CORE chiplets of the proc + TARGETING::TargetHandleList l_coreTargetList; + TARGETING::getChildAffinityTargetsByState( l_coreTargetList, + i_target, + CLASS_UNIT, + TYPE_CORE, + UTIL_FILTER_PRESENT); + + //Sort through cores + for( const auto & l_core_target: l_coreTargetList ) + { + uint8_t chipUnit = l_core_target-> + getAttr<TARGETING::ATTR_CHIP_UNIT>(); + + if(l_core_target-> + getAttr<TARGETING::ATTR_HWAS_STATE>().functional) + { + o_coreMask |= (chipUnitMask >> chipUnit); + coreCount++; + } + else + { + //If non-functional due to FCO or Manual gard, + //add it to list of cores to include if + //more are needed + + deconfigByEid = l_core_target-> + getAttr<TARGETING::ATTR_HWAS_STATE>(). + deconfiguredByEid; + if( + // FCO + (deconfigByEid == + HWAS::DeconfigGard::DECONFIGURED_BY_FIELD_CORE_OVERRIDE) + || // Manual GARD + (deconfigByEid == + HWAS::DeconfigGard::DECONFIGURED_BY_MANUAL_GARD) + ) + { + manGuardEcs |= (chipUnitMask >> chipUnit); + } + // Add it to the 'remaining' list in case + // more are needed + else + { + remainingEcs |= (chipUnitMask >> chipUnit); + } + + } + } // end core target loop + + if(coreCount == i_maxCores) + { + //We've found the exact amount, break out of function + break; + } + + else if(coreCount > i_maxCores) + { + //We have too many, so need to trim + o_coreMask = trimBitMask(o_coreMask, + i_maxCores); + break; + } + + else + { + // We need to add 'other' cores + TRACUCOMP( g_trac_sbe,INFO_MRK"selectBestCores: non-functional " + "cores needed for bit mask: coreCount=%d, " + "i_maxCores=%d, o_coreMask=0x%.8X, " + "manGuardEcs=0x%.8X, remainingEcs=0x%.8X", + coreCount, i_maxCores, o_coreMask, manGuardEcs, + remainingEcs ); + } + + // Add more 'good' cores. + manGuardEcs = trimBitMask(manGuardEcs, + i_maxCores-coreCount); + o_coreMask |= manGuardEcs; + coreCount = __builtin_popcount(o_coreMask); + TRACUCOMP( g_trac_sbe,INFO_MRK"selectBestCores: trimBitMask " + "manGuardEcs=0x%.8X", manGuardEcs); + + if(coreCount >= i_maxCores) + { + //We've found enough, break out of function + break; + } + + // If we still need more, add 'remaining' cores + // Get Target Service + // System target check done earlier, so no assert check necessary + TargetService& tS = targetService(); + TARGETING::Target* sys = NULL; + (void) tS.getTopLevelTarget( sys ); + + uint32_t min_cores = 1 /* sys->getAttr<ATTR_SBE_IMAGE_MINIMUM_VALID_EXS>() @TODO RTC:138226 */ ; + if ( coreCount < min_cores ) + { + remainingEcs = trimBitMask(remainingEcs, + min_cores-coreCount); + o_coreMask |= remainingEcs; + TRACUCOMP( g_trac_sbe,INFO_MRK"selectBestCores: trimBitMask " + "remainingEcs=0x%.8X, min_cores=%d", + remainingEcs, min_cores); + } + + }while(0); + + TRACUCOMP( g_trac_sbe, + EXIT_MRK"selectBestCores(o_coreMask=0x%.8X)", + o_coreMask); return err; } + ///////////////////////////////////////////////////////////////////// errlHndl_t getSetMVPDVersion(TARGETING::Target* i_target, opType_t i_op, @@ -2883,6 +3176,28 @@ namespace SBE } +///////////////////////////////////////////////////////////////////// + uint32_t trimBitMask(uint32_t i_mask, + size_t i_maxBits) + { + TRACDCOMP( g_trac_sbe, + ENTER_MRK"trimBitMask(i_mask=0x%.8X, i_maxBits=0x%.8X)", + i_mask, i_maxBits); + uint32_t retMask = i_mask; + + while(__builtin_popcount(retMask) > static_cast<int32_t>(i_maxBits)) + { + retMask ^= (0x80000000 >> + static_cast<uint32_t>(__builtin_clz(retMask))); + } + + TRACDCOMP( g_trac_sbe, + EXIT_MRK"trimBitMask(): retMask=0x%.8X", + retMask); + + return retMask; + } + ///////////////////////////////////////////////////////////////////// errlHndl_t createSbeImageVmmSpace(void) diff --git a/src/usr/sbe/sbe_update.H b/src/usr/sbe/sbe_update.H index 18fb8e10e..bbeb105ba 100644 --- a/src/usr/sbe/sbe_update.H +++ b/src/usr/sbe/sbe_update.H @@ -131,7 +131,7 @@ namespace SBE /* Enums */ /******************************************/ enum { - FIXED_SEEPROM_WORK_SPACE = 128 * 1024, + FIXED_SEEPROM_WORK_SPACE = 256 * 1024, SBE_IMG_VADDR = VMM_VADDR_SBE_UPDATE, RING_BUF1_VADDR = FIXED_SEEPROM_WORK_SPACE + SBE_IMG_VADDR, RING_BUF2_VADDR = RING_BUF1_VADDR + FIXED_RING_BUF_SIZE, @@ -537,6 +537,45 @@ namespace SBE /** + * @brief Select best cores to include in SBE Image. + * The output is used to indicate to p8_xip_customize which cores + * should be included in the SBE image. + * + * @param[in] i_target Target processor to use for core selection + * + * @param[in] i_maxCores Maximum number of cores to select for inclusion + * in the SBE Image + * + * @param[out] o_coreMask Core Mask for the target that does not exceed + * the maximum number of cores + * NOTE: bits 8:31 = EC00:EC23 + * This value is used as input into + * p9_xip_customize.C + * + * @return errlHndl_t Error log handle on failure. + */ + errlHndl_t selectBestCores(TARGETING::Target* i_target, + size_t i_maxCores, + uint32_t& o_coreMask); + + + /** + * @brief Reduces bits set in a bit mask until there is a + * a maximum number of bits set. + * NOTE: bits removed left-to-right + * + * @param[in] i_mask Starting mask to be reduced + * + * @param[in] i_maxBits Maximum number of bits that the + * returned Bit Mask can contain + * + * @return uint32_t Bit Mask + */ + uint32_t trimBitMask(uint32_t i_mask, + size_t i_maxBits); + + + /** * @brief Checks the Nest Frequency value stored in the the version struct * and compares it ot the NEST_FREQ_MHZ attribute of the system * @@ -556,16 +595,16 @@ namespace SBE /** * @brief Calculates ECC size for a block of code or data allowing for - * padding at device boundaries so 9-byte segment (8 bytes of code + * padding at chip boundaries so 9-byte segment (8 bytes of code * or data and 1 byte of ECC) does not straddle the boundary. * - * @param[in] i_srcSz Size of source code or data + * @param[in] i_srcSz Size of source (code or data) * * @param[in] i_offset Offset into device for storing destination * - * @param[in] i_boundary Device boundary + * @param[in] i_boundary Chip boundary * - * @return Size of source code or data with ECC and padding + * @return Size of source (code or data) with ECC and padding */ size_t setECCSize(size_t i_srcSz, const uint64_t i_offset = SBE_IMAGE_SEEPROM_ADDRESS, @@ -573,19 +612,19 @@ namespace SBE /** - * @brief Injects ECC into a block of code or data. Pads output at device + * @brief Injects ECC into a block of code or data. Pads output at chip * boundaries so 9-byte segment (8 bytes of code or data and 1 byte * of ECC) does not straddle the boundary. * - * @param[in] i_src Location of source code or data without ECC + * @param[in] i_src Location of source (code or data) without ECC * - * @param[in] i_srcSz Size of source code or data + * @param[in] i_srcSz Size of source (code or data) * * @param[in] i_offset Offset into device for storing destination * - * @param[in] i_boundary Device boundary + * @param[in] i_boundary Chip boundary within the device * - * @param[out] o_dst Location of destination code or data with ECC + * @param[out] o_dst Location of destination (code or data) with ECC * * @return void */ @@ -598,19 +637,19 @@ namespace SBE /** * @brief Removes ECC from a block of code or data. Removes padding at - * device boundaries where 9-byte segment (8 bytes of code or data - * and 1 byte of ECC) was moved to next device so as to not straddle + * chip boundaries where 9-byte segment (8 bytes of code or data + * and 1 byte of ECC) was moved to next chip so as to not straddle * the boundary. * - * @param[in/out] io_src Location of source code or data with ECC + * @param[in/out] io_src Location of source (code or data) with ECC * - * @param[out] o_dst Location of destination code or data without ECC + * @param[out] o_dst Location of destination (code or data) without ECC * - * @param[in] i_dstSz Size of destination code or data + * @param[in] i_dstSz Size of destination (code or data) * * @param[in] i_offset Offset into device where source was stored * - * @param[in] i_boundary Device boundary + * @param[in] i_boundary Chip boundary * * @return eccStatus ECC status from removing ECC. */ diff --git a/src/usr/sbe/test/sbeupdatetest.H b/src/usr/sbe/test/sbeupdatetest.H index 8160fc3b6..2a2383a74 100644 --- a/src/usr/sbe/test/sbeupdatetest.H +++ b/src/usr/sbe/test/sbeupdatetest.H @@ -182,8 +182,66 @@ class SBEUpdateTest: public CxxTest::TestSuite { public: - // @TODO RTC:158044 testTrimBitMask removed after earlier review comment - // may still be needed. Use Story 158044 to replace. + /** + * @brief This function will test __trimCoreMask + */ + void testTrimBitMask( void ) + { + + uint64_t fails = 0x0; + uint64_t total = 0x0; + + do{ + + TRACFCOMP( g_trac_sbe, + ENTER_MRK"testTrimBitMask()" ); + + struct + { + uint32_t inMask; + uint32_t maxBits; + uint32_t outMask; + } testData[] = + { + {0xFFFFFFFF, 10, 0x000003FF}, + {0xFFFFFFFF, 32, 0xFFFFFFFF}, + {0x0000FF00, 4, 0x00000F00}, + {0x0000FA30, 3, 0x00000230}, + {0x0000FF00, 8, 0x0000FF00}, + {0x0000FF50, 16, 0x0000FF50}, + {0x0000EC50, 4, 0x00000C50}, + {0x000000FF, 5, 0x0000001F}, + {0x000000FF, 8, 0x000000FF}, + {0x11111111, 5, 0x00011111}, + {0x55555555, 11, 0x00155555}, + }; + const uint32_t NUM_TESTS = sizeof(testData)/sizeof(testData[0]); + + uint32_t retMask = 0; + + for(uint32_t i=0; i < NUM_TESTS; i++) + { + retMask = trimBitMask(testData[i].inMask, + testData[i].maxBits); + total++; + if(retMask != testData[i].outMask) + { + fails++; + TRACFCOMP( g_trac_sbe, ERR_MRK"testTrimBitMask() - i=%d, " + "retMask=0x%.8X, expMask=0x%.8X", + i, retMask, testData[i].outMask); + TS_FAIL("testTrimBitMask() - Return data did not match " + "expected data."); + } + } + + }while(0); + + TRACFCOMP( g_trac_sbe, + EXIT_MRK"testTrimBitMask - %d/%d fails", + fails, total ); + } + /** * @brief This function will test SBE Update's ability diff --git a/src/usr/targeting/common/xmltohb/target_types.xml b/src/usr/targeting/common/xmltohb/target_types.xml index 1d52dd6eb..961e57a9b 100755 --- a/src/usr/targeting/common/xmltohb/target_types.xml +++ b/src/usr/targeting/common/xmltohb/target_types.xml @@ -954,6 +954,7 @@ <attribute><id>EQ_GARD</id></attribute> <attribute><id>EC_GARD</id></attribute> <attribute><id>I2C_BUS_DIV_REF</id></attribute> + <attribute><id>I2C_BUS_DIV_REF_VALID</id></attribute> <attribute><id>NODE_POS</id></attribute> <attribute><id>BOOT_FREQ</id></attribute> <attribute><id>VCS_BOOT_VOLTAGE</id></attribute> @@ -973,6 +974,20 @@ <attribute><id>MC_SYNC_MODE</id></attribute> <attribute><id>CDM_DOMAIN</id><default>FABRIC</default></attribute> <attribute><id>OBUS_RATIO_VALUE</id></attribute> + <attribute><id>FUNCTIONAL_EQ_EC_VALID</id></attribute> + <attribute><id>FW_MODE_FLAGS_VALID</id></attribute> + <attribute><id>ISTEP_MODE</id></attribute> + <attribute><id>SBE_RUNTIME_MODE</id></attribute> + <attribute><id>IS_SP_MODE</id></attribute> + <attribute><id>SBE_FFDC_ENABLE</id></attribute> + <attribute><id>SBE_INTERNAL_FFDC_ENABLE</id></attribute> + <attribute><id>BOOT_FREQUENCY_VALID</id></attribute> + <attribute><id>BOOT_FREQ_MULT</id></attribute> + <attribute><id>HWP_CONTROL_FLAGS_VALID</id></attribute> + <attribute><id>CHIP_SELECTION_VALID</id></attribute> + <attribute><id>CHIP_SELECTION</id></attribute> + <attribute><id>SCRATCH6_VALID</id></attribute> + <attribute><id>SCRATCH7_VALID</id></attribute> <!-- proc_fbc_eff_config_links --> <attribute><id>PROC_FABRIC_X_ATTACHED_LINK_ID</id></attribute> <attribute><id>PROC_FABRIC_X_ATTACHED_CHIP_ID</id></attribute> diff --git a/src/usr/vpd/makefile b/src/usr/vpd/makefile index efd3d9c76..0b58dfbee 100644 --- a/src/usr/vpd/makefile +++ b/src/usr/vpd/makefile @@ -41,7 +41,7 @@ BINARY_FILES = $(IMGDIR)/dimmspd.dat:9852a0ed166442ef69ecd91a0379f282419a371f #found for procs CCIN 54E3 BINARY_FILES += $(IMGDIR)/procmvpd.dat:65759fa4aebd2e3b42b25309504a3007b3b51036 BINARY_FILES += $(IMGDIR)/procmvpd_ven.dat:dd8507bec946283260f82af212ed32feaeb3363a -BINARY_FILES += $(IMGDIR)/procmvpd_p9n.dat:8a2435540db734c6907c94f5f227378b214fd593 +BINARY_FILES += $(IMGDIR)/procmvpd_p9n.dat:63898b079b07fdd997bafc6b3c45af96d1dc40a1 BINARY_FILES += $(IMGDIR)/vpo_sysmvpd.dat:b3b907c2e80b68ffe96e924b9cb0db6735fe4532 BINARY_FILES += $(IMGDIR)/vpo_djvpd.dat:cb2c6de3ad46cdd53605d156e22c4bda8d637a42 |
