diff options
| -rw-r--r-- | src/include/usr/spd/spdenums.H | 279 | ||||
| -rw-r--r-- | src/include/usr/spd/spdreasoncodes.H | 6 | ||||
| -rwxr-xr-x | src/usr/spd/spd.C | 393 | ||||
| -rwxr-xr-x | src/usr/spd/spd.H | 34 | ||||
| -rwxr-xr-x | src/usr/spd/spdDDR3.H | 259 | ||||
| -rwxr-xr-x | src/usr/spd/test/spdtest.H | 240 |
6 files changed, 891 insertions, 320 deletions
diff --git a/src/include/usr/spd/spdenums.H b/src/include/usr/spd/spdenums.H index c685fa99e..b99738cc3 100644 --- a/src/include/usr/spd/spdenums.H +++ b/src/include/usr/spd/spdenums.H @@ -33,79 +33,224 @@ namespace SPD { /** +* @brief Enumerations for the start of each of the different sections of +* keywords available to read. +*/ +enum +{ + SPD_FIRST_NORM_KEYWORD = 0x0, + SPD_FIRST_MOD_SPEC = 0x8000, +}; + +/** * @brief Enumerations for fields that can be accessed in the SPD */ enum { - SPD_FIRST_KEYWORD = 0x00, - CRC_EXCLUDE = SPD_FIRST_KEYWORD, - SPD_BYTES_TOTAL = 0x01, - SPD_BYTES_USED = 0x02, - SPD_MAJOR_REVISION = 0x03, - SPD_MINOR_REVISION = 0x04, - BASIC_MEMORY_TYPE = 0x05, - MODULE_TYPE = 0x06, - BANK_ADDRESS_BITS = 0x07, - DENSITY = 0x08, - ROW_ADDRESS = 0x09, - COL_ADDRESS = 0x0a, - MODULE_NOMINAL_VOLTAGE = 0x0b, - MODULE_RANKS = 0x0c, - MODULE_DRAM_WIDTH = 0x0d, - ECC_BITS = 0x0e, - MODULE_MEMORY_BUS_WIDTH = 0x0f, - FTB_DIVIDEND = 0x10, - FTB_DIVISOR = 0x11, - MTB_DIVIDEND = 0x12, - MTB_DIVISOR = 0x13, - TCK_MIN = 0x14, - CAS_LATENCIES_SUPPORTED = 0x15, - MIN_CAS_LATENCY = 0x16, - TWR_MIN = 0x17, - TRCD_MIN = 0x18, - TRRD_MIN = 0x19, - TRP_MIN = 0x1a, - TRC_MIN = 0x1b, - TRAS_MIN = 0x1c, - TRFC_MIN = 0x1d, - TWTR_MIN = 0x1e, - TRTP_MIN = 0x1f, - TFAW_MIN = 0x20, - DLL_OFF = 0x21, - RZQ_7 = 0x22, - RZQ_6 = 0x23, - PASR = 0x24, - ODTS = 0x25, - ASR = 0x26, - ETR_1X = 0x27, - ETR = 0x28, - THERMAL_SENSOR_PRESENT = 0x29, - THERMAL_SENSOR_ACCURACY = 0x2a, - SDRAM_DEVICE_TYPE_NONSTD = 0x2b, - SDRAM_DEVICE_TYPE = 0x2c, - MODULE_TYPE_SPECIFIC_SECTION = 0x2d, - MODULE_MANUFACTURER_ID = 0x2e, - MODULE_MANUFACTURING_LOCATION = 0x2f, - MODULE_MANUFACTURING_DATE = 0x30, - MODULE_SERIAL_NUMBER = 0x31, - MODULE_CRC = 0x32, - MODULE_PART_NUMBER = 0x33, - MODULE_REVISION_CODE = 0x34, - DRAM_MANUFACTURER_ID = 0x35, - MANUFACTURER_SPECIFIC_DATA = 0x36, - TCKMIN_FINE_OFFSET = 0x37, - TAAMIN_FINE_OFFSET = 0x38, - TRCDMIN_FINE_OFFSET = 0x39, - TRPMIN_FINE_OFFSET = 0x3a, - TRPCMIN_FINE_OFFSET = 0x3b, - MODULE_THERMAL_SENSOR = 0x3c, - SDRAM_OPTIONAL_FEATURES = 0x3d, - SDRAM_THERMAL_REFRESH_OPTIONS = 0x3e, - DIMM_BAD_DQ_DATA = 0x3f, + // ============================================================== + // Normal SPD Kewords + CRC_EXCLUDE = SPD_FIRST_NORM_KEYWORD | 0x00, + SPD_BYTES_TOTAL = SPD_FIRST_NORM_KEYWORD | 0x01, + SPD_BYTES_USED = SPD_FIRST_NORM_KEYWORD | 0x02, + SPD_MAJOR_REVISION = SPD_FIRST_NORM_KEYWORD | 0x03, + SPD_MINOR_REVISION = SPD_FIRST_NORM_KEYWORD | 0x04, + BASIC_MEMORY_TYPE = SPD_FIRST_NORM_KEYWORD | 0x05, + MODULE_TYPE = SPD_FIRST_NORM_KEYWORD | 0x06, + BANK_ADDRESS_BITS = SPD_FIRST_NORM_KEYWORD | 0x07, + DENSITY = SPD_FIRST_NORM_KEYWORD | 0x08, + ROW_ADDRESS = SPD_FIRST_NORM_KEYWORD | 0x09, + COL_ADDRESS = SPD_FIRST_NORM_KEYWORD | 0x0a, + MODULE_NOMINAL_VOLTAGE = SPD_FIRST_NORM_KEYWORD | 0x0b, + MODULE_RANKS = SPD_FIRST_NORM_KEYWORD | 0x0c, + MODULE_DRAM_WIDTH = SPD_FIRST_NORM_KEYWORD | 0x0d, + ECC_BITS = SPD_FIRST_NORM_KEYWORD | 0x0e, + MODULE_MEMORY_BUS_WIDTH = SPD_FIRST_NORM_KEYWORD | 0x0f, + FTB_DIVIDEND = SPD_FIRST_NORM_KEYWORD | 0x10, + FTB_DIVISOR = SPD_FIRST_NORM_KEYWORD | 0x11, + MTB_DIVIDEND = SPD_FIRST_NORM_KEYWORD | 0x12, + MTB_DIVISOR = SPD_FIRST_NORM_KEYWORD | 0x13, + TCK_MIN = SPD_FIRST_NORM_KEYWORD | 0x14, + CAS_LATENCIES_SUPPORTED = SPD_FIRST_NORM_KEYWORD | 0x15, + MIN_CAS_LATENCY = SPD_FIRST_NORM_KEYWORD | 0x16, + TWR_MIN = SPD_FIRST_NORM_KEYWORD | 0x17, + TRCD_MIN = SPD_FIRST_NORM_KEYWORD | 0x18, + TRRD_MIN = SPD_FIRST_NORM_KEYWORD | 0x19, + TRP_MIN = SPD_FIRST_NORM_KEYWORD | 0x1a, + TRC_MIN = SPD_FIRST_NORM_KEYWORD | 0x1b, + TRAS_MIN = SPD_FIRST_NORM_KEYWORD | 0x1c, + TRFC_MIN = SPD_FIRST_NORM_KEYWORD | 0x1d, + TWTR_MIN = SPD_FIRST_NORM_KEYWORD | 0x1e, + TRTP_MIN = SPD_FIRST_NORM_KEYWORD | 0x1f, + TFAW_MIN = SPD_FIRST_NORM_KEYWORD | 0x20, + DLL_OFF = SPD_FIRST_NORM_KEYWORD | 0x21, + RZQ_7 = SPD_FIRST_NORM_KEYWORD | 0x22, + RZQ_6 = SPD_FIRST_NORM_KEYWORD | 0x23, + PASR = SPD_FIRST_NORM_KEYWORD | 0x24, + ODTS = SPD_FIRST_NORM_KEYWORD | 0x25, + ASR = SPD_FIRST_NORM_KEYWORD | 0x26, + ETR_1X = SPD_FIRST_NORM_KEYWORD | 0x27, + ETR = SPD_FIRST_NORM_KEYWORD | 0x28, + THERMAL_SENSOR_PRESENT = SPD_FIRST_NORM_KEYWORD | 0x29, + THERMAL_SENSOR_ACCURACY = SPD_FIRST_NORM_KEYWORD | 0x2a, + SDRAM_DEVICE_TYPE_NONSTD = SPD_FIRST_NORM_KEYWORD | 0x2b, + SDRAM_DEVICE_TYPE = SPD_FIRST_NORM_KEYWORD | 0x2c, + MODULE_TYPE_SPECIFIC_SECTION = SPD_FIRST_NORM_KEYWORD | 0x2d, + MODULE_MANUFACTURER_ID = SPD_FIRST_NORM_KEYWORD | 0x2e, + MODULE_MANUFACTURING_LOCATION = SPD_FIRST_NORM_KEYWORD | 0x2f, + MODULE_MANUFACTURING_DATE = SPD_FIRST_NORM_KEYWORD | 0x30, + MODULE_SERIAL_NUMBER = SPD_FIRST_NORM_KEYWORD | 0x31, + MODULE_CRC = SPD_FIRST_NORM_KEYWORD | 0x32, + MODULE_PART_NUMBER = SPD_FIRST_NORM_KEYWORD | 0x33, + MODULE_REVISION_CODE = SPD_FIRST_NORM_KEYWORD | 0x34, + DRAM_MANUFACTURER_ID = SPD_FIRST_NORM_KEYWORD | 0x35, + MANUFACTURER_SPECIFIC_DATA = SPD_FIRST_NORM_KEYWORD | 0x36, + TCKMIN_FINE_OFFSET = SPD_FIRST_NORM_KEYWORD | 0x37, + TAAMIN_FINE_OFFSET = SPD_FIRST_NORM_KEYWORD | 0x38, + TRCDMIN_FINE_OFFSET = SPD_FIRST_NORM_KEYWORD | 0x39, + TRPMIN_FINE_OFFSET = SPD_FIRST_NORM_KEYWORD | 0x3a, + TRCMIN_FINE_OFFSET = SPD_FIRST_NORM_KEYWORD | 0x3b, + MODULE_THERMAL_SENSOR = SPD_FIRST_NORM_KEYWORD | 0x3c, + SDRAM_OPTIONAL_FEATURES = SPD_FIRST_NORM_KEYWORD | 0x3d, + SDRAM_THERMAL_REFRESH_OPTIONS = SPD_FIRST_NORM_KEYWORD | 0x3e, + DIMM_BAD_DQ_DATA = SPD_FIRST_NORM_KEYWORD | 0x3f, + SPD_LAST_NORM_KEYWORD, - // This keyword should be last in the list - SPD_LAST_KEYWORD, + // ============================================================== + // Module Specific Keywords + MODSPEC_COM_NOM_HEIGHT_MAX = SPD_FIRST_MOD_SPEC | 0x00, + MODSPEC_COM_MAX_THICK_BACK = SPD_FIRST_MOD_SPEC | 0x01, + MODSPEC_COM_MAX_THICK_FRONT = SPD_FIRST_MOD_SPEC | 0x02, + MODSPEC_COM_RAW_CARD_EXT = SPD_FIRST_MOD_SPEC | 0x03, + MODSPEC_COM_RAW_CARD_REV = SPD_FIRST_MOD_SPEC | 0x04, + MODSPEC_COM_RAW_CARD = SPD_FIRST_MOD_SPEC | 0x05, + MODSPEC_COM_ADDR_MAPPING = SPD_FIRST_MOD_SPEC | 0x06, + RMM_ROWS_RDIMM = SPD_FIRST_MOD_SPEC | 0x07, + RMM_REGS_RDIMM = SPD_FIRST_MOD_SPEC | 0x08, + RMM_HEAT_SP = SPD_FIRST_MOD_SPEC | 0x09, + RMM_HEAT_SP_CHARS = SPD_FIRST_MOD_SPEC | 0x0a, + RMM_MFR_ID_CODE = SPD_FIRST_MOD_SPEC | 0x0b, + RMM_REG_REV_NUM = SPD_FIRST_MOD_SPEC | 0x0c, + RMM_REG_TYPE = SPD_FIRST_MOD_SPEC | 0x0d, + RMM_RC1 = SPD_FIRST_MOD_SPEC | 0x0e, + RMM_RC0 = SPD_FIRST_MOD_SPEC | 0x0f, + RMM_RC3 = SPD_FIRST_MOD_SPEC | 0x10, + RMM_RC2 = SPD_FIRST_MOD_SPEC | 0x11, + RMM_RC5 = SPD_FIRST_MOD_SPEC | 0x12, + RMM_RC4 = SPD_FIRST_MOD_SPEC | 0x13, + RMM_RC7 = SPD_FIRST_MOD_SPEC | 0x14, + RMM_RC6 = SPD_FIRST_MOD_SPEC | 0x15, + RMM_RC9 = SPD_FIRST_MOD_SPEC | 0x16, + RMM_RC8 = SPD_FIRST_MOD_SPEC | 0x17, + RMM_RC11 = SPD_FIRST_MOD_SPEC | 0x18, + RMM_RC10 = SPD_FIRST_MOD_SPEC | 0x19, + RMM_RC13 = SPD_FIRST_MOD_SPEC | 0x1a, + RMM_RC12 = SPD_FIRST_MOD_SPEC | 0x1b, + RMM_RC15 = SPD_FIRST_MOD_SPEC | 0x1c, + RMM_RC14 = SPD_FIRST_MOD_SPEC | 0x1d, + LRMM_HEAT_SP = SPD_FIRST_MOD_SPEC | 0x1e, + LRMM_RANK_NUMBERING = SPD_FIRST_MOD_SPEC | 0x1f, + LRMM_MEMBUF_ORIEN = SPD_FIRST_MOD_SPEC | 0x20, + LRMM_NUM_ROWS = SPD_FIRST_MOD_SPEC | 0x21, + LRMM_MIRRORING = SPD_FIRST_MOD_SPEC | 0x22, + LRMM_REVISION_NUM = SPD_FIRST_MOD_SPEC | 0x23, + LRMM_MFR_ID_CODE = SPD_FIRST_MOD_SPEC | 0x24, + LRMM_F0RC3 = SPD_FIRST_MOD_SPEC | 0x25, + LRMM_F0RC2 = SPD_FIRST_MOD_SPEC | 0x26, + LRMM_F0RC5 = SPD_FIRST_MOD_SPEC | 0x27, + LRMM_F0RC4 = SPD_FIRST_MOD_SPEC | 0x28, + LRMM_F1RC11 = SPD_FIRST_MOD_SPEC | 0x29, + LRMM_F1RC8 = SPD_FIRST_MOD_SPEC | 0x2a, + LRMM_F1RC13 = SPD_FIRST_MOD_SPEC | 0x2b, + LRMM_F1RC12 = SPD_FIRST_MOD_SPEC | 0x2c, + LRMM_F1RC15 = SPD_FIRST_MOD_SPEC | 0x2d, + LRMM_F1RC14 = SPD_FIRST_MOD_SPEC | 0x2e, + LRMM_F3RC9_800_1600 = SPD_FIRST_MOD_SPEC | 0x2f, + LRMM_F3RC8_800_1600 = SPD_FIRST_MOD_SPEC | 0x30, + LRMM_F4RC11_800_1600 = SPD_FIRST_MOD_SPEC | 0x31, + LRMM_F3RC11_800_1600 = SPD_FIRST_MOD_SPEC | 0x32, + LRMM_F4RC10_800_1600 = SPD_FIRST_MOD_SPEC | 0x33, + LRMM_F3RC10_800_1600 = SPD_FIRST_MOD_SPEC | 0x34, + LRMM_F6RC11_800_1600 = SPD_FIRST_MOD_SPEC | 0x35, + LRMM_F5RC11_800_1600 = SPD_FIRST_MOD_SPEC | 0x36, + LRMM_F6RC10_800_1600 = SPD_FIRST_MOD_SPEC | 0x37, + LRMM_F5RC10_800_1600 = SPD_FIRST_MOD_SPEC | 0x38, + LRMM_F8RC11_800_1600 = SPD_FIRST_MOD_SPEC | 0x39, + LRMM_F7RC11_800_1600 = SPD_FIRST_MOD_SPEC | 0x3a, + LRMM_F8RC10_800_1600 = SPD_FIRST_MOD_SPEC | 0x3b, + LRMM_F7RC10_800_1600 = SPD_FIRST_MOD_SPEC | 0x3c, + LRMM_F10RC11_800_1600 = SPD_FIRST_MOD_SPEC | 0x3d, + LRMM_F9RC11_800_1600 = SPD_FIRST_MOD_SPEC | 0x3e, + LRMM_F10RC10_800_1600 = SPD_FIRST_MOD_SPEC | 0x3f, + LRMM_F9RC10_800_1600 = SPD_FIRST_MOD_SPEC | 0x40, + LRMM_RTT_WR_800_1600 = SPD_FIRST_MOD_SPEC | 0x41, + LRMM_RTT_NOM_800_1600 = SPD_FIRST_MOD_SPEC | 0x42, + LRMM_IMPEDANCE_800_1600 = SPD_FIRST_MOD_SPEC | 0x43, + LRMM_F3RC9_1333_1600 = SPD_FIRST_MOD_SPEC | 0x44, + LRMM_F3RC8_1333_1600 = SPD_FIRST_MOD_SPEC | 0x45, + LRMM_F4RC11_1333_1600 = SPD_FIRST_MOD_SPEC | 0x46, + LRMM_F3RC11_1333_1600 = SPD_FIRST_MOD_SPEC | 0x47, + LRMM_F4RC10_1333_1600 = SPD_FIRST_MOD_SPEC | 0x48, + LRMM_F3RC10_1333_1600 = SPD_FIRST_MOD_SPEC | 0x49, + LRMM_F6RC11_1333_1600 = SPD_FIRST_MOD_SPEC | 0x4a, + LRMM_F5RC11_1333_1600 = SPD_FIRST_MOD_SPEC | 0x4b, + LRMM_F6RC10_1333_1600 = SPD_FIRST_MOD_SPEC | 0x4c, + LRMM_F5RC10_1333_1600 = SPD_FIRST_MOD_SPEC | 0x4d, + LRMM_F8RC11_1333_1600 = SPD_FIRST_MOD_SPEC | 0x4e, + LRMM_F7RC11_1333_1600 = SPD_FIRST_MOD_SPEC | 0x4f, + LRMM_F8RC10_1333_1600 = SPD_FIRST_MOD_SPEC | 0x50, + LRMM_F7RC10_1333_1600 = SPD_FIRST_MOD_SPEC | 0x51, + LRMM_F10RC11_1333_1600 = SPD_FIRST_MOD_SPEC | 0x52, + LRMM_F9RC11_1333_1600 = SPD_FIRST_MOD_SPEC | 0x53, + LRMM_F10RC10_1333_1600 = SPD_FIRST_MOD_SPEC | 0x54, + LRMM_F9RC10_1333_1600 = SPD_FIRST_MOD_SPEC | 0x55, + LRMM_RTT_WR_1333_1600 = SPD_FIRST_MOD_SPEC | 0x56, + LRMM_RTT_NOM_1333_1600 = SPD_FIRST_MOD_SPEC | 0x57, + LRMM_IMPEDANCE_1333_1600 = SPD_FIRST_MOD_SPEC | 0x58, + LRMM_F3RC9_1866_2133 = SPD_FIRST_MOD_SPEC | 0x59, + LRMM_F3RC8_1866_2133 = SPD_FIRST_MOD_SPEC | 0x5a, + LRMM_F4RC11_1866_2133 = SPD_FIRST_MOD_SPEC | 0x5b, + LRMM_F3RC11_1866_2133 = SPD_FIRST_MOD_SPEC | 0x5c, + LRMM_F4RC10_1866_2133 = SPD_FIRST_MOD_SPEC | 0x5d, + LRMM_F3RC10_1866_2133 = SPD_FIRST_MOD_SPEC | 0x5e, + LRMM_F6RC11_1866_2133 = SPD_FIRST_MOD_SPEC | 0x5f, + LRMM_F5RC11_1866_2133 = SPD_FIRST_MOD_SPEC | 0x60, + LRMM_F6RC10_1866_2133 = SPD_FIRST_MOD_SPEC | 0x61, + LRMM_F5RC10_1866_2133 = SPD_FIRST_MOD_SPEC | 0x62, + LRMM_F8RC11_1866_2133 = SPD_FIRST_MOD_SPEC | 0x63, + LRMM_F7RC11_1866_2133 = SPD_FIRST_MOD_SPEC | 0x64, + LRMM_F8RC10_1866_2133 = SPD_FIRST_MOD_SPEC | 0x65, + LRMM_F7RC10_1866_2133 = SPD_FIRST_MOD_SPEC | 0x66, + LRMM_F10RC11_1866_2133 = SPD_FIRST_MOD_SPEC | 0x67, + LRMM_F9RC11_1866_2133 = SPD_FIRST_MOD_SPEC | 0x68, + LRMM_F10RC10_1866_2133 = SPD_FIRST_MOD_SPEC | 0x69, + LRMM_F9RC10_1866_2133 = SPD_FIRST_MOD_SPEC | 0x6a, + LRMM_RTT_WR_1866_2133 = SPD_FIRST_MOD_SPEC | 0x6b, + LRMM_RTT_NOM_1866_2133 = SPD_FIRST_MOD_SPEC | 0x6c, + LRMM_IMPEDANCE_1866_2133 = SPD_FIRST_MOD_SPEC | 0x6d, + LRMM_MIN_DELAY_150V = SPD_FIRST_MOD_SPEC | 0x6e, + LRMM_MAX_DELAY_150V = SPD_FIRST_MOD_SPEC | 0x6f, + LRMM_MIN_DELAY_135V = SPD_FIRST_MOD_SPEC | 0x70, + LRMM_MAX_DELAY_135V = SPD_FIRST_MOD_SPEC | 0x71, + LRMM_MIN_DELAY_125V = SPD_FIRST_MOD_SPEC | 0x72, + LRMM_MAX_DELAY_125V = SPD_FIRST_MOD_SPEC | 0x73, + LRMM_PERSONALITY_BYTE0 = SPD_FIRST_MOD_SPEC | 0x74, + LRMM_PERSONALITY_BYTE1 = SPD_FIRST_MOD_SPEC | 0x75, + LRMM_PERSONALITY_BYTE2 = SPD_FIRST_MOD_SPEC | 0x76, + LRMM_PERSONALITY_BYTE3 = SPD_FIRST_MOD_SPEC | 0x77, + LRMM_PERSONALITY_BYTE4 = SPD_FIRST_MOD_SPEC | 0x78, + LRMM_PERSONALITY_BYTE5 = SPD_FIRST_MOD_SPEC | 0x79, + LRMM_PERSONALITY_BYTE6 = SPD_FIRST_MOD_SPEC | 0x7a, + LRMM_PERSONALITY_BYTE7 = SPD_FIRST_MOD_SPEC | 0x7b, + LRMM_PERSONALITY_BYTE8 = SPD_FIRST_MOD_SPEC | 0x7c, + LRMM_PERSONALITY_BYTE9 = SPD_FIRST_MOD_SPEC | 0x7d, + LRMM_PERSONALITY_BYTE10 = SPD_FIRST_MOD_SPEC | 0x7e, + LRMM_PERSONALITY_BYTE11 = SPD_FIRST_MOD_SPEC | 0x7f, + LRMM_PERSONALITY_BYTE12 = SPD_FIRST_MOD_SPEC | 0x80, + LRMM_PERSONALITY_BYTE13 = SPD_FIRST_MOD_SPEC | 0x81, + LRMM_PERSONALITY_BYTE14 = SPD_FIRST_MOD_SPEC | 0x82, + SPD_LAST_MOD_SPEC, + // This keyword should be last in the list // Invalid Keyword INVALID_SPD_KEYWORD = 0xFFFF, }; diff --git a/src/include/usr/spd/spdreasoncodes.H b/src/include/usr/spd/spdreasoncodes.H index 9fb5515e4..9767d3916 100644 --- a/src/include/usr/spd/spdreasoncodes.H +++ b/src/include/usr/spd/spdreasoncodes.H @@ -53,6 +53,7 @@ enum spdModuleId SPD_WRITE_KEYWORD_VALUE = 0x05, SPD_SPECIAL_CASES = 0x06, SPD_PRESENCE_DETECT = 0x07, + SPD_CHECK_MODULE_SPECIFIC_KEYWORD = 0x08, }; /** @@ -72,6 +73,11 @@ enum spdReasonCode SPD_INSUFFICIENT_FILE_SIZE = SPD_COMP_ID | 0x06, SPD_NOT_SUPPORTED = SPD_COMP_ID | 0x07, SPD_KEYWORD_NOT_FOUND = SPD_COMP_ID | 0x08, + SPD_MOD_SPECIFIC_MISMATCH_UMM = SPD_COMP_ID | 0x09, + SPD_MOD_SPECIFIC_MISMATCH_RMM = SPD_COMP_ID | 0x0a, + SPD_MOD_SPECIFIC_MISMATCH_CMM = SPD_COMP_ID | 0x0b, + SPD_MOD_SPECIFIC_MISMATCH_LRMM = SPD_COMP_ID | 0x0c, + SPD_MOD_SPECIFIC_UNSUPPORTED = SPD_COMP_ID | 0x0d, }; }; // end SPD diff --git a/src/usr/spd/spd.C b/src/usr/spd/spd.C index 0d1dfc289..7120e718f 100755 --- a/src/usr/spd/spd.C +++ b/src/usr/spd/spd.C @@ -380,6 +380,17 @@ errlHndl_t spdGetValue ( uint64_t i_keyword, break; } + // Check if this is a module specific keyword and check that the + // correct values are in place to actually request it + err = checkModSpecificKeyword( (*entry), + i_DDRRev, + i_target ); + + if( err ) + { + break; + } + if( entry->isSpecialCase ) { // Handle special cases where data isn't sequential @@ -463,14 +474,17 @@ errlHndl_t spdSpecialCases ( KeywordData i_kwdData, { switch( i_kwdData.keyword ) { + // ================================================== + // 2 byte - LSB then MSB case CAS_LATENCIES_SUPPORTED: - // Length 2 bytes - // Byte 0x0e [7:0] - // Byte 0x0f [6:0] - MSB - + case TRFC_MIN: + case MODULE_MANUFACTURER_ID: + case DRAM_MANUFACTURER_ID: + case RMM_MFR_ID_CODE: + case LRMM_MFR_ID_CODE: // Check Size of buffer err = spdCheckSize( io_buflen, - 2, + i_kwdData.length, i_kwdData.keyword ); if( err ) break; @@ -491,7 +505,7 @@ errlHndl_t spdSpecialCases ( KeywordData i_kwdData, } // Get LSB - err = spdFetchData( 0x0e, + err = spdFetchData( (i_kwdData.offset - 1), 1, /* Read 1 byte at a time */ &tmpBuffer[1], i_target ); @@ -499,17 +513,15 @@ errlHndl_t spdSpecialCases ( KeywordData i_kwdData, if( err ) break; // Set number of bytes read - io_buflen = 2; + io_buflen = i_kwdData.length; break; + // ================================================== + // 2 byte - MSB then LSB is 2 less than MSB case TRC_MIN: - // Length 2 bytes - // Byte 0x15 [7:4] - MSB - // Byte 0x17 [7:0] - // Check Size of buffer err = spdCheckSize( io_buflen, - 2, + i_kwdData.length, i_kwdData.keyword ); if( err ) break; @@ -530,7 +542,7 @@ errlHndl_t spdSpecialCases ( KeywordData i_kwdData, } // Get LSB - err = spdFetchData( 0x17, + err = spdFetchData( (i_kwdData.offset - 2), 1, /* Read 1 byte at a time */ &tmpBuffer[1], i_target ); @@ -538,88 +550,16 @@ errlHndl_t spdSpecialCases ( KeywordData i_kwdData, if( err ) break; // Set number of bytes read - io_buflen = 2; + io_buflen = i_kwdData.length; break; + // ================================================== + // 2 byte - MSB then LSB case TRAS_MIN: - // Length 2 bytes - // Byte 0x15 [3:0] - MSB - // Byte 0x16 [7:0] - - // Check size of buffer - err = spdCheckSize( io_buflen, - 2, - i_kwdData.keyword ); - - if( err ) break; - - // Get MSB - err = spdFetchData( i_kwdData.offset, - 1, /* Read 1 byte at a time */ - &tmpBuffer[0], - i_target ); - - if( err ) break; - - // Mask and shift if needed - if( i_kwdData.useBitMask ) - { - tmpBuffer[0] = tmpBuffer[0] & i_kwdData.bitMask; - tmpBuffer[0] = tmpBuffer[0] >> i_kwdData.shift; - } - - // Get LSB - err = spdFetchData( 0x16, - 1, /* Read 1 byte at a time */ - &tmpBuffer[1], - i_target ); - - if( err ) break; - - // Set number of bytes read - io_buflen = 2; - break; - - case TRFC_MIN: - // Length 2 bytes - // Byte 0x18 [7:0] - // Byte 0x19 [7:0] - MSB - - // Check size of buffer - err = spdCheckSize( io_buflen, - 2, - i_kwdData.keyword ); - - if( err ) break; - - // Get MSB - err = spdFetchData( i_kwdData.offset, - 1, /* Read 1 byte at a time */ - &tmpBuffer[0], - i_target ); - - if( err ) break; - - // Get LSB - err = spdFetchData( 0x18, - 1, /* Read 1 byte at a time */ - &tmpBuffer[1], - i_target ); - - if( err ) break; - - // Set number of bytes read - io_buflen = 2; - break; - case TFAW_MIN: - // Length 2 bytes - // Byte 0x1c [3:0] - MSB - // byte 0x1d [7:0] - // Check size of buffer err = spdCheckSize( io_buflen, - 2, + i_kwdData.length, i_kwdData.keyword ); if( err ) break; @@ -640,39 +580,7 @@ errlHndl_t spdSpecialCases ( KeywordData i_kwdData, } // Get LSB - err = spdFetchData( 0x1d, - 1, /* Read 1 byte at a time */ - &tmpBuffer[1], - i_target ); - - if( err ) break; - - // Set number of bytes read - io_buflen = 2; - break; - - case MODULE_MANUFACTURER_ID: - // Length 2 bytes - // Byte 0x75 [7:0] - // Byte 0x76 [7:0] - MSB - - // Check size of buffer - err = spdCheckSize( io_buflen, - 2, - i_kwdData.keyword ); - - if( err ) break; - - // Get MSB - err = spdFetchData( i_kwdData.offset, - 1, /* Read 1 byte at a time */ - &tmpBuffer[0], - i_target ); - - if( err ) break; - - // Get LSB - err = spdFetchData( 0x75, + err = spdFetchData( (i_kwdData.offset + 1), 1, /* Read 1 byte at a time */ &tmpBuffer[1], i_target ); @@ -680,41 +588,10 @@ errlHndl_t spdSpecialCases ( KeywordData i_kwdData, if( err ) break; // Set number of bytes read - io_buflen = 2; - break; - - case DRAM_MANUFACTURER_ID: - // Length 2 bytes - // Byte 0x94 [7:0] - // Byte 0x95 [7:0] - MSB - - // Check size of buffer - err = spdCheckSize( io_buflen, - 2, - i_kwdData.keyword ); - - if( err ) break; - - // Get MSB - err = spdFetchData( i_kwdData.offset, - 1, /*Read 1 byte at a time */ - &tmpBuffer[0], - i_target ); - - if( err ) break; - - // Get LSB - err = spdFetchData( 0x94, - 1, /* Read 1 byte at a time */ - &tmpBuffer[1], - i_target ); - - if( err ) break; - - // Set number of bytes read - io_buflen = 2; + io_buflen = i_kwdData.length; break; + // ================================================== default: TRACFCOMP( g_trac_spd, ERR_MRK"Unknown keyword (0x%04x) for DDR3 special cases!", @@ -941,4 +818,210 @@ bool compareEntries ( const KeywordData e1, } +// ------------------------------------------------------------------ +// checkModSpecificKeyword +// ------------------------------------------------------------------ +errlHndl_t checkModSpecificKeyword ( KeywordData i_kwdData, + uint64_t i_memType, + TARGETING::Target * i_target ) +{ + errlHndl_t err = NULL; + + TRACSSCOMP( g_trac_spd, + ENTER_MRK"checkModSpecificKeyword()" ); + + do + { + // If not a Module Specific keyword, skip this logic + if( NA == i_kwdData.modSpec ) + { + break; + } + + // To check the module specific flags, also need the Module Type value + // from byte 3. + uint8_t modType = 0x0; + err = spdFetchData( MEM_TYPE_ADDR, + MEM_TYPE_ADDR_SZ, + &modType, + i_target ); + + if( err ) + { + break; + } + + // Check Unbuffered Memory Module (UMM) + if( (SPD_DDR3 == i_memType) && + ( (0x2 == modType) || + (0x3 == modType) || + (0x4 == modType) || + (0x6 == modType) || + (0x8 == modType) || + (0xc == modType) || + (0xd == modType) ) ) + { + if( 0 == (i_kwdData.modSpec & UMM) ) + { + TRACFCOMP( g_trac_spd, + ERR_MRK"Keyword (0x%04x) is not valid with UMM modules!", + i_kwdData.keyword ); + + /*@ + * @errortype + * @reasoncode SPD_MOD_SPECIFIC_MISMATCH_UMM + * @severity ERRORLOG::ERRL_SEV_UNRECOVERABLE + * @moduleid SPD_CHECK_MODULE_SPECIFIC_KEYWORD + * @userdata1[0:31] Module Type (byte 3[3:0]) + * @userdata1[32:63] Memory Type (byte 2) + * @userdata2[0:31] SPD Keyword + * @userdata2[32:63] Module Specific flag + * @devdesc Keyword requested was not UMM Module specific. + */ + err = new ERRORLOG::ErrlEntry( ERRORLOG::ERRL_SEV_UNRECOVERABLE, + SPD_CHECK_MODULE_SPECIFIC_KEYWORD, + SPD_MOD_SPECIFIC_MISMATCH_UMM, + TWO_UINT32_TO_UINT64( modType, i_memType ), + TWO_UINT32_TO_UINT64( i_kwdData.keyword, + i_kwdData.modSpec ) ); + + break; + } + } + // Check Registered Memory Module (RMM) + else if( (SPD_DDR3 == i_memType) && + ( (0x1 == modType) || + (0x5 == modType) || + (0x9 == modType) ) ) + { + if( 0 == (i_kwdData.modSpec & RMM) ) + { + TRACFCOMP( g_trac_spd, + ERR_MRK"Keyword (0x%04x) is not valid with RMM modules!", + i_kwdData.keyword ); + + /*@ + * @errortype + * @reasoncode SPD_MOD_SPECIFIC_MISMATCH_RMM + * @severity ERRORLOG::ERRL_SEV_UNRECOVERABLE + * @moduleid SPD_CHECK_MODULE_SPECIFIC_KEYWORD + * @userdata1[0:31] Module Type (byte 3[3:0]) + * @userdata1[32:63] Memory Type (byte 2) + * @userdata2[0:31] SPD Keyword + * @userdata2[32:63] Module Specific flag + * @devdesc Keyword requested was not RMM Module specific. + */ + err = new ERRORLOG::ErrlEntry( ERRORLOG::ERRL_SEV_UNRECOVERABLE, + SPD_CHECK_MODULE_SPECIFIC_KEYWORD, + SPD_MOD_SPECIFIC_MISMATCH_RMM, + TWO_UINT32_TO_UINT64( modType, i_memType ), + TWO_UINT32_TO_UINT64( i_kwdData.keyword, + i_kwdData.modSpec ) ); + + break; + } + } + // Check Clocked Memory Module (CMM) + else if( (SPD_DDR3 == i_memType) && + ( (0x7 == modType) || + (0xa == modType) ) ) + { + if( 0 == (i_kwdData.modSpec & CMM) ) + { + TRACFCOMP( g_trac_spd, + ERR_MRK"Keyword (0x%04x) is not valid with CMM modules!", + i_kwdData.keyword ); + + /*@ + * @errortype + * @reasoncode SPD_MOD_SPECIFIC_MISMATCH_CMM + * @severity ERRORLOG::ERRL_SEV_UNRECOVERABLE + * @moduleid SPD_CHECK_MODULE_SPECIFIC_KEYWORD + * @userdata1[0:31] Module Type (byte 3[3:0]) + * @userdata1[32:63] Memory Type (byte 2) + * @userdata2[0:31] SPD Keyword + * @userdata2[32:63] Module Specific flag + * @devdesc Keyword requested was not CMM Module specific. + */ + err = new ERRORLOG::ErrlEntry( ERRORLOG::ERRL_SEV_UNRECOVERABLE, + SPD_CHECK_MODULE_SPECIFIC_KEYWORD, + SPD_MOD_SPECIFIC_MISMATCH_CMM, + TWO_UINT32_TO_UINT64( modType, i_memType ), + TWO_UINT32_TO_UINT64( i_kwdData.keyword, + i_kwdData.modSpec ) ); + + break; + } + } + // Check Load Reduction Memory Module (LRMM) + else if( (SPD_DDR3 == i_memType) && + ( (0xb == modType) ) ) + { + if( 0 == (i_kwdData.modSpec & LRMM) ) + { + TRACFCOMP( g_trac_spd, + ERR_MRK"Keyword (0x%04x) is not valid with LRMM modules!", + i_kwdData.keyword ); + + /*@ + * @errortype + * @reasoncode SPD_MOD_SPECIFIC_MISMATCH_LRMM + * @severity ERRORLOG::ERRL_SEV_UNRECOVERABLE + * @moduleid SPD_CHECK_MODULE_SPECIFIC_KEYWORD + * @userdata1[0:31] Module Type (byte 3[3:0]) + * @userdata1[32:63] Memory Type (byte 2) + * @userdata2[0:31] SPD Keyword + * @userdata2[32:63] Module Specific flag + * @devdesc Keyword requested was not LRMM Module specific. + */ + err = new ERRORLOG::ErrlEntry( ERRORLOG::ERRL_SEV_UNRECOVERABLE, + SPD_CHECK_MODULE_SPECIFIC_KEYWORD, + SPD_MOD_SPECIFIC_MISMATCH_LRMM, + TWO_UINT32_TO_UINT64( modType, i_memType ), + TWO_UINT32_TO_UINT64( i_kwdData.keyword, + i_kwdData.modSpec ) ); + + break; + } + } + else + { + TRACFCOMP( g_trac_spd, + ERR_MRK"Module specific keyword could not be matched with an " + "appropriate scenario!" ); + TRACFCOMP( g_trac_spd, + ERR_MRK" Mem Type: 0x%04x, Mod Type: 0x%04x, Keyword: 0x%04x", + i_memType, + modType, + i_kwdData.keyword ); + + /*@ + * @errortype + * @reasoncode SPD_MOD_SPECIFIC_UNSUPPORTED + * @severity ERRORLOG::ERRL_SEV_UNRECOVERABLE + * @moduleid SPD_CHECK_MODULE_SPECIFIC_KEYWORD + * @userdata1[0:31] Module Type (byte 3[3:0]) + * @userdata1[32:63] Memory Type (byte 2) + * @userdata2[0:31] SPD Keyword + * @userdata2[32:63] Module Specific flag + * @devdesc Unsupported Module Specific setup. + */ + err = new ERRORLOG::ErrlEntry( ERRORLOG::ERRL_SEV_UNRECOVERABLE, + SPD_CHECK_MODULE_SPECIFIC_KEYWORD, + SPD_MOD_SPECIFIC_UNSUPPORTED, + TWO_UINT32_TO_UINT64( modType, i_memType ), + TWO_UINT32_TO_UINT64( i_kwdData.keyword, + i_kwdData.modSpec ) ); + + break; + } + } while( 0 ); + + TRACSSCOMP( g_trac_spd, + EXIT_MRK"checkModSpecificKeyword()" ); + + return err; +} + + } // end namespace SPD diff --git a/src/usr/spd/spd.H b/src/usr/spd/spd.H index bef0cdc08..dc5e13211 100755 --- a/src/usr/spd/spd.H +++ b/src/usr/spd/spd.H @@ -52,6 +52,20 @@ enum }; /** + * @brief Enumerations for Module Specfic Keywords + */ +typedef enum +{ + NA = 0x00, + UMM = 0x01, + RMM = 0x02, + CMM = 0x04, + LRMM = 0x08, + ALL = 0xFFFF, +} modSpecTypes_t; + + +/** * @brief Structure to define the lookup table for SPD keywords * for DIMMs. */ @@ -65,6 +79,7 @@ struct KeywordData uint8_t bitMask; // Bit mask uint8_t shift; // Used for fields < 1 byte to right justify all values. bool isSpecialCase; // Whether or not this entry is a special case. + modSpecTypes_t modSpec; // Module Specific type keyword is valid for. }; @@ -283,6 +298,25 @@ errlHndl_t dimmPresenceDetect( DeviceFW::OperationType i_opType, int64_t i_accessType, va_list i_args ); +/** + * @brief This function is used to check the parameters in the SPD data that + * indicate which module specific keywords are valid, and then check that + * against the data in the table flags. + * + * @param[in] i_kwdData - The table entry for the keyword being requested. + * + * @param[in] i_memType - The DDRx revision value from Byte 2 of the SPD data. + * + * @param[in] i_target - The chip target. + * + * @return errlHndl_t - NULL if successful, otherwise a pointer to the error + * log. + */ +errlHndl_t checkModSpecificKeyword ( KeywordData i_kwdData, + uint64_t i_memType, + TARGETING::Target * i_target ); + + }; // end SPD namespace #endif // __SPD_H diff --git a/src/usr/spd/spdDDR3.H b/src/usr/spd/spdDDR3.H index 4dbae28ab..b60ce34a8 100755 --- a/src/usr/spd/spdDDR3.H +++ b/src/usr/spd/spdDDR3.H @@ -57,70 +57,201 @@ KeywordData ddr3Data[] = // Keyword offset size Use Bitmsk Shift // Bitmsk Number // ---------------------------------------------------------------------------------- - { CRC_EXCLUDE, 0x00, 0x01, true, 0x80, 0x07, false }, - { SPD_BYTES_TOTAL, 0x00, 0x01, true, 0x70, 0x04, false }, - { SPD_BYTES_USED, 0x00, 0x01, true, 0x0F, 0x00, false }, - { SPD_MAJOR_REVISION, 0x01, 0x01, true, 0xF0, 0x04, false }, - { SPD_MINOR_REVISION, 0x01, 0x01, true, 0x0F, 0x00, false }, - { BASIC_MEMORY_TYPE, 0x02, 0x01, false, 0x00, 0x00, false }, - { MODULE_TYPE, 0x03, 0x01, true, 0x0F, 0x00, false }, - { BANK_ADDRESS_BITS, 0x04, 0x01, true, 0x70, 0x04, false }, - { DENSITY, 0x04, 0x01, true, 0x0F, 0x00, false }, - { ROW_ADDRESS, 0x05, 0x01, true, 0x38, 0x03, false }, - { COL_ADDRESS, 0x05, 0x01, true, 0x07, 0x00, false }, - { MODULE_NOMINAL_VOLTAGE, 0x06, 0x01, true, 0x07, 0x00, false }, - { MODULE_RANKS, 0x07, 0x01, true, 0x38, 0x03, false }, - { MODULE_DRAM_WIDTH, 0x07, 0x01, true, 0x07, 0x00, false }, - { ECC_BITS, 0x08, 0x01, true, 0x18, 0x03, false }, - { MODULE_MEMORY_BUS_WIDTH, 0x08, 0x01, true, 0x07, 0x00, false }, - { FTB_DIVIDEND, 0x09, 0x01, true, 0xF0, 0x04, false }, - { FTB_DIVISOR, 0x09, 0x01, true, 0x0F, 0x00, false }, - { MTB_DIVIDEND, 0x0a, 0x01, false, 0x00, 0x00, false }, - { MTB_DIVISOR, 0x0b, 0x01, false, 0x00, 0x00, false }, - { TCK_MIN, 0x0c, 0x01, false, 0x00, 0x00, false }, - { CAS_LATENCIES_SUPPORTED, 0x0f, 0x02, true, 0x7F, 0x00, true }, - { MIN_CAS_LATENCY, 0x10, 0x01, false, 0x00, 0x00, false }, - { TWR_MIN, 0x11, 0x01, false, 0x00, 0x00, false }, - { TRCD_MIN, 0x12, 0x01, false, 0x00, 0x00, false }, - { TRRD_MIN, 0x13, 0x01, false, 0x00, 0x00, false }, - { TRP_MIN, 0x14, 0x01, false, 0x00, 0x00, false }, - { TRC_MIN, 0x15, 0x02, true, 0xF0, 0x04, true }, - { TRAS_MIN, 0x15, 0x02, true, 0x0F, 0x00, true }, - { TRFC_MIN, 0x19, 0x02, false, 0x00, 0x00, true }, - { TWTR_MIN, 0x1a, 0x01, false, 0x00, 0x00, false }, - { TRTP_MIN, 0x1b, 0x01, false, 0x00, 0x00, false }, - { TFAW_MIN, 0x1c, 0x02, true, 0x0F, 0x00, true }, - { DLL_OFF, 0x1e, 0x01, true, 0x80, 0x07, false }, - { RZQ_7, 0x1e, 0x01, true, 0x02, 0x01, false }, - { RZQ_6, 0x1e, 0x01, true, 0x01, 0x00, false }, - { PASR, 0x1f, 0x01, true, 0x80, 0x07, false }, - { ODTS, 0x1f, 0x01, true, 0x08, 0x03, false }, - { ASR, 0x1f, 0x01, true, 0x04, 0x02, false }, - { ETR_1X, 0x1f, 0x01, true, 0x02, 0x01, false }, - { ETR, 0x1f, 0x01, true, 0x01, 0x00, false }, - { THERMAL_SENSOR_PRESENT, 0x20, 0x01, true, 0x80, 0x07, false }, - { THERMAL_SENSOR_ACCURACY, 0x20, 0x01, true, 0x7F, 0x00, false }, - { SDRAM_DEVICE_TYPE_NONSTD, 0x21, 0x01, true, 0x80, 0x07, false }, - { SDRAM_DEVICE_TYPE, 0x21, 0x01, true, 0x7F, 0x00, false }, - { MODULE_TYPE_SPECIFIC_SECTION, 0x3c, 0x39, false, 0x00, 0x00, false }, - { MODULE_MANUFACTURER_ID, 0x76, 0x02, false, 0x00, 0x00, true }, - { MODULE_MANUFACTURING_LOCATION, 0x77, 0x01, false, 0x00, 0x00, false }, - { MODULE_MANUFACTURING_DATE, 0x78, 0x02, false, 0x00, 0x00, false }, - { MODULE_SERIAL_NUMBER, 0x7a, 0x04, false, 0x00, 0x00, false }, - { MODULE_CRC, 0x7e, 0x02, false, 0x00, 0x00, false }, - { MODULE_PART_NUMBER, 0x80, 0x12, false, 0x00, 0x00, false }, - { MODULE_REVISION_CODE, 0x92, 0x02, false, 0x00, 0x00, false }, - { DRAM_MANUFACTURER_ID, 0x95, 0x02, false, 0x00, 0x00, true }, - { MANUFACTURER_SPECIFIC_DATA, 0x96, 0x1a, false, 0x00, 0x00, false }, - { TCKMIN_FINE_OFFSET, 0x22, 0x01, false, 0x00, 0x00, false }, - { TAAMIN_FINE_OFFSET, 0x23, 0x01, false, 0x00, 0x00, false }, - { TRCDMIN_FINE_OFFSET, 0x24, 0x01, false, 0x00, 0x00, false }, - { TRPMIN_FINE_OFFSET, 0x25, 0x01, false, 0x00, 0x00, false }, - { TRPCMIN_FINE_OFFSET, 0x26, 0x01, false, 0x00, 0x00, false }, - { MODULE_THERMAL_SENSOR, 0x20, 0x01, false, 0x00, 0x00, false }, - { SDRAM_OPTIONAL_FEATURES, 0x1e, 0x01, false, 0x00, 0x00, false }, - { SDRAM_THERMAL_REFRESH_OPTIONS, 0x1f, 0x01, false, 0x00, 0x00, false }, - { DIMM_BAD_DQ_DATA, 0xb0, 0x50, false, 0x00, 0x00, false }, + { CRC_EXCLUDE, 0x00, 0x01, true, 0x80, 0x07, false, NA }, + { SPD_BYTES_TOTAL, 0x00, 0x01, true, 0x70, 0x04, false, NA }, + { SPD_BYTES_USED, 0x00, 0x01, true, 0x0F, 0x00, false, NA }, + { SPD_MAJOR_REVISION, 0x01, 0x01, true, 0xF0, 0x04, false, NA }, + { SPD_MINOR_REVISION, 0x01, 0x01, true, 0x0F, 0x00, false, NA }, + { BASIC_MEMORY_TYPE, 0x02, 0x01, false, 0x00, 0x00, false, NA }, + { MODULE_TYPE, 0x03, 0x01, true, 0x0F, 0x00, false, NA }, + { BANK_ADDRESS_BITS, 0x04, 0x01, true, 0x70, 0x04, false, NA }, + { DENSITY, 0x04, 0x01, true, 0x0F, 0x00, false, NA }, + { ROW_ADDRESS, 0x05, 0x01, true, 0x38, 0x03, false, NA }, + { COL_ADDRESS, 0x05, 0x01, true, 0x07, 0x00, false, NA }, + { MODULE_NOMINAL_VOLTAGE, 0x06, 0x01, true, 0x07, 0x00, false, NA }, + { MODULE_RANKS, 0x07, 0x01, true, 0x38, 0x03, false, NA }, + { MODULE_DRAM_WIDTH, 0x07, 0x01, true, 0x07, 0x00, false, NA }, + { ECC_BITS, 0x08, 0x01, true, 0x18, 0x03, false, NA }, + { MODULE_MEMORY_BUS_WIDTH, 0x08, 0x01, true, 0x07, 0x00, false, NA }, + { FTB_DIVIDEND, 0x09, 0x01, true, 0xF0, 0x04, false, NA }, + { FTB_DIVISOR, 0x09, 0x01, true, 0x0F, 0x00, false, NA }, + { MTB_DIVIDEND, 0x0a, 0x01, false, 0x00, 0x00, false, NA }, + { MTB_DIVISOR, 0x0b, 0x01, false, 0x00, 0x00, false, NA }, + { TCK_MIN, 0x0c, 0x01, false, 0x00, 0x00, false, NA }, + { CAS_LATENCIES_SUPPORTED, 0x0f, 0x02, true, 0x7F, 0x00, true, NA }, + { MIN_CAS_LATENCY, 0x10, 0x01, false, 0x00, 0x00, false, NA }, + { TWR_MIN, 0x11, 0x01, false, 0x00, 0x00, false, NA }, + { TRCD_MIN, 0x12, 0x01, false, 0x00, 0x00, false, NA }, + { TRRD_MIN, 0x13, 0x01, false, 0x00, 0x00, false, NA }, + { TRP_MIN, 0x14, 0x01, false, 0x00, 0x00, false, NA }, + { TRC_MIN, 0x15, 0x02, true, 0xF0, 0x04, true, NA }, + { TRAS_MIN, 0x15, 0x02, true, 0x0F, 0x00, true, NA }, + { TRFC_MIN, 0x19, 0x02, false, 0x00, 0x00, true, NA }, + { TWTR_MIN, 0x1a, 0x01, false, 0x00, 0x00, false, NA }, + { TRTP_MIN, 0x1b, 0x01, false, 0x00, 0x00, false, NA }, + { TFAW_MIN, 0x1c, 0x02, true, 0x0F, 0x00, true, NA }, + { DLL_OFF, 0x1e, 0x01, true, 0x80, 0x07, false, NA }, + { RZQ_7, 0x1e, 0x01, true, 0x02, 0x01, false, NA }, + { RZQ_6, 0x1e, 0x01, true, 0x01, 0x00, false, NA }, + { PASR, 0x1f, 0x01, true, 0x80, 0x07, false, NA }, + { ODTS, 0x1f, 0x01, true, 0x08, 0x03, false, NA }, + { ASR, 0x1f, 0x01, true, 0x04, 0x02, false, NA }, + { ETR_1X, 0x1f, 0x01, true, 0x02, 0x01, false, NA }, + { ETR, 0x1f, 0x01, true, 0x01, 0x00, false, NA }, + { THERMAL_SENSOR_PRESENT, 0x20, 0x01, true, 0x80, 0x07, false, NA }, + { THERMAL_SENSOR_ACCURACY, 0x20, 0x01, true, 0x7F, 0x00, false, NA }, + { SDRAM_DEVICE_TYPE_NONSTD, 0x21, 0x01, true, 0x80, 0x07, false, NA }, + { SDRAM_DEVICE_TYPE, 0x21, 0x01, true, 0x7F, 0x00, false, NA }, + { MODULE_TYPE_SPECIFIC_SECTION, 0x3c, 0x39, false, 0x00, 0x00, false, NA }, + { MODULE_MANUFACTURER_ID, 0x76, 0x02, false, 0x00, 0x00, true, NA }, + { MODULE_MANUFACTURING_LOCATION, 0x77, 0x01, false, 0x00, 0x00, false, NA }, + { MODULE_MANUFACTURING_DATE, 0x78, 0x02, false, 0x00, 0x00, false, NA }, + { MODULE_SERIAL_NUMBER, 0x7a, 0x04, false, 0x00, 0x00, false, NA }, + { MODULE_CRC, 0x7e, 0x02, false, 0x00, 0x00, false, NA }, + { MODULE_PART_NUMBER, 0x80, 0x12, false, 0x00, 0x00, false, NA }, + { MODULE_REVISION_CODE, 0x92, 0x02, false, 0x00, 0x00, false, NA }, + { DRAM_MANUFACTURER_ID, 0x95, 0x02, false, 0x00, 0x00, true, NA }, + { MANUFACTURER_SPECIFIC_DATA, 0x96, 0x1a, false, 0x00, 0x00, false, NA }, + { TCKMIN_FINE_OFFSET, 0x22, 0x01, false, 0x00, 0x00, false, NA }, + { TAAMIN_FINE_OFFSET, 0x23, 0x01, false, 0x00, 0x00, false, NA }, + { TRCDMIN_FINE_OFFSET, 0x24, 0x01, false, 0x00, 0x00, false, NA }, + { TRPMIN_FINE_OFFSET, 0x25, 0x01, false, 0x00, 0x00, false, NA }, + { TRCMIN_FINE_OFFSET, 0x26, 0x01, false, 0x00, 0x00, false, NA }, + { MODULE_THERMAL_SENSOR, 0x20, 0x01, false, 0x00, 0x00, false, NA }, + { SDRAM_OPTIONAL_FEATURES, 0x1e, 0x01, false, 0x00, 0x00, false, NA }, + { SDRAM_THERMAL_REFRESH_OPTIONS, 0x1f, 0x01, false, 0x00, 0x00, false, NA }, + { DIMM_BAD_DQ_DATA, 0xb0, 0x50, false, 0x00, 0x00, false, NA }, + { MODSPEC_COM_NOM_HEIGHT_MAX, 0x3c, 0x01, true, 0x0f, 0x00, false, ALL }, + { MODSPEC_COM_MAX_THICK_BACK, 0x3d, 0x01, true, 0xf0, 0x04, false, ALL }, + { MODSPEC_COM_MAX_THICK_FRONT, 0x3d, 0x01, true, 0x0f, 0x00, false, ALL }, + { MODSPEC_COM_RAW_CARD_EXT, 0x3e, 0x01, true, 0x80, 0x07, false, ALL }, + { MODSPEC_COM_RAW_CARD_REV, 0x3e, 0x01, true, 0x60, 0x05, false, ALL }, + { MODSPEC_COM_RAW_CARD, 0x3e, 0x01, true, 0x0f, 0x00, false, ALL }, + { MODSPEC_COM_ADDR_MAPPING, 0x3f, 0x01, true, 0x01, 0x00, false, ALL }, + { RMM_ROWS_RDIMM, 0x3f, 0x01, true, 0x0c, 0x02, false, RMM }, + { RMM_REGS_RDIMM, 0x3f, 0x01, true, 0x03, 0x00, false, RMM }, + { RMM_HEAT_SP, 0x40, 0x01, true, 0x80, 0x07, false, RMM }, + { RMM_HEAT_SP_CHARS, 0x40, 0x01, true, 0x7F, 0x00, false, RMM }, + { RMM_MFR_ID_CODE, 0x42, 0x02, false, 0x00, 0x00, true, RMM }, + { RMM_REG_REV_NUM, 0x43, 0x01, false, 0x00, 0x00, false, RMM }, + { RMM_REG_TYPE, 0x44, 0x01, true, 0x07, 0x00, false, RMM }, + { RMM_RC1, 0x45, 0x01, true, 0xf0, 0x04, false, RMM }, + { RMM_RC0, 0x45, 0x01, true, 0x0f, 0x00, false, RMM }, + { RMM_RC3, 0x46, 0x01, true, 0xf0, 0x04, false, RMM }, + { RMM_RC2, 0x46, 0x01, true, 0x0f, 0x00, false, RMM }, + { RMM_RC5, 0x47, 0x01, true, 0xf0, 0x04, false, RMM }, + { RMM_RC4, 0x47, 0x01, true, 0x0f, 0x00, false, RMM }, + { RMM_RC7, 0x48, 0x01, true, 0xf0, 0x04, false, RMM }, + { RMM_RC6, 0x48, 0x01, true, 0x0f, 0x00, false, RMM }, + { RMM_RC9, 0x49, 0x01, true, 0xf0, 0x04, false, RMM }, + { RMM_RC8, 0x49, 0x01, true, 0x0f, 0x00, false, RMM }, + { RMM_RC11, 0x4a, 0x01, true, 0xf0, 0x04, false, RMM }, + { RMM_RC10, 0x4a, 0x01, true, 0x0f, 0x00, false, RMM }, + { RMM_RC13, 0x4b, 0x01, true, 0xf0, 0x04, false, RMM }, + { RMM_RC12, 0x4b, 0x01, true, 0x0f, 0x00, false, RMM }, + { RMM_RC15, 0x4c, 0x01, true, 0xf0, 0x04, false, RMM }, + { RMM_RC14, 0x4c, 0x01, true, 0x0f, 0x00, false, RMM }, + { LRMM_HEAT_SP, 0x3f, 0x01, true, 0x80, 0x07, false, LRMM }, + { LRMM_RANK_NUMBERING, 0x3f, 0x01, true, 0x20, 0x05, false, LRMM }, + { LRMM_MEMBUF_ORIEN, 0x3f, 0x01, true, 0x10, 0x04, false, LRMM }, + { LRMM_NUM_ROWS, 0x3f, 0x01, true, 0x0c, 0x02, false, LRMM }, + { LRMM_MIRRORING, 0x3f, 0x01, true, 0x03, 0x00, false, LRMM }, + { LRMM_REVISION_NUM, 0x40, 0x01, false, 0x00, 0x00, false, LRMM }, + { LRMM_MFR_ID_CODE, 0x42, 0x02, false, 0x00, 0x00, true, LRMM }, + { LRMM_F0RC3, 0x43, 0x01, true, 0xf0, 0x04, false, LRMM }, + { LRMM_F0RC2, 0x43, 0x01, true, 0x0f, 0x00, false, LRMM }, + { LRMM_F0RC5, 0x44, 0x01, true, 0xf0, 0x04, false, LRMM }, + { LRMM_F0RC4, 0x44, 0x01, true, 0x0f, 0x00, false, LRMM }, + { LRMM_F1RC11, 0x45, 0x01, true, 0xf0, 0x04, false, LRMM }, + { LRMM_F1RC8, 0x45, 0x01, true, 0x0f, 0x00, false, LRMM }, + { LRMM_F1RC13, 0x46, 0x01, true, 0xf0, 0x04, false, LRMM }, + { LRMM_F1RC12, 0x46, 0x01, true, 0x0f, 0x00, false, LRMM }, + { LRMM_F1RC15, 0x47, 0x01, true, 0xf0, 0x04, false, LRMM }, + { LRMM_F1RC14, 0x47, 0x01, true, 0x0f, 0x00, false, LRMM }, + { LRMM_F3RC9_800_1600, 0x48, 0x01, true, 0xf0, 0x04, false, LRMM }, + { LRMM_F3RC8_800_1600, 0x48, 0x01, true, 0x0f, 0x00, false, LRMM }, + { LRMM_F4RC11_800_1600, 0x49, 0x01, true, 0xc0, 0x06, false, LRMM }, + { LRMM_F3RC11_800_1600, 0x49, 0x01, true, 0x30, 0x04, false, LRMM }, + { LRMM_F4RC10_800_1600, 0x49, 0x01, true, 0x0c, 0x02, false, LRMM }, + { LRMM_F3RC10_800_1600, 0x49, 0x01, true, 0x03, 0x00, false, LRMM }, + { LRMM_F6RC11_800_1600, 0x4a, 0x01, true, 0xc0, 0x06, false, LRMM }, + { LRMM_F5RC11_800_1600, 0x4a, 0x01, true, 0x30, 0x04, false, LRMM }, + { LRMM_F6RC10_800_1600, 0x4a, 0x01, true, 0x0c, 0x02, false, LRMM }, + { LRMM_F5RC10_800_1600, 0x4a, 0x01, true, 0x03, 0x00, false, LRMM }, + { LRMM_F8RC11_800_1600, 0x4b, 0x01, true, 0xc0, 0x06, false, LRMM }, + { LRMM_F7RC11_800_1600, 0x4b, 0x01, true, 0x30, 0x04, false, LRMM }, + { LRMM_F8RC10_800_1600, 0x4b, 0x01, true, 0x0c, 0x02, false, LRMM }, + { LRMM_F7RC10_800_1600, 0x4b, 0x01, true, 0x03, 0x00, false, LRMM }, + { LRMM_F10RC11_800_1600, 0x4c, 0x01, true, 0xc0, 0x06, false, LRMM }, + { LRMM_F9RC11_800_1600, 0x4c, 0x01, true, 0x30, 0x04, false, LRMM }, + { LRMM_F10RC10_800_1600, 0x4c, 0x01, true, 0x0c, 0x02, false, LRMM }, + { LRMM_F9RC10_800_1600, 0x4c, 0x01, true, 0x03, 0x00, false, LRMM }, + { LRMM_RTT_WR_800_1600, 0x4d, 0x01, true, 0xc0, 0x06, false, LRMM }, + { LRMM_RTT_NOM_800_1600, 0x4d, 0x01, true, 0x1c, 0x02, false, LRMM }, + { LRMM_IMPEDANCE_800_1600, 0x4d, 0x01, true, 0x03, 0x00, false, LRMM }, + { LRMM_F3RC9_1333_1600, 0x4e, 0x01, true, 0xF0, 0x04, false, LRMM }, + { LRMM_F3RC8_1333_1600, 0x4e, 0x01, true, 0x0F, 0x00, false, LRMM }, + { LRMM_F4RC11_1333_1600, 0x4f, 0x01, true, 0xc0, 0x06, false, LRMM }, + { LRMM_F3RC11_1333_1600, 0x4f, 0x01, true, 0x30, 0x04, false, LRMM }, + { LRMM_F4RC10_1333_1600, 0x4f, 0x01, true, 0x0c, 0x02, false, LRMM }, + { LRMM_F3RC10_1333_1600, 0x4f, 0x01, true, 0x03, 0x00, false, LRMM }, + { LRMM_F6RC11_1333_1600, 0x50, 0x01, true, 0xc0, 0x06, false, LRMM }, + { LRMM_F5RC11_1333_1600, 0x50, 0x01, true, 0x30, 0x04, false, LRMM }, + { LRMM_F6RC10_1333_1600, 0x50, 0x01, true, 0x0c, 0x02, false, LRMM }, + { LRMM_F5RC10_1333_1600, 0x50, 0x01, true, 0x03, 0x00, false, LRMM }, + { LRMM_F8RC11_1333_1600, 0x51, 0x01, true, 0xc0, 0x06, false, LRMM }, + { LRMM_F7RC11_1333_1600, 0x51, 0x01, true, 0x30, 0x04, false, LRMM }, + { LRMM_F8RC10_1333_1600, 0x51, 0x01, true, 0x0c, 0x02, false, LRMM }, + { LRMM_F7RC10_1333_1600, 0x51, 0x01, true, 0x03, 0x00, false, LRMM }, + { LRMM_F10RC11_1333_1600, 0x52, 0x01, true, 0xc0, 0x06, false, LRMM }, + { LRMM_F9RC11_1333_1600, 0x52, 0x01, true, 0x30, 0x04, false, LRMM }, + { LRMM_F10RC10_1333_1600, 0x52, 0x01, true, 0x0c, 0x02, false, LRMM }, + { LRMM_F9RC10_1333_1600, 0x52, 0x01, true, 0x03, 0x00, false, LRMM }, + { LRMM_RTT_WR_1333_1600, 0x53, 0x01, true, 0xc0, 0x06, false, LRMM }, + { LRMM_RTT_NOM_1333_1600, 0x53, 0x01, true, 0x1c, 0x02, false, LRMM }, + { LRMM_IMPEDANCE_1333_1600, 0x53, 0x01, true, 0x03, 0x00, false, LRMM }, + { LRMM_F3RC9_1866_2133, 0x54, 0x01, true, 0xf0, 0x04, false, LRMM }, + { LRMM_F3RC8_1866_2133, 0x54, 0x01, true, 0x0f, 0x00, false, LRMM }, + { LRMM_F4RC11_1866_2133, 0x55, 0x01, true, 0xc0, 0x06, false, LRMM }, + { LRMM_F3RC11_1866_2133, 0x55, 0x01, true, 0x30, 0x04, false, LRMM }, + { LRMM_F4RC10_1866_2133, 0x55, 0x01, true, 0x0c, 0x02, false, LRMM }, + { LRMM_F3RC10_1866_2133, 0x55, 0x01, true, 0x03, 0x00, false, LRMM }, + { LRMM_F6RC11_1866_2133, 0x56, 0x01, true, 0xc0, 0x06, false, LRMM }, + { LRMM_F5RC11_1866_2133, 0x56, 0x01, true, 0x30, 0x04, false, LRMM }, + { LRMM_F6RC10_1866_2133, 0x56, 0x01, true, 0x0c, 0x02, false, LRMM }, + { LRMM_F5RC10_1866_2133, 0x56, 0x01, true, 0x03, 0x00, false, LRMM }, + { LRMM_F8RC11_1866_2133, 0x57, 0x01, true, 0xc0, 0x06, false, LRMM }, + { LRMM_F7RC11_1866_2133, 0x57, 0x01, true, 0x30, 0x04, false, LRMM }, + { LRMM_F8RC10_1866_2133, 0x57, 0x01, true, 0x0c, 0x02, false, LRMM }, + { LRMM_F7RC10_1866_2133, 0x57, 0x01, true, 0x03, 0x00, false, LRMM }, + { LRMM_F10RC11_1866_2133, 0x58, 0x01, true, 0xc0, 0x06, false, LRMM }, + { LRMM_F9RC11_1866_2133, 0x58, 0x01, true, 0x30, 0x04, false, LRMM }, + { LRMM_F10RC10_1866_2133, 0x58, 0x01, true, 0x0c, 0x02, false, LRMM }, + { LRMM_F9RC10_1866_2133, 0x58, 0x01, true, 0x03, 0x00, false, LRMM }, + { LRMM_RTT_WR_1866_2133, 0x59, 0x01, true, 0xc0, 0x06, false, LRMM }, + { LRMM_RTT_NOM_1866_2133, 0x59, 0x01, true, 0x1c, 0x02, false, LRMM }, + { LRMM_IMPEDANCE_1866_2133, 0x59, 0x01, true, 0x03, 0x00, false, LRMM }, + { LRMM_MIN_DELAY_150V, 0x5a, 0x01, true, 0x7f, 0x00, false, LRMM }, + { LRMM_MAX_DELAY_150V, 0x5b, 0x01, true, 0x7f, 0x00, false, LRMM }, + { LRMM_MIN_DELAY_135V, 0x5c, 0x01, true, 0x7f, 0x00, false, LRMM }, + { LRMM_MAX_DELAY_135V, 0x5d, 0x01, true, 0x7f, 0x00, false, LRMM }, + { LRMM_MIN_DELAY_125V, 0x5e, 0x01, true, 0x7f, 0x00, false, LRMM }, + { LRMM_MAX_DELAY_125V, 0x5f, 0x01, true, 0x7f, 0x00, false, LRMM }, + { LRMM_PERSONALITY_BYTE0, 0x66, 0x01, false, 0x00, 0x00, false, LRMM }, + { LRMM_PERSONALITY_BYTE1, 0x67, 0x01, false, 0x00, 0x00, false, LRMM }, + { LRMM_PERSONALITY_BYTE2, 0x68, 0x01, false, 0x00, 0x00, false, LRMM }, + { LRMM_PERSONALITY_BYTE3, 0x69, 0x01, false, 0x00, 0x00, false, LRMM }, + { LRMM_PERSONALITY_BYTE4, 0x6a, 0x01, false, 0x00, 0x00, false, LRMM }, + { LRMM_PERSONALITY_BYTE5, 0x6b, 0x01, false, 0x00, 0x00, false, LRMM }, + { LRMM_PERSONALITY_BYTE6, 0x6c, 0x01, false, 0x00, 0x00, false, LRMM }, + { LRMM_PERSONALITY_BYTE7, 0x6d, 0x01, false, 0x00, 0x00, false, LRMM }, + { LRMM_PERSONALITY_BYTE8, 0x6e, 0x01, false, 0x00, 0x00, false, LRMM }, + { LRMM_PERSONALITY_BYTE9, 0x6f, 0x01, false, 0x00, 0x00, false, LRMM }, + { LRMM_PERSONALITY_BYTE10, 0x70, 0x01, false, 0x00, 0x00, false, LRMM }, + { LRMM_PERSONALITY_BYTE11, 0x71, 0x01, false, 0x00, 0x00, false, LRMM }, + { LRMM_PERSONALITY_BYTE12, 0x72, 0x01, false, 0x00, 0x00, false, LRMM }, + { LRMM_PERSONALITY_BYTE13, 0x73, 0x01, false, 0x00, 0x00, false, LRMM }, + { LRMM_PERSONALITY_BYTE14, 0x74, 0x01, false, 0x00, 0x00, false, LRMM }, // ---------------------------------------------------------------------------------- }; diff --git a/src/usr/spd/test/spdtest.H b/src/usr/spd/test/spdtest.H index e948fe589..7caee42a7 100755 --- a/src/usr/spd/test/spdtest.H +++ b/src/usr/spd/test/spdtest.H @@ -1,25 +1,26 @@ -// IBM_PROLOG_BEGIN_TAG -// This is an automatically generated prolog. -// -// $Source: src/usr/spd/test/spdtest.H $ -// -// IBM CONFIDENTIAL -// -// COPYRIGHT International Business Machines Corp. 2012 -// -// p1 -// -// Object Code Only (OCO) source materials -// Licensed Internal Code Source Materials -// IBM HostBoot Licensed Internal Code -// -// The source code for this program is not published or other- -// wise divested of its trade secrets, irrespective of what has -// been deposited with the U.S. Copyright Office. -// -// Origin: 30 -// -// IBM_PROLOG_END +/* IBM_PROLOG_BEGIN_TAG + * This is an automatically generated prolog. + * + * $Source: src/usr/spd/test/spdtest.H $ + * + * IBM CONFIDENTIAL + * + * COPYRIGHT International Business Machines Corp. 2012 + * + * p1 + * + * Object Code Only (OCO) source materials + * Licensed Internal Code Source Materials + * IBM HostBoot Licensed Internal Code + * + * The source code for this program is not published or other- + * wise divested of its trade secrets, irrespective of what has + * been deposited with the U.S. Copyright Office. + * + * Origin: 30 + * + * IBM_PROLOG_END_TAG + */ #ifndef __SPDTEST_H #define __SPDTEST_H @@ -121,11 +122,11 @@ class SPDTest: public CxxTest::TestSuite TS_FAIL( "testSpdRead- Failure reading Basic memory type!" ); errlCommit( err, SPD_COMP_ID ); - continue; + break;; } - for( uint64_t keyword = SPD::SPD_FIRST_KEYWORD; - keyword < SPD::SPD_LAST_KEYWORD; keyword++ ) + for( uint64_t keyword = SPD::SPD_FIRST_NORM_KEYWORD; + keyword < SPD::SPD_LAST_NORM_KEYWORD; keyword++ ) { cmds++; if( NULL != theData ) @@ -183,10 +184,10 @@ class SPDTest: public CxxTest::TestSuite continue; } - // Read was successful, print out first 2 bytes of data read + // Read was successful, print out first byte of data read TRACFCOMP( g_trac_spd, - "testSpdRead - kwd: 0x%04x, val: %02x%02x, size: %d", - keyword, theData[0], theData[1], theSize ); + "testSpdRead - kwd: 0x%04x, val: %02x, size: %d", + keyword, theData[0], theSize ); if( NULL != theData ) { @@ -243,14 +244,14 @@ class SPDTest: public CxxTest::TestSuite err = deviceWrite( theTarget, theData, theSize, - DEVICE_SPD_ADDRESS( SPD_FIRST_KEYWORD ) ); + DEVICE_SPD_ADDRESS( SPD_FIRST_NORM_KEYWORD ) ); if( NULL == err ) { // No error returned, failure fails++; TS_FAIL( "testSpdWrite - No error returned from deviceWrite()" ); - continue; + break; } else { @@ -301,13 +302,13 @@ class SPDTest: public CxxTest::TestSuite err = deviceRead( theTarget, theData, theSize, - DEVICE_SPD_ADDRESS( SPD::SPD_LAST_KEYWORD ) ); + DEVICE_SPD_ADDRESS( SPD::INVALID_SPD_KEYWORD ) ); if( NULL == err ) { fails++; TS_FAIL( "testSpdInvalidKeyword - No error returned!" ); - continue; + break; } else { @@ -358,13 +359,13 @@ class SPDTest: public CxxTest::TestSuite err = deviceRead( theTarget, theData, theSize, - DEVICE_SPD_ADDRESS( SPD::SPD_FIRST_KEYWORD ) ); + DEVICE_SPD_ADDRESS( SPD::SPD_FIRST_NORM_KEYWORD ) ); if( NULL == err ) { fails++; TS_FAIL( "testSpdInvalidSize - No error for invalid size!" ); - continue; + break; } else { @@ -380,6 +381,177 @@ class SPDTest: public CxxTest::TestSuite /** + * @brief This test will test reading the Module specific keywords. + */ + void testspdDDR3ModSpecKwds( void ) + { + errlHndl_t err = NULL; + uint64_t cmds = 0x0; + uint64_t fails = 0x0; + uint8_t memType = 0x0; + uint8_t modType = 0x0; + + TRACFCOMP( g_trac_spd, + ENTER_MRK"testspdDDR3ModSpecKwds()" ); + + do + { + TARGETING::Target * theTarget = NULL; + + // Get DIMM Targets + TargetHandleList dimmList; + getDIMMTargets( dimmList ); + + if( ( 0 == dimmList.size() ) || + ( NULL == dimmList[0] ) ) + { + TRACFCOMP( g_trac_spd, + "testspdDDR3ModSpecKwds - No DIMMs found!" ); + break; + } + + // Operate on first DIMM. + theTarget = dimmList[0]; + uint8_t * theData = NULL; + size_t theSize = 0; + uint32_t entry = 0x0; + + // Get the DDR revision + size_t tmpSize = 0x1; + err = deviceRead( theTarget, + &memType, + tmpSize, + DEVICE_SPD_ADDRESS( SPD::BASIC_MEMORY_TYPE ) ); + + if( err ) + { + fails++; + TS_FAIL( "testspdDDR3ModSpecKwds- Failure reading Basic " + "memory type!" ); + errlCommit( err, + SPD_COMP_ID ); + break; + } + + // Get the Module Type + err = deviceRead( theTarget, + &modType, + tmpSize, + DEVICE_SPD_ADDRESS( SPD::MODULE_TYPE ) ); + + if( err ) + { + fails++; + TS_FAIL( "testspdDDR3ModSpecKwds - Failure reading Module " + "type" ); + errlCommit( err, + SPD_COMP_ID ); + break; + } + + // The real Keyword read testing + for( uint64_t keyword = SPD::SPD_FIRST_MOD_SPEC; + keyword < SPD::SPD_LAST_MOD_SPEC; keyword++ ) + { + cmds++; + if( NULL != theData ) + { + free( theData ); + theData = NULL; + } + + // Get the required size of the buffer + theSize = 0; + KeywordData kwdData; + if( SPD_DDR3 == memType ) + { + for( entry = 0; + entry < (sizeof(ddr3Data)/sizeof(ddr3Data[0])); + entry++ ) + { + if( keyword == ddr3Data[entry].keyword ) + { + kwdData = ddr3Data[entry]; + theSize = ddr3Data[entry].length; + break; + } + } + + // Check type of module. + TRACFCOMP( g_trac_spd, + INFO_MRK"SPD Error traces will follow!!! " + "Not all module specific keywords will be " + "valid for all types of modules. IGNORE!!" ); + err = checkModSpecificKeyword( kwdData, + memType, + theTarget ); + + if( err ) + { + // This keyword isn't supported with this module + // type + cmds--; + delete err; + err = NULL; + continue; + } + } + else + { + // Nothing else supported yet! + // Not really a fail, just not supported + cmds--; + continue; + } + + if( 0x0 == theSize ) + { + fails++; + TS_FAIL( "testspdDDR3ModSpecKwds - Keyword (0x%04x) " + "size = 0x0", + entry ); + continue; + } + + // Allocate the buffer + theData = static_cast<uint8_t*>(malloc( theSize )); + err = deviceRead( theTarget, + theData, + theSize, + DEVICE_SPD_ADDRESS( keyword ) ); + + if( err ) + { + fails++; + TS_FAIL( "testspdDDR3ModSpecKwds - Failure on keywor" + "d: %04x", + keyword ); + errlCommit( err, + SPD_COMP_ID ); + continue; + } + + // Read was successful, print out first 2 bytes of data read + TRACFCOMP( g_trac_spd, + "testspdDDR3ModSpecKwds - kwd: 0x%04x, val: " + "%02x, size: %d", + keyword, theData[0], theSize ); + + if( NULL != theData ) + { + free( theData ); + theData = NULL; + } + } + } while( 0 ); + + TRACFCOMP( g_trac_spd, + "testspdDDR3ModSpecKwds - %d/%d fails", + fails, cmds ); + } + + + /** * @brief This test will ensure that the DDR3 lookup table is in a sorted * order, according to the keyword enumeration, to enable the search * algorithm to work correctly. |
