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-rw-r--r--src/import/chips/p9/common/scominfo/p9_scom_addr.H9
-rw-r--r--src/import/chips/p9/common/scominfo/p9_scominfo.C64
-rw-r--r--src/import/chips/p9/procedures/hwp/io/p9_io_scom.H4
3 files changed, 51 insertions, 26 deletions
diff --git a/src/import/chips/p9/common/scominfo/p9_scom_addr.H b/src/import/chips/p9/common/scominfo/p9_scom_addr.H
index 23d4c5f36..faf6fe876 100644
--- a/src/import/chips/p9/common/scominfo/p9_scom_addr.H
+++ b/src/import/chips/p9/common/scominfo/p9_scom_addr.H
@@ -540,12 +540,19 @@ extern "C"
}
/// @brief Extract the RX or TX Group ID of an indirect scom address
- /// @retval uint8_t Satellite register offset field value
+ /// @retval uint8_t RX/TX group id
inline uint8_t get_rxtx_group_id()
{
return (iv_addr >> 37) & 0x3F;
}
+ /// @brief Extract the indirect address field of a scom address
+ /// @retval uint16_t indirect address field
+ inline uint16_t get_ind_addr()
+ {
+ return (iv_addr >> 43) & 0x1FF;
+ }
+
/// @brief Modify SCOM address, update the RX or TX Group ID
/// @param[in] i_grp_id Group id to set
/// @retval none
diff --git a/src/import/chips/p9/common/scominfo/p9_scominfo.C b/src/import/chips/p9/common/scominfo/p9_scominfo.C
index 570030021..a1917e93a 100644
--- a/src/import/chips/p9/common/scominfo/p9_scominfo.C
+++ b/src/import/chips/p9/common/scominfo/p9_scominfo.C
@@ -866,42 +866,56 @@ extern "C"
l_sat_offset == P9C_MC_OFFSET_IND )
{
uint32_t l_rxtx_grp = l_scom.get_rxtx_group_id();
+ uint32_t l_ind_addr = l_scom.get_ind_addr();
- if (l_rxtx_grp >= 0x20)
+ //From iofrc_bus_reg_intf.vhdl
+ //gcr_pkt_equal_addr <= (gcr_reg_reg_addr(0 to 3) = "1111")
+ // and not (gcr_reg_reg_addr = "111111111"); --Ignore protected FIR address
+ if (((l_ind_addr & 0x1E0) == 0x1E0) && (l_ind_addr != 0x1FF))
{
- l_rxtx_grp -= 0x20;
+ o_chipUnitRelated = true;
+ o_chipUnitPairing.push_back(p9_chipUnitPairing_t(PU_MC_CHIPUNIT,
+ l_chiplet_id - MC01_CHIPLET_ID));
+
}
+ else
+ {
- uint8_t l_adder = 0;
+ if (l_rxtx_grp >= 0x20)
+ {
+ l_rxtx_grp -= 0x20;
+ }
- switch (l_rxtx_grp % 4)
- {
- case 3:
- l_adder = 0;
- break;
+ uint8_t l_adder = 0;
- case 2:
- l_adder = 1;
- break;
+ switch (l_rxtx_grp % 4)
+ {
+ case 3:
+ l_adder = 0;
+ break;
- case 0:
- l_adder = 2;
- break;
+ case 2:
+ l_adder = 1;
+ break;
- case 1:
- l_adder = 3;
- break;
+ case 0:
+ l_adder = 2;
+ break;
- default:
- //escape to bunker - math broke
- break;
- }
+ case 1:
+ l_adder = 3;
+ break;
- o_chipUnitRelated = true;
- o_chipUnitPairing.push_back(p9_chipUnitPairing_t(PU_DMI_CHIPUNIT,
- ((l_chiplet_id == MC01_CHIPLET_ID ? (0) : (4))) +
- l_adder));
+ default:
+ //escape to bunker - math broke
+ break;
+ }
+ o_chipUnitRelated = true;
+ o_chipUnitPairing.push_back(p9_chipUnitPairing_t(PU_DMI_CHIPUNIT,
+ ((l_chiplet_id == MC01_CHIPLET_ID ? (0) : (4))) +
+ l_adder));
+ }
}
}
diff --git a/src/import/chips/p9/procedures/hwp/io/p9_io_scom.H b/src/import/chips/p9/procedures/hwp/io/p9_io_scom.H
index 16c92c105..b9afde069 100644
--- a/src/import/chips/p9/procedures/hwp/io/p9_io_scom.H
+++ b/src/import/chips/p9/procedures/hwp/io/p9_io_scom.H
@@ -135,6 +135,10 @@ inline uint32_t get_base_address( const fapi2::Target < K > i_target, uint32_t&
o_base_addr = P9_DMI0_PHY_BASE_0x0701103F;
break;
+ case fapi2::TargetType::TARGET_TYPE_MC:
+ o_base_addr = P9_DMI0_PHY_BASE_0x0701103F;
+ break;
+
case fapi2::TargetType::TARGET_TYPE_ABUS:
case fapi2::TargetType::TARGET_TYPE_OBUS:
o_base_addr = P9_OBUS0_PHY_BASE_0x09010C00;
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