diff options
| -rw-r--r-- | src/include/usr/hwpf/hwp/mvpd_accessors/getMBvpdTermData.H | 190 | ||||
| -rw-r--r-- | src/include/usr/hwpf/plat/fapiPlatAttributeService.H | 187 | ||||
| -rw-r--r-- | src/usr/hwpf/hwp/mvpd_accessors/getMBvpdPhaseRotatorData.C | 13 | ||||
| -rw-r--r-- | src/usr/hwpf/hwp/mvpd_accessors/getMBvpdTermData.C | 321 | ||||
| -rw-r--r-- | src/usr/hwpf/hwp/mvpd_accessors/mvpd.mk | 3 | ||||
| -rw-r--r-- | src/usr/hwpf/hwp/mvpd_accessors/mvpd_errors.xml | 16 | ||||
| -rw-r--r-- | src/usr/hwpf/plat/fapiPlatAttributeService.C | 14 | ||||
| -rw-r--r-- | src/usr/hwpf/test/fapiwinkletest.H | 528 | ||||
| -rw-r--r-- | src/usr/targeting/common/xmltohb/attribute_types.xml | 162 | ||||
| -rw-r--r-- | src/usr/targeting/common/xmltohb/target_types.xml | 28 |
10 files changed, 1358 insertions, 104 deletions
diff --git a/src/include/usr/hwpf/hwp/mvpd_accessors/getMBvpdTermData.H b/src/include/usr/hwpf/hwp/mvpd_accessors/getMBvpdTermData.H new file mode 100644 index 000000000..57a6f111f --- /dev/null +++ b/src/include/usr/hwpf/hwp/mvpd_accessors/getMBvpdTermData.H @@ -0,0 +1,190 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/include/usr/hwpf/hwp/mvpd_accessors/getMBvpdTermData.H $ */ +/* */ +/* IBM CONFIDENTIAL */ +/* */ +/* COPYRIGHT International Business Machines Corp. 2012,2013 */ +/* */ +/* p1 */ +/* */ +/* Object Code Only (OCO) source materials */ +/* Licensed Internal Code Source Materials */ +/* IBM HostBoot Licensed Internal Code */ +/* */ +/* The source code for this program is not published or otherwise */ +/* divested of its trade secrets, irrespective of what has been */ +/* deposited with the U.S. Copyright Office. */ +/* */ +/* Origin: 30 */ +/* */ +/* IBM_PROLOG_END_TAG */ +// $Id: getMBvpdTermData.H,v 1.1 2013/05/28 11:17:29 whs Exp $ + +/** + * @file getMBvpdTermData.H + * + * @brief Prototype for getMBvpdTermData() - + * get Termination Data from MBvpd + */ + +#ifndef _HWP_MBVPDTERMDATA_ +#define _HWP_MBVPDTERMDATA_ + +#include <fapi.H> + +namespace fapi +{ + +// Values match offset into MT keyword cvpd data +// There are multiple types of output values. The type is shown in the comment + enum MBvpdTermData + { + TERM_DATA_DRAM_RON = 0x00, //uint8_t [2][2] + TERM_DATA_DRAM_RTT_NOM = 0x02, //uint8_t [2][2][4] + TERM_DATA_DRAM_RTT_WR = 0x0a, //uint8_t [2][2][4] + TERM_DATA_ODT_RD = 0x12, //uint8_t [2][2][4] + TERM_DATA_ODT_WR = 0x1a, //uint8_t [2][2][4] + TERM_DATA_CEN_RD_VREF = 0x22, //uint32_t [2] + TERM_DATA_DRAM_WR_VREF = 0x26, //uint32_t [2] + TERM_DATA_DRAM_WRDDR4_VREF = 0x2a, //uint8_t [2] + TERM_DATA_CEN_RCV_IMP_DQ_DQS = 0x2b, //uint8_t [2] + TERM_DATA_CEN_DRV_IMP_DQ_DQS = 0x2c, //uint8_t [2] + TERM_DATA_CEN_DRV_IMP_CNTL = 0x2d, //uint8_t [2] + TERM_DATA_CEN_DRV_IMP_ADDR = 0x2e, //uint8_t [2] + TERM_DATA_CEN_DRV_IMP_CLK = 0x2f, //uint8_t [2] + TERM_DATA_CEN_DRV_IMP_SPCKE = 0x30, //uint8_t [2] + TERM_DATA_CEN_SLEW_RATE_DQ_DQS = 0x31, //uint8_t [2] + TERM_DATA_CEN_SLEW_RATE_CNTL = 0x32, //uint8_t [2] + TERM_DATA_CEN_SLEW_RATE_ADDR = 0x33, //uint8_t [2] + TERM_DATA_CEN_SLEW_RATE_CLK = 0x34, //uint8_t [2] + TERM_DATA_CEN_SLEW_RATE_SPCKE = 0x35, //uint8_t [2] +// The max value is 0x3e. The MT keyword is 255 bytes divided into four +// 64 byte sections, but the last one is 1 byte short. There is only room for +// 63 bytes of attributes per section. + }; +} + +// Template class that is specialized for each attribute specifying it's type +template<const fapi::MBvpdTermData A> + class MBvpdTermDataSize { }; +template<>class MBvpdTermDataSize<fapi::TERM_DATA_DRAM_RON> + { public: typedef uint8_t Type[2][2]; }; +template<>class MBvpdTermDataSize<fapi::TERM_DATA_DRAM_RTT_NOM> + { public: typedef uint8_t Type[2][2][4]; }; +template<>class MBvpdTermDataSize<fapi::TERM_DATA_DRAM_RTT_WR> + { public: typedef uint8_t Type[2][2][4]; }; +template<>class MBvpdTermDataSize<fapi::TERM_DATA_ODT_RD> + { public: typedef uint8_t Type[2][2][4]; }; +template<>class MBvpdTermDataSize<fapi::TERM_DATA_ODT_WR> + { public: typedef uint8_t Type[2][2][4]; }; +template<>class MBvpdTermDataSize<fapi::TERM_DATA_CEN_RD_VREF> + { public: typedef uint32_t Type[2]; }; +template<>class MBvpdTermDataSize<fapi::TERM_DATA_DRAM_WR_VREF> + { public: typedef uint32_t Type[2]; }; +template<>class MBvpdTermDataSize<fapi::TERM_DATA_DRAM_WRDDR4_VREF> + { public: typedef uint8_t Type[2]; }; +template<>class MBvpdTermDataSize<fapi::TERM_DATA_CEN_RCV_IMP_DQ_DQS> + { public: typedef uint8_t Type[2]; }; +template<>class MBvpdTermDataSize<fapi::TERM_DATA_CEN_DRV_IMP_DQ_DQS> + { public: typedef uint8_t Type[2]; }; +template<>class MBvpdTermDataSize<fapi::TERM_DATA_CEN_DRV_IMP_CNTL> + { public: typedef uint8_t Type[2]; }; +template<>class MBvpdTermDataSize<fapi::TERM_DATA_CEN_DRV_IMP_ADDR> + { public: typedef uint8_t Type[2]; }; +template<>class MBvpdTermDataSize<fapi::TERM_DATA_CEN_DRV_IMP_CLK> + { public: typedef uint8_t Type[2]; }; +template<>class MBvpdTermDataSize<fapi::TERM_DATA_CEN_DRV_IMP_SPCKE> + { public: typedef uint8_t Type[2]; }; +template<>class MBvpdTermDataSize<fapi::TERM_DATA_CEN_SLEW_RATE_DQ_DQS> + { public: typedef uint8_t Type[2]; }; +template<>class MBvpdTermDataSize<fapi::TERM_DATA_CEN_SLEW_RATE_CNTL> + { public: typedef uint8_t Type[2]; }; +template<>class MBvpdTermDataSize<fapi::TERM_DATA_CEN_SLEW_RATE_ADDR> + { public: typedef uint8_t Type[2]; }; +template<>class MBvpdTermDataSize<fapi::TERM_DATA_CEN_SLEW_RATE_CLK> + { public: typedef uint8_t Type[2]; }; +template<>class MBvpdTermDataSize<fapi::TERM_DATA_CEN_SLEW_RATE_SPCKE> + { public: typedef uint8_t Type[2]; }; + +// Template function that checks that the type is as expected. +// This can be optionally called before calling the main HWP in order +// to check for the expected type at compile-time. +template<const fapi::MBvpdTermData ATTR> + inline void checkTermDataType + (typename MBvpdTermDataSize<ATTR>::Type &) {} +/* example +#define ATTR_EFF_DRAM_RON_GETMACRO(ID, PTARGET, VAL)\ + (checkTermDataType<fapi::TERM_DATA_DRAM_RON>(VAL), \ + fapi::platAttrSvc::fapiPlatGetTermData\ + (PTARGET, fapi::TERM_DATA_DRAM_RON , VAL, sizeof(VAL))) +*/ +// The complilation will fail unless the output variable matches the type +// in the per attribute template specialization. The error messages will +// include text related to template MBvpdTermDataSize not be able to convert +// the incorrect output variable's type to the expected type. +// +// There will be an additonal error from the general attribute compliation +// checks related to fapiCheckIdType if the output type does not match +// any of the expected types +// +// The inline function checkTermData will be optimized out by the compiler. + +// function pointer typedef definition for HWP call support +typedef fapi::ReturnCode (*getMBvpdTermData_FP_t) + (const fapi::Target &, const fapi::MBvpdTermData, + void *, const uint32_t); + +extern "C" +{ +/** + * @brief get Termination Data from cvpd record VSPD keyword MT + * + * The Termination Data attributes are retrieved from cvpd record VSPD + * keyword MT. + * There are two mba per memory buffer: position 0 and position 1. + * There are two ports for each mba. There are 4 sets of Termination + * Data attributes. + * + * cpvd record VSPD keyword MT + * ----------------------------------- + * | mba position 0 | + * | ----------------------------- | + * | | port 0 (Port A) 64 bytes | | + * | |---------------------------| | + * | | port 1 (Port B) 64 bytes | | + * | ----------------------------- | + * |---------------------------------| + * | mba postion 1 | + * | ----------------------------- | + * | | port 0 (Port C) 64 bytes | | + * | |---------------------------| | + * | | port 1 (Port D) 63 bytes | | + * | ----------------------------- | + * ----------------------------------- + * + * The Termination Data attributes have multiple types. The output value + * is a general void * to handle the multiple attributes types. The expected + * output variable type is shown in the attribute enumeration comment and in + * the MBvpdTermDataSize template. + * An error will be returned if output size does not match the size of the + * expected output type's size. + * + * @param[in] i_mbaTarget - mba target + * @param[in] i_attr - Termination Data attribute enumerator + * @param[out] o_pVal - pointer to variable typed output variable + * @param[in] i_valSize - size of output variable + * + * @return fapi::ReturnCode - FAPI_RC_SUCCESS if success, + * relevant error code for failure. + */ +fapi::ReturnCode getMBvpdTermData( + const fapi::Target &i_mbaTarget, + const fapi::MBvpdTermData i_attr, + void * o_pVal, + const uint32_t i_valSize); + +} + +#endif diff --git a/src/include/usr/hwpf/plat/fapiPlatAttributeService.H b/src/include/usr/hwpf/plat/fapiPlatAttributeService.H index 0d423acdf..c45250917 100644 --- a/src/include/usr/hwpf/plat/fapiPlatAttributeService.H +++ b/src/include/usr/hwpf/plat/fapiPlatAttributeService.H @@ -55,6 +55,7 @@ #include <hwpf/plat/fapiPlatAttrOverrideSync.H> #include <hwpf/hwp/mvpd_accessors/getMBvpdPhaseRotatorData.H> #include <hwpf/hwp/mvpd_accessors/getMBvpdAddrMirrorData.H> +#include <hwpf/hwp/mvpd_accessors/getMBvpdTermData.H> #include <vpd/spdenums.H> #include <dimmConsts.H> #include <util/singleton.H> @@ -453,6 +454,7 @@ fapi::ReturnCode fapiPlatGetPhaseRotatorData ( const fapi::Target * i_pTarget, const fapi::MBvpdPhaseRotatorData i_attr, uint8_t (&o_val) [2] ); + /** * @brief This function is called by the FAPI_ATTR_GET macro when getting * the Address Mirroring Data attributes @@ -466,7 +468,22 @@ fapi::ReturnCode fapiPlatGetAddrMirrorData ( const fapi::Target * i_pTarget, uint8_t &o_val); - +/** + * @brief This function is called by the FAPI_ATTR_GET macro when getting + * the Termination Data attributes + * It should not be called directly. + * + * @param[in] i_pTarget Target pointer + * @param i_attr Termination Data attribute enumerator + * @param o_pVal Pointer to variable typed output values + * @param i_valSize Size of output variable + * @return ReturnCode. Zero on success, else platform specified error + */ +fapi::ReturnCode fapiPlatGetTermData ( + const fapi::Target * i_pTarget, + const fapi::MBvpdTermData i_attr, + void * o_pVal, + const uint32_t i_valSize); } // namespace platAttrSvc } // namespace fapi @@ -774,6 +791,8 @@ fapi::ReturnCode fapiPlatGetAddrMirrorData ( // MACROS to support MVPD attributes //------------------------------------------------------------------------------ #define ATTR_EX_L2_SINGLE_MEMBER_ENABLE_GETMACRO( ID, PTARGET, VAL ) \ + fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ?\ + fapi::FAPI_RC_SUCCESS :\ fapi::platAttrSvc::fapiPlatGetSingleMemberEnableAttr ( PTARGET, VAL ) // TODO: RTC 69935 complete Phase Rotator Data. @@ -1086,4 +1105,170 @@ fapi::ReturnCode fapiPlatGetAddrMirrorData ( fapi::FAPI_RC_SUCCESS : fapi::platAttrSvc::fapiPlatGetAddrMirrorData\ (PTARGET, VAL) +//------------------------------------------------------------------------------ +// MACROS to support MBVPD Termination Data attributes +//------------------------------------------------------------------------------ +// TODO: RTC 69935 complete Termination Data. +// Use this code to fully implements 50574. +// Remove Termination Data attributes from attribute_types.xml +// and target_types.xml then enable the following. +// The "sets" are only needed to temporarily allow mss_eff_config_termination.C +// to do FAPI_ATTR_SET, but need to be removed when fully complete. +#if RTC69935 +#define ATTR_EFF_DRAM_RON_GETMACRO(ID, PTARGET, VAL)\ + fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ?\ + fapi::FAPI_RC_SUCCESS :\ + (checkTermDataType<fapi::TERM_DATA_DRAM_RON>(VAL), \ + fapi::platAttrSvc::fapiPlatGetTermData\ + (PTARGET, fapi::TERM_DATA_DRAM_RON , VAL, sizeof(VAL))) +#define ATTR_EFF_DRAM_RTT_NOM_GETMACRO(ID, PTARGET, VAL)\ + fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ?\ + fapi::FAPI_RC_SUCCESS :\ + (checkTermDataType<fapi::TERM_DATA_DRAM_RTT_NOM>(VAL), \ + fapi::platAttrSvc::fapiPlatGetTermData\ + (PTARGET, fapi::TERM_DATA_DRAM_RTT_NOM , VAL, sizeof(VAL))) +#define ATTR_EFF_DRAM_RTT_WR_GETMACRO(ID, PTARGET, VAL)\ + fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ?\ + fapi::FAPI_RC_SUCCESS :\ + (checkTermDataType<fapi::TERM_DATA_DRAM_RTT_WR>(VAL), \ + fapi::platAttrSvc::fapiPlatGetTermData\ + (PTARGET, fapi::TERM_DATA_DRAM_RTT_WR , VAL, sizeof(VAL))) +#define ATTR_EFF_ODT_RD_GETMACRO(ID, PTARGET, VAL)\ + fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ?\ + fapi::FAPI_RC_SUCCESS :\ + (checkTermDataType<fapi::TERM_DATA_ODT_RD>(VAL), \ + fapi::platAttrSvc::fapiPlatGetTermData\ + (PTARGET, fapi::TERM_DATA_ODT_RD , VAL, sizeof(VAL))) +#define ATTR_EFF_ODT_WR_GETMACRO(ID, PTARGET, VAL)\ + fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ?\ + fapi::FAPI_RC_SUCCESS :\ + (checkTermDataType<fapi::TERM_DATA_ODT_WR>(VAL), \ + fapi::platAttrSvc::fapiPlatGetTermData\ + (PTARGET, fapi::TERM_DATA_ODT_WR , VAL, sizeof(VAL))) +#define ATTR_EFF_CEN_RD_VREF_GETMACRO(ID, PTARGET, VAL)\ + fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ?\ + fapi::FAPI_RC_SUCCESS :\ + (checkTermDataType<fapi::TERM_DATA_CEN_RD_VREF>(VAL), \ + fapi::platAttrSvc::fapiPlatGetTermData\ + (PTARGET, fapi::TERM_DATA_CEN_RD_VREF , VAL, sizeof(VAL))) +#define ATTR_EFF_DRAM_WR_VREF_GETMACRO(ID, PTARGET, VAL)\ + fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ?\ + fapi::FAPI_RC_SUCCESS :\ + (checkTermDataType<fapi::TERM_DATA_DRAM_WR_VREF>(VAL), \ + fapi::platAttrSvc::fapiPlatGetTermData\ + (PTARGET, fapi::TERM_DATA_DRAM_WR_VREF , VAL, sizeof(VAL))) +#define ATTR_EFF_DRAM_WRDDR4_VREF_GETMACRO(ID, PTARGET, VAL)\ + fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ?\ + fapi::FAPI_RC_SUCCESS :\ + (checkTermDataType<fapi::TERM_DATA_DRAM_WRDDR4_VREF>(VAL), \ + fapi::platAttrSvc::fapiPlatGetTermData\ + (PTARGET, fapi::TERM_DATA_DRAM_WRDDR4_VREF , VAL, sizeof(VAL))) +#define ATTR_EFF_CEN_RCV_IMP_DQ_DQS_GETMACRO(ID, PTARGET, VAL)\ + fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ?\ + fapi::FAPI_RC_SUCCESS :\ + (checkTermDataType<fapi::TERM_DATA_CEN_RCV_IMP_DQ_DQS>(VAL), \ + fapi::platAttrSvc::fapiPlatGetTermData\ + (PTARGET, fapi::TERM_DATA_CEN_RCV_IMP_DQ_DQS , VAL, sizeof(VAL))) +#define ATTR_EFF_CEN_DRV_IMP_DQ_DQS_GETMACRO(ID, PTARGET, VAL)\ + fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ?\ + fapi::FAPI_RC_SUCCESS :\ + (checkTermDataType<fapi::TERM_DATA_CEN_DRV_IMP_DQ_DQS>(VAL), \ + fapi::platAttrSvc::fapiPlatGetTermData\ + (PTARGET, fapi::TERM_DATA_CEN_DRV_IMP_DQ_DQS , VAL, sizeof(VAL))) +#define ATTR_EFF_CEN_DRV_IMP_CNTL_GETMACRO(ID, PTARGET, VAL)\ + fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ?\ + fapi::FAPI_RC_SUCCESS :\ + (checkTermDataType<fapi::TERM_DATA_CEN_DRV_IMP_CNTL>(VAL), \ + fapi::platAttrSvc::fapiPlatGetTermData\ + (PTARGET, fapi::TERM_DATA_CEN_DRV_IMP_CNTL , VAL, sizeof(VAL))) +#define ATTR_EFF_CEN_DRV_IMP_ADDR_GETMACRO(ID, PTARGET, VAL)\ + fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ?\ + fapi::FAPI_RC_SUCCESS :\ + (checkTermDataType<fapi::TERM_DATA_CEN_DRV_IMP_ADDR>(VAL), \ + fapi::platAttrSvc::fapiPlatGetTermData\ + (PTARGET, fapi::TERM_DATA_CEN_DRV_IMP_ADDR , VAL, sizeof(VAL))) +#define ATTR_EFF_CEN_DRV_IMP_CLK_GETMACRO(ID, PTARGET, VAL)\ + fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ?\ + fapi::FAPI_RC_SUCCESS :\ + (checkTermDataType<fapi::TERM_DATA_CEN_DRV_IMP_CLK>(VAL), \ + fapi::platAttrSvc::fapiPlatGetTermData\ + (PTARGET, fapi::TERM_DATA_CEN_DRV_IMP_CLK , VAL, sizeof(VAL))) +#define ATTR_EFF_CEN_DRV_IMP_SPCKE_GETMACRO(ID, PTARGET, VAL)\ + fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ?\ + fapi::FAPI_RC_SUCCESS :\ + (checkTermDataType<fapi::TERM_DATA_CEN_DRV_IMP_SPCKE>(VAL), \ + fapi::platAttrSvc::fapiPlatGetTermData\ + (PTARGET, fapi::TERM_DATA_CEN_DRV_IMP_SPCKE , VAL, sizeof(VAL))) +#define ATTR_EFF_CEN_SLEW_RATE_DQ_DQS_GETMACRO(ID, PTARGET, VAL)\ + fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ?\ + fapi::FAPI_RC_SUCCESS :\ + (checkTermDataType<fapi::TERM_DATA_CEN_SLEW_RATE_DQ_DQS>(VAL), \ + fapi::platAttrSvc::fapiPlatGetTermData\ + (PTARGET, fapi::TERM_DATA_CEN_SLEW_RATE_DQ_DQS , VAL, sizeof(VAL))) +#define ATTR_EFF_CEN_SLEW_RATE_CNTL_GETMACRO(ID, PTARGET, VAL)\ + fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ?\ + fapi::FAPI_RC_SUCCESS :\ + (checkTermDataType<fapi::TERM_DATA_CEN_SLEW_RATE_CNTL>(VAL), \ + fapi::platAttrSvc::fapiPlatGetTermData\ + (PTARGET, fapi::TERM_DATA_CEN_SLEW_RATE_CNTL , VAL, sizeof(VAL))) +#define ATTR_EFF_CEN_SLEW_RATE_ADDR_GETMACRO(ID, PTARGET, VAL)\ + fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ?\ + fapi::FAPI_RC_SUCCESS :\ + (checkTermDataType<fapi::TERM_DATA_CEN_SLEW_RATE_ADDR>(VAL), \ + fapi::platAttrSvc::fapiPlatGetTermData\ + (PTARGET, fapi::TERM_DATA_CEN_SLEW_RATE_ADDR , VAL, sizeof(VAL))) +#define ATTR_EFF_CEN_SLEW_RATE_CLK_GETMACRO(ID, PTARGET, VAL)\ + fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ?\ + fapi::FAPI_RC_SUCCESS :\ + (checkTermDataType<fapi::TERM_DATA_CEN_SLEW_RATE_CLK>(VAL), \ + fapi::platAttrSvc::fapiPlatGetTermData\ + (PTARGET, fapi::TERM_DATA_CEN_SLEW_RATE_CLK , VAL, sizeof(VAL))) +#define ATTR_EFF_CEN_SLEW_RATE_SPCKE_GETMACRO(ID, PTARGET, VAL)\ + fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ?\ + fapi::FAPI_RC_SUCCESS :\ + (checkTermDataType<fapi::TERM_DATA_CEN_SLEW_RATE_SPCKE>(VAL), \ + fapi::platAttrSvc::fapiPlatGetTermData\ + (PTARGET, fapi::TERM_DATA_CEN_SLEW_RATE_SPCKE , VAL, sizeof(VAL))) + +#define ATTR_EFF_DRAM_RON_SETMACRO(ID, PTARGET, VAL)\ + fapi::FAPI_RC_SUCCESS +#define ATTR_EFF_DRAM_RTT_NOM_SETMACRO(ID, PTARGET, VAL)\ + fapi::FAPI_RC_SUCCESS +#define ATTR_EFF_DRAM_RTT_WR_SETMACRO(ID, PTARGET, VAL)\ + fapi::FAPI_RC_SUCCESS +#define ATTR_EFF_ODT_RD_SETMACRO(ID, PTARGET, VAL)\ + fapi::FAPI_RC_SUCCESS +#define ATTR_EFF_ODT_WR_SETMACRO(ID, PTARGET, VAL)\ + fapi::FAPI_RC_SUCCESS +#define ATTR_EFF_CEN_RD_VREF_SETMACRO(ID, PTARGET, VAL)\ + fapi::FAPI_RC_SUCCESS +#define ATTR_EFF_DRAM_WR_VREF_SETMACRO(ID, PTARGET, VAL)\ + fapi::FAPI_RC_SUCCESS +#define ATTR_EFF_DRAM_WRDDR4_VREF_SETMACRO(ID, PTARGET, VAL)\ + fapi::FAPI_RC_SUCCESS +#define ATTR_EFF_CEN_RCV_IMP_DQ_DQS_SETMACRO(ID, PTARGET, VAL)\ + fapi::FAPI_RC_SUCCESS +#define ATTR_EFF_CEN_DRV_IMP_DQ_DQS_SETMACRO(ID, PTARGET, VAL)\ + fapi::FAPI_RC_SUCCESS +#define ATTR_EFF_CEN_DRV_IMP_CNTL_SETMACRO(ID, PTARGET, VAL)\ + fapi::FAPI_RC_SUCCESS +#define ATTR_EFF_CEN_DRV_IMP_ADDR_SETMACRO(ID, PTARGET, VAL)\ + fapi::FAPI_RC_SUCCESS +#define ATTR_EFF_CEN_DRV_IMP_CLK_SETMACRO(ID, PTARGET, VAL)\ + fapi::FAPI_RC_SUCCESS +#define ATTR_EFF_CEN_DRV_IMP_SPCKE_SETMACRO(ID, PTARGET, VAL)\ + fapi::FAPI_RC_SUCCESS +#define ATTR_EFF_CEN_SLEW_RATE_DQ_DQS_SETMACRO(ID, PTARGET, VAL)\ + fapi::FAPI_RC_SUCCESS +#define ATTR_EFF_CEN_SLEW_RATE_CNTL_SETMACRO(ID, PTARGET, VAL)\ + fapi::FAPI_RC_SUCCESS +#define ATTR_EFF_CEN_SLEW_RATE_ADDR_SETMACRO(ID, PTARGET, VAL)\ + fapi::FAPI_RC_SUCCESS +#define ATTR_EFF_CEN_SLEW_RATE_CLK_SETMACRO(ID, PTARGET, VAL)\ + fapi::FAPI_RC_SUCCESS +#define ATTR_EFF_CEN_SLEW_RATE_SPCKE_SETMACRO(ID, PTARGET, VAL)\ + fapi::FAPI_RC_SUCCESS +#endif + + #endif // FAPIPLATATTRIBUTESERVICE_H_ diff --git a/src/usr/hwpf/hwp/mvpd_accessors/getMBvpdPhaseRotatorData.C b/src/usr/hwpf/hwp/mvpd_accessors/getMBvpdPhaseRotatorData.C index f81554342..4f44536c7 100644 --- a/src/usr/hwpf/hwp/mvpd_accessors/getMBvpdPhaseRotatorData.C +++ b/src/usr/hwpf/hwp/mvpd_accessors/getMBvpdPhaseRotatorData.C @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: getMBvpdPhaseRotatorData.C,v 1.2 2013/04/29 16:44:00 whs Exp $ +// $Id: getMBvpdPhaseRotatorData.C,v 1.3 2013/05/28 10:52:53 whs Exp $ /** * @file getMBvpdPhaseRotatorData.C * @@ -65,6 +65,7 @@ fapi::ReturnCode getMBvpdPhaseRotatorData( // The actual size of the MR keword is 255 bytes, which is one byte short // of the mr_keyword struct. One byte is used for the size in the vpd. // As long as there is at least one reserved attribute, then all will fit. + const uint32_t MR_KEYWORD_SIZE = 255; // keyword size fapi::ReturnCode l_fapirc; fapi::Target l_mbTarget; @@ -112,14 +113,14 @@ fapi::ReturnCode getMBvpdPhaseRotatorData( } // Check that sufficient MR was returned. - uint32_t l_sizeNeeded = l_pos*sizeof(mba_attributes)+ - sizeof(port_attributes)+i_attr; - if (l_MrBufsize < l_sizeNeeded ) + if (l_MrBufsize < MR_KEYWORD_SIZE ) { FAPI_ERR("getMBvpdPhaseRotatorData:" " less MR keyword returned than expected %d < %d", - l_MrBufsize, l_sizeNeeded); - FAPI_SET_HWP_ERROR(l_fapirc, RC_MBVPD_INSUFFICIENT_MR_KEYWORD ); + l_MrBufsize, MR_KEYWORD_SIZE); + const uint32_t & KEYWORD = fapi::MBVPD_KEYWORD_MR; + const uint32_t & RETURNED_SIZE = l_MrBufsize; + FAPI_SET_HWP_ERROR(l_fapirc, RC_MBVPD_INSUFFICIENT_VPD_RETURNED ); break; // break out with fapirc } diff --git a/src/usr/hwpf/hwp/mvpd_accessors/getMBvpdTermData.C b/src/usr/hwpf/hwp/mvpd_accessors/getMBvpdTermData.C new file mode 100644 index 000000000..eaaf1339e --- /dev/null +++ b/src/usr/hwpf/hwp/mvpd_accessors/getMBvpdTermData.C @@ -0,0 +1,321 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/hwpf/hwp/mvpd_accessors/getMBvpdTermData.C $ */ +/* */ +/* IBM CONFIDENTIAL */ +/* */ +/* COPYRIGHT International Business Machines Corp. 2012,2013 */ +/* */ +/* p1 */ +/* */ +/* Object Code Only (OCO) source materials */ +/* Licensed Internal Code Source Materials */ +/* IBM HostBoot Licensed Internal Code */ +/* */ +/* The source code for this program is not published or otherwise */ +/* divested of its trade secrets, irrespective of what has been */ +/* deposited with the U.S. Copyright Office. */ +/* */ +/* Origin: 30 */ +/* */ +/* IBM_PROLOG_END_TAG */ +// $Id: getMBvpdTermData.C,v 1.1 2013/05/28 11:17:23 whs Exp $ +/** + * @file getMBvpdTermData.C + * + * @brief get Termination Data from MBvpd MT keyword + * + */ + +#include <stdint.h> + +// fapi support +#include <fapi.H> +#include <fapiUtil.H> +#include <getMBvpdTermData.H> + +extern "C" +{ +using namespace fapi; + +fapi::ReturnCode getMBvpdTermData( + const fapi::Target &i_mbaTarget, + const fapi::MBvpdTermData i_attr, + void * o_pVal, + const uint32_t i_valSize) +{ + //MT keyword layout + //The following constants are for readibility. They need to stay in sync + // with the attributes and vpd layout. + const uint8_t NUM_MBA = 2; //There are 2 MBAs per Centaur memory buffer + const uint8_t NUM_PORTS = 2; //Each MBA has 2 ports + const uint8_t NUM_DIMMS = 2; //Each port has 2 DIMMs + const uint8_t NUM_RANKS = 4; //Number of ranks + const uint8_t TERM_DATA_ATTR_SIZE = 64; //Each port has 64 bytes + // for attributes + struct port_attributes + { + uint8_t port_attr[TERM_DATA_ATTR_SIZE]; + }; + struct mba_attributes + { + port_attributes mba_port[NUM_PORTS]; + }; + struct mt_keyword + { + mba_attributes mb_mba[NUM_MBA]; + }; + // The actual size of the MT keyword is 255 bytes, which is one byte short + // of the mt_keyword struct. One byte is used for the size in the vpd. + // As long as there is at least one reserved attribute, then all will fit. + const uint32_t MT_KEYWORD_SIZE = 255; // keyword size + + fapi::ReturnCode l_fapirc; + fapi::Target l_mbTarget; + uint8_t l_pos = NUM_PORTS; //initialize to out of range value (+1) + mt_keyword * l_pMtBuffer = NULL; // MBvpd MT keyword buffer + uint32_t l_MtBufsize = sizeof(mt_keyword); + uint32_t l_sizeCheck = 0; //invalid size + + FAPI_DBG("getMBvpdTermData: entry attr=0x%02x, size=%d ", + i_attr,i_valSize ); + + do { + // validate proper output variable size for the attribute + switch (i_attr) + { + case TERM_DATA_DRAM_RON: + l_sizeCheck= + sizeof (MBvpdTermDataSize<TERM_DATA_DRAM_RON>::Type); + break; + case TERM_DATA_DRAM_RTT_NOM: + l_sizeCheck= + sizeof (MBvpdTermDataSize<TERM_DATA_DRAM_RTT_NOM>::Type); + break; + case TERM_DATA_DRAM_RTT_WR: + l_sizeCheck= + sizeof (MBvpdTermDataSize<TERM_DATA_DRAM_RTT_WR>::Type); + break; + case TERM_DATA_ODT_RD: + l_sizeCheck= + sizeof (MBvpdTermDataSize<TERM_DATA_ODT_RD>::Type); + break; + case TERM_DATA_ODT_WR: + l_sizeCheck= + sizeof (MBvpdTermDataSize<TERM_DATA_ODT_WR>::Type); + break; + case TERM_DATA_CEN_RD_VREF: + l_sizeCheck= + sizeof (MBvpdTermDataSize<TERM_DATA_CEN_RD_VREF>::Type); + break; + case TERM_DATA_DRAM_WR_VREF: + l_sizeCheck= + sizeof (MBvpdTermDataSize<TERM_DATA_DRAM_WR_VREF>::Type); + break; + case TERM_DATA_DRAM_WRDDR4_VREF: + l_sizeCheck= + sizeof (MBvpdTermDataSize<TERM_DATA_DRAM_WRDDR4_VREF>::Type); + break; + case TERM_DATA_CEN_RCV_IMP_DQ_DQS: + l_sizeCheck= + sizeof (MBvpdTermDataSize<TERM_DATA_CEN_RCV_IMP_DQ_DQS>::Type); + break; + case TERM_DATA_CEN_DRV_IMP_DQ_DQS: + l_sizeCheck= + sizeof (MBvpdTermDataSize<TERM_DATA_CEN_DRV_IMP_DQ_DQS>::Type); + break; + case TERM_DATA_CEN_DRV_IMP_CNTL: + l_sizeCheck= + sizeof (MBvpdTermDataSize<TERM_DATA_CEN_DRV_IMP_CNTL>::Type); + break; + case TERM_DATA_CEN_DRV_IMP_ADDR: + l_sizeCheck= + sizeof (MBvpdTermDataSize<TERM_DATA_CEN_DRV_IMP_ADDR>::Type); + break; + case TERM_DATA_CEN_DRV_IMP_CLK: + l_sizeCheck= + sizeof (MBvpdTermDataSize<TERM_DATA_CEN_DRV_IMP_CLK>::Type); + break; + case TERM_DATA_CEN_DRV_IMP_SPCKE: + l_sizeCheck= + sizeof (MBvpdTermDataSize<TERM_DATA_CEN_DRV_IMP_SPCKE>::Type); + break; + case TERM_DATA_CEN_SLEW_RATE_DQ_DQS: + l_sizeCheck= + sizeof (MBvpdTermDataSize<TERM_DATA_CEN_SLEW_RATE_DQ_DQS>::Type); + break; + case TERM_DATA_CEN_SLEW_RATE_CNTL: + l_sizeCheck= + sizeof (MBvpdTermDataSize<TERM_DATA_CEN_SLEW_RATE_CNTL>::Type); + break; + case TERM_DATA_CEN_SLEW_RATE_ADDR: + l_sizeCheck= + sizeof (MBvpdTermDataSize<TERM_DATA_CEN_SLEW_RATE_ADDR>::Type); + break; + case TERM_DATA_CEN_SLEW_RATE_CLK: + l_sizeCheck= + sizeof (MBvpdTermDataSize<TERM_DATA_CEN_SLEW_RATE_CLK>::Type); + break; + case TERM_DATA_CEN_SLEW_RATE_SPCKE: + l_sizeCheck= + sizeof (MBvpdTermDataSize<TERM_DATA_CEN_SLEW_RATE_SPCKE>::Type); + break; + default: // Hard to do, but needs to be caught + FAPI_ERR("getMBvpdTermData: invalid attribute ID 0x%02x", + i_attr); + const fapi::MBvpdTermData & ATTR_ID = i_attr; + FAPI_SET_HWP_ERROR(l_fapirc, RC_MBVPD_INVALID_ATTRIBUTE_ID); + break; // break out with fapirc + } + if (l_fapirc) + { + break; // break out with fapirc + } + if (l_sizeCheck != i_valSize) + { + FAPI_ERR("getMBvpdTermData:" + " output variable size does not match expected %d != %d", + l_sizeCheck, i_valSize); + const uint32_t & EXPECTED_SIZE = l_sizeCheck; + const uint32_t & PASSED_SIZE = i_valSize; + FAPI_SET_HWP_ERROR(l_fapirc, RC_MBVPD_INVALID_OUTPUT_VARIABLE_SIZE); + break; // break out with fapirc + } + + // find the position of the passed mba on the centuar + l_fapirc = FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS,&i_mbaTarget,l_pos); + if (l_fapirc) + { + FAPI_ERR(" getMBvpdTermData: Get MBA position failed "); + break; // break out with fapirc + } + FAPI_DBG("getMBvpdTermData: mba %s position=%d", + i_mbaTarget.toEcmdString(), + l_pos); + + // find the Centaur memmory buffer from the passed MBA + l_fapirc = fapiGetParentChip (i_mbaTarget,l_mbTarget); + if (l_fapirc) + { + FAPI_ERR("getMBvpdTermData: Finding the parent mb failed "); + break; // break out with fapirc + } + FAPI_DBG("getMBvpdTermData: parent path=%s ", + l_mbTarget.toEcmdString() ); + + // Read the MT keyword field + l_pMtBuffer = new mt_keyword; + + l_fapirc = fapiGetMBvpdField(fapi::MBVPD_RECORD_VSPD, + fapi::MBVPD_KEYWORD_MT, + l_mbTarget, + reinterpret_cast<uint8_t *>(l_pMtBuffer), + l_MtBufsize); + if (l_fapirc) + { + FAPI_ERR("getMBvpdTermData: Read of MT keyword failed"); + break; // break out with fapirc + } + + // Check that sufficient MT was returned. + if (l_MtBufsize < MT_KEYWORD_SIZE ) + { + FAPI_ERR("getMBvpdTermData:" + " less MT keyword returned than expected %d < %d", + l_MtBufsize, MT_KEYWORD_SIZE); + const uint32_t & KEYWORD = fapi::MBVPD_KEYWORD_MT; + const uint32_t & RETURNED_SIZE = l_MtBufsize; + FAPI_SET_HWP_ERROR(l_fapirc, RC_MBVPD_INSUFFICIENT_VPD_RETURNED ); + break; // break out with fapirc + } + + // return data according to the attribute varible type + // The value of the attribute is used as an index into the MT buffer + switch (i_attr) + { + // return the uint8_t [2][2] attributes from the MT keyword buffer + case TERM_DATA_DRAM_RON: + { + uint8_t (* l_pVal)[2][2] = (uint8_t (*)[2][2])o_pVal; + for (uint8_t l_port=0; l_port<NUM_PORTS;l_port++) + { + for (uint8_t l_j=0; l_j<NUM_DIMMS; l_j++) + { + (*l_pVal)[l_port][l_j] = l_pMtBuffer-> + mb_mba[l_pos].mba_port[l_port].port_attr[i_attr+l_j]; + } + } + break; + } + // return the uint8_t [2][2][4] attributes from the MT keyword + case TERM_DATA_DRAM_RTT_NOM: + case TERM_DATA_DRAM_RTT_WR: + case TERM_DATA_ODT_RD: + case TERM_DATA_ODT_WR: + { + uint8_t (* l_pVal)[2][2][4] = (uint8_t (*)[2][2][4])o_pVal; + for (uint8_t l_port=0; l_port<NUM_PORTS;l_port++) + { + for (uint8_t l_j=0; l_j<NUM_DIMMS; l_j++) + { + for (uint8_t l_k=0; l_k<NUM_RANKS; l_k++) + { + (*l_pVal)[l_port][l_j][l_k] = l_pMtBuffer-> + mb_mba[l_pos].mba_port[l_port].port_attr[i_attr+(l_j*NUM_RANKS)+l_k]; + } + } + } + break; + } + // return the uint32_t [2] attributes from the MT keyword buffer + // need to consider endian since they are word fields + case TERM_DATA_CEN_RD_VREF: + case TERM_DATA_DRAM_WR_VREF: + { + uint32_t (* l_pVal)[2] = (uint32_t (*)[2])o_pVal; + for (uint8_t l_port=0; l_port<2;l_port++) + { + uint32_t * l_pWord = (uint32_t *)&l_pMtBuffer-> + mb_mba[l_pos].mba_port[l_port].port_attr[i_attr]; + (*l_pVal)[l_port] = FAPI_BE32TOH(*l_pWord); + } + break; + } + // return the uint8_t [2] attributes from the MT keyword buffer + case TERM_DATA_DRAM_WRDDR4_VREF: + case TERM_DATA_CEN_RCV_IMP_DQ_DQS: + case TERM_DATA_CEN_DRV_IMP_DQ_DQS: + case TERM_DATA_CEN_DRV_IMP_CNTL: + case TERM_DATA_CEN_DRV_IMP_ADDR: + case TERM_DATA_CEN_DRV_IMP_CLK: + case TERM_DATA_CEN_DRV_IMP_SPCKE: + case TERM_DATA_CEN_SLEW_RATE_DQ_DQS: + case TERM_DATA_CEN_SLEW_RATE_CNTL: + case TERM_DATA_CEN_SLEW_RATE_ADDR: + case TERM_DATA_CEN_SLEW_RATE_CLK: + case TERM_DATA_CEN_SLEW_RATE_SPCKE: + { + uint8_t (* l_pVal)[2] = (uint8_t (*)[2])o_pVal; + for (uint8_t l_port=0; l_port<NUM_PORTS;l_port++) + { + (*l_pVal)[l_port] = l_pMtBuffer-> + mb_mba[l_pos].mba_port[l_port].port_attr[i_attr]; + } + break; + } + } + + + } while (0); + + delete l_pMtBuffer; + l_pMtBuffer = NULL; + + FAPI_DBG("getMBvpdTermData: exit rc=0x%08x)", + static_cast<uint32_t>(l_fapirc)); + + return l_fapirc; +} + +} // extern "C" diff --git a/src/usr/hwpf/hwp/mvpd_accessors/mvpd.mk b/src/usr/hwpf/hwp/mvpd_accessors/mvpd.mk index 8cf8f417a..96a602a10 100644 --- a/src/usr/hwpf/hwp/mvpd_accessors/mvpd.mk +++ b/src/usr/hwpf/hwp/mvpd_accessors/mvpd.mk @@ -30,5 +30,6 @@ OBJS += getMvpdRing.o \ mvpdRingFuncs.o \ getMvpdExL2SingleMemberEnable.o \ getMBvpdPhaseRotatorData.o \ - getMBvpdAddrMirrorData.o + getMBvpdAddrMirrorData.o \ + getMBvpdTermData.o diff --git a/src/usr/hwpf/hwp/mvpd_accessors/mvpd_errors.xml b/src/usr/hwpf/hwp/mvpd_accessors/mvpd_errors.xml index 1254658aa..6d0347349 100644 --- a/src/usr/hwpf/hwp/mvpd_accessors/mvpd_errors.xml +++ b/src/usr/hwpf/hwp/mvpd_accessors/mvpd_errors.xml @@ -20,7 +20,7 @@ <!-- Origin: 30 --> <!-- --> <!-- IBM_PROLOG_END_TAG --> -<!-- $Id: mvpd_errors.xml,v 1.4 2013/04/29 16:06:37 whs Exp $ --> +<!-- $Id: mvpd_errors.xml,v 1.5 2013/05/28 10:49:31 whs Exp $ --> <hwpErrors> <!-- ********************************************************************* --> <hwpError> @@ -84,10 +84,20 @@ </hwpError> <!-- ********************************************************************* --> <hwpError> - <rc>RC_MBVPD_INSUFFICIENT_MR_KEYWORD</rc> + <rc>RC_MBVPD_INVALID_ATTRIBUTE_ID</rc> <description> - VPD read is smaller than expected. + Invalid attribute ID </description> + <ffdc>ATTR_ID</ffdc> + </hwpError> + <!-- ********************************************************************* --> + <hwpError> + <rc>RC_MBVPD_INVALID_OUTPUT_VARIABLE_SIZE</rc> + <description> + Output variable size must match size of expected output type. + </description> + <ffdc>EXPECTED_SIZE</ffdc> + <ffdc>PASSED_SIZE</ffdc> </hwpError> <!-- ********************************************************************* --> <hwpError> diff --git a/src/usr/hwpf/plat/fapiPlatAttributeService.C b/src/usr/hwpf/plat/fapiPlatAttributeService.C index 13392988d..9db439a93 100644 --- a/src/usr/hwpf/plat/fapiPlatAttributeService.C +++ b/src/usr/hwpf/plat/fapiPlatAttributeService.C @@ -44,6 +44,7 @@ #include <hwpf/hwp/mvpd_accessors/getMvpdExL2SingleMemberEnable.H> #include <hwpf/hwp/mvpd_accessors/getMBvpdPhaseRotatorData.H> #include <hwpf/hwp/mvpd_accessors/getMBvpdAddrMirrorData.H> +#include <hwpf/hwp/mvpd_accessors/getMBvpdTermData.H> // The following file checks at compile time that all HWPF attributes are // handled by Hostboot. This is done to ensure that the HTML file listing @@ -1291,6 +1292,19 @@ fapi::ReturnCode fapiPlatGetAddrMirrorData ( return l_rc; } +fapi::ReturnCode fapiPlatGetTermData ( + const fapi::Target * i_pTarget, + const fapi::MBvpdTermData i_attr, + void * o_pVal, + const uint32_t i_valSize) +{ + // Call a VPD Accessor HWP to get the data + fapi::ReturnCode l_rc; + FAPI_EXEC_HWP(l_rc, getMBvpdTermData, + *i_pTarget, i_attr, o_pVal, i_valSize); + return l_rc; +} + fapi::ReturnCode fapiPlatGetEnableAttr ( fapi::AttributeId i_id, const fapi::Target * i_pFapiTarget, uint8_t & o_enable ) { diff --git a/src/usr/hwpf/test/fapiwinkletest.H b/src/usr/hwpf/test/fapiwinkletest.H index d0ec9b9ac..871b0a63a 100644 --- a/src/usr/hwpf/test/fapiwinkletest.H +++ b/src/usr/hwpf/test/fapiwinkletest.H @@ -26,9 +26,9 @@ // set to 1 for doing unit tests, set to 0 for production #define UNITTESTfwt 0 -// TODO: RTC 69935 complete Phase Rotator Data -// use the code in the 1 path until 69935 fully implements 59048. -// Then the 1 path code can be removed and use the 0 path. +// TODO: RTC 69935 complete Phase Rotator Data and Termination Data. +// Use the code in the 1 path until CDIMM vpd has proper values. +// Then the 1 path code can be removed and keep the 0 path code. #define RTC69935fwt 1 /** * @file fapiwinkletest.H @@ -48,6 +48,7 @@ #include <setMvpdRing.H> #include <mvpd_accessors/getMBvpdPhaseRotatorData.H> #include <mvpd_accessors/getMBvpdAddrMirrorData.H> +#include <mvpd_accessors/getMBvpdTermData.H> #include <errl/errlmanager.H> #include <errl/errlentry.H> @@ -400,6 +401,527 @@ public: } + /** + * @brief call getMBvpdTermData to fetch memory buffer MT attributes + * + */ + void testGetTermData() + { + fapi::ReturnCode l_fapirc( fapi::FAPI_RC_SUCCESS ); + uint8_t val1[2][2] = {{0xFF,0xFF},{0xFF,0xFF}}; +#if UNITTESTfwt + uint8_t val2[2][2][4]={ + {{0xFF,0xFF,0xFF,0xFF},{0xFF,0xFF,0xFF,0xFF}}, + {{0xFF,0xFF,0xFF,0xFF},{0xFF,0xFF,0xFF,0xFF}}}; + uint32_t val3[2] = {0xFFFFFFFF,0xFFFFFFFF}; + uint8_t val4[2] = {0xFF,0xFF}; + uint8_t l_errorChk = 1; //do error checks just once +#endif +#if RTC69935fwt + getMBvpdTermData_FP_t (l_getMBvpdTermData) + = &getMBvpdTermData; +#endif + + TS_TRACE( "testGetTermData entry" ); + + TARGETING::TargetHandleList l_memBufList; + getAllChips(l_memBufList, TYPE_MEMBUF); + + TS_TRACE( "testGetTermData l_memBufList.size()=%d", + l_memBufList.size() ); + + // loop thru memory buffers +#if UNITTESTfwt + uint8_t l_mbNum = 0; // check them all in unit test +#else + uint8_t l_mbNum = (l_memBufList.size() > 0) ? l_memBufList.size()-1 : 0; +#endif + for (; l_mbNum < l_memBufList.size(); l_mbNum++ ) + { + TARGETING::TargetHandleList l_mbaList; + getChildAffinityTargets(l_mbaList,l_memBufList[l_mbNum], + CLASS_UNIT,TYPE_MBA,false); + + TS_TRACE( "testGetTermData l_mbaBufList.size()=%d", + l_mbaList.size()); + + // loop thru all the mbas (should be 2) +#if UNITTESTfwt + uint8_t l_mbaNum = 0; // check them all in unit test +#else + uint8_t l_mbaNum = (l_mbaList.size() > 0) ? l_mbaList.size()-1:0 ; +#endif + for (; l_mbaNum < l_mbaList.size(); l_mbaNum++ ) + { + // dump physical path to target + EntityPath l_path; + l_path = l_mbaList[l_mbaNum]->getAttr<ATTR_PHYS_PATH>(); + l_path.dump(); + + // cast OUR type of target to a FAPI type of target. + fapi::Target l_fapi_mba_target( + TARGET_TYPE_MBA_CHIPLET, + (const_cast<TARGETING::Target*>(l_mbaList[l_mbaNum])) ); + +#if UNITTESTfwt + // check for interface errors being caught. Just once. + if (l_errorChk) { + // check size matches type for each of the 4 types + l_fapirc = (*l_getMBvpdTermData)(l_fapi_mba_target, + fapi::TERM_DATA_DRAM_RON, + &val1, sizeof(val1)+1); //invalid size + if (l_fapirc != fapi::RC_MBVPD_INVALID_OUTPUT_VARIABLE_SIZE) + { + TS_FAIL("testGetTermData: expect invalid size RC:" + " 0x%08x,0x%08x", + fapi::RC_MBVPD_INVALID_OUTPUT_VARIABLE_SIZE, + static_cast<uint32_t>(l_fapirc)); + } + l_fapirc = (*l_getMBvpdTermData)(l_fapi_mba_target, + fapi::TERM_DATA_DRAM_RTT_NOM, + &val2, sizeof(val2)-1); //invalid size + if (l_fapirc != fapi::RC_MBVPD_INVALID_OUTPUT_VARIABLE_SIZE) + { + TS_FAIL("testGetTermData: expect invalid size RC:" + " 0x%08x,0x%08x", + fapi::RC_MBVPD_INVALID_OUTPUT_VARIABLE_SIZE, + static_cast<uint32_t>(l_fapirc)); + } + l_fapirc = (*l_getMBvpdTermData)(l_fapi_mba_target, + fapi::TERM_DATA_CEN_RD_VREF, + &val3, sizeof(val3)+2); //invalid size + if (l_fapirc != fapi::RC_MBVPD_INVALID_OUTPUT_VARIABLE_SIZE) + { + TS_FAIL("testGetTermData: expect invalid size RC:" + " 0x%08x,0x%08x", + fapi::RC_MBVPD_INVALID_OUTPUT_VARIABLE_SIZE, + static_cast<uint32_t>(l_fapirc)); + } + l_fapirc = (*l_getMBvpdTermData)(l_fapi_mba_target, + fapi::TERM_DATA_DRAM_WRDDR4_VREF, + &val4, 0); //invalid size + if (l_fapirc != fapi::RC_MBVPD_INVALID_OUTPUT_VARIABLE_SIZE) + { + TS_FAIL("testGetTermData: expect invalid size RC:" + " 0x%08x,0x%08x", + fapi::RC_MBVPD_INVALID_OUTPUT_VARIABLE_SIZE, + static_cast<uint32_t>(l_fapirc)); + } + // check for catching an invalid ID + l_fapirc = (*l_getMBvpdTermData)(l_fapi_mba_target, + (fapi::MBvpdTermData)99, //invalid ID + &val1, sizeof(val1)); + if (l_fapirc != fapi::RC_MBVPD_INVALID_ATTRIBUTE_ID) + { + TS_FAIL("testGetTermData: expect invalid size RC:" + " 0x%08x,0x%08x", + fapi::RC_MBVPD_INVALID_ATTRIBUTE_ID, + static_cast<uint32_t>(l_fapirc)); + } + l_errorChk =0; + } +#endif +#if RTC69935fwt + // Verify fetching attributes by calling the HWP directly + + // TERM_DATA_DRAM_RON + l_fapirc = (*l_getMBvpdTermData)(l_fapi_mba_target, + fapi::TERM_DATA_DRAM_RON, + &val1, sizeof(val1)); + if (l_fapirc) break; + TS_TRACE( "testGetTermData accessor " + "TERM_DATA_DRAM_RON=(0x%02x,0x%02x),(0x%02x,0x%02x)", + val1[0][0], val1[0][1], val1[1][0], val1[1][1]); + +#if UNITTESTfwt + // TERM_DATA_DRAM_RTT_NOM + l_fapirc = (*l_getMBvpdTermData)(l_fapi_mba_target, + fapi::TERM_DATA_DRAM_RTT_NOM, + &val2, sizeof(val2)); + if (l_fapirc) break; + TS_TRACE( "testGetTermData accessor " + "TERM_DATA_DRAM_RTT_NOM"); + TS_TRACE("testGetTermData[0][0]=0x%02x,0x%02x,0x%02x,0x%02x", + val2[0][0][0], val2[0][0][1], val2[0][0][2], val2[0][0][3]); + TS_TRACE("testGetTermData[0][1]=0x%02x,0x%02x,0x%02x,0x%02x", + val2[0][1][0], val2[0][1][1], val2[0][1][2], val2[0][1][3]); + TS_TRACE("testGetTermData[1][0]=0x%02x,0x%02x,0x%02x,0x%02x", + val2[1][0][0], val2[1][0][1], val2[1][0][2], val2[1][0][3]); + TS_TRACE("testGetTermData[1][1]=0x%02x,0x%02x,0x%02x,0x%02x", + val2[1][1][0], val2[1][1][1], val2[1][1][2], val2[1][1][3]); + + // TERM_DATA_DRAM_RTT_WR + l_fapirc = (*l_getMBvpdTermData)(l_fapi_mba_target, + fapi::TERM_DATA_DRAM_RTT_WR, + &val2, sizeof(val2)); + if (l_fapirc) break; + TS_TRACE( "testGetTermData accessor " + "TERM_DATA_DRAM_RTT_WR"); + TS_TRACE("testGetTermData[0][0]=0x%02x,0x%02x,0x%02x,0x%02x", + val2[0][0][0], val2[0][0][1], val2[0][0][2], val2[0][0][3]); + TS_TRACE("testGetTermData[0][1]=0x%02x,0x%02x,0x%02x,0x%02x", + val2[0][1][0], val2[0][1][1], val2[0][1][2], val2[0][1][3]); + TS_TRACE("testGetTermData[1][0]=0x%02x,0x%02x,0x%02x,0x%02x", + val2[1][0][0], val2[1][0][1], val2[1][0][2], val2[1][0][3]); + TS_TRACE("testGetTermData[1][1]=0x%02x,0x%02x,0x%02x,0x%02x", + val2[1][1][0], val2[1][1][1], val2[1][1][2], val2[1][1][3]); + + // TERM_DATA_ODT_RD + l_fapirc = (*l_getMBvpdTermData)(l_fapi_mba_target, + fapi::TERM_DATA_ODT_RD, + &val2, sizeof(val2)); + if (l_fapirc) break; + TS_TRACE( "testGetTermData accessor " + "TERM_DATA_ODT_RD"); + TS_TRACE("testGetTermData[0][0]=0x%02x,0x%02x,0x%02x,0x%02x", + val2[0][0][0], val2[0][0][1], val2[0][0][2], val2[0][0][3]); + TS_TRACE("testGetTermData[0][1]=0x%02x,0x%02x,0x%02x,0x%02x", + val2[0][1][0], val2[0][1][1], val2[0][1][2], val2[0][1][3]); + TS_TRACE("testGetTermData[1][0]=0x%02x,0x%02x,0x%02x,0x%02x", + val2[1][0][0], val2[1][0][1], val2[1][0][2], val2[1][0][3]); + TS_TRACE("testGetTermData[1][1]=0x%02x,0x%02x,0x%02x,0x%02x", + val2[1][1][0], val2[1][1][1], val2[1][1][2], val2[1][1][3]); + + // TERM_DATA_ODT_WR + l_fapirc = (*l_getMBvpdTermData)(l_fapi_mba_target, + fapi::TERM_DATA_ODT_WR, + &val2, sizeof(val2)); + if (l_fapirc) break; + TS_TRACE( "testGetTermData accessor " + "TERM_DATA_ODT_WR"); + TS_TRACE("testGetTermData[0][0]=0x%02x,0x%02x,0x%02x,0x%02x", + val2[0][0][0], val2[0][0][1], val2[0][0][2], val2[0][0][3]); + TS_TRACE("testGetTermData[0][1]=0x%02x,0x%02x,0x%02x,0x%02x", + val2[0][1][0], val2[0][1][1], val2[0][1][2], val2[0][1][3]); + TS_TRACE("testGetTermData[1][0]=0x%02x,0x%02x,0x%02x,0x%02x", + val2[1][0][0], val2[1][0][1], val2[1][0][2], val2[1][0][3]); + TS_TRACE("testGetTermData[1][1]=0x%02x,0x%02x,0x%02x,0x%02x", + val2[1][1][0], val2[1][1][1], val2[1][1][2], val2[1][1][3]); + + // TERM_DATA_CEN_RD_VREF + l_fapirc = (*l_getMBvpdTermData)(l_fapi_mba_target, + fapi::TERM_DATA_CEN_RD_VREF, + &val3, sizeof(val3)); + if (l_fapirc) break; + TS_TRACE( "testGetTermData accessor " + "TERM_DATA_CEN_RD_VREF=0x%08x,0x%08x", + val3[0], val3[1]); + + // TERM_DATA_DRAM_WR_VREF + l_fapirc = (*l_getMBvpdTermData)(l_fapi_mba_target, + fapi::TERM_DATA_DRAM_WR_VREF, + &val3, sizeof(val3)); + if (l_fapirc) break; + TS_TRACE( "testGetTermData accessor " + "TERM_DATA_DRAM_WR_VREF=0x%08x,0x%08x", + val3[0], val3[1]); + + // TERM_DATA_DRAM_WRDDR4_VREF + l_fapirc = (*l_getMBvpdTermData)(l_fapi_mba_target, + fapi::TERM_DATA_DRAM_WRDDR4_VREF, + &val4, sizeof(val4)); + if (l_fapirc) break; + TS_TRACE( "testGetTermData accessor " + "TERM_DATA_DRAM_WRDDR4_VREF=0x%02x,0x%02x", + val4[0], val4[1]); + + // TERM_DATA_CEN_RCV_IMP_DQ_DQS + l_fapirc = (*l_getMBvpdTermData)(l_fapi_mba_target, + fapi::TERM_DATA_CEN_RCV_IMP_DQ_DQS, + &val4, sizeof(val4)); + if (l_fapirc) break; + TS_TRACE( "testGetTermData accessor " + "TERM_DATA_CEN_RCV_IMP_DQ_DQS=0x%02x,0x%02x", + val4[0], val4[1]); + + // TERM_DATA_CEN_DRV_IMP_DQ_DQS + l_fapirc = (*l_getMBvpdTermData)(l_fapi_mba_target, + fapi::TERM_DATA_CEN_DRV_IMP_DQ_DQS, + &val4, sizeof(val4)); + if (l_fapirc) break; + TS_TRACE( "testGetTermData accessor " + "TERM_DATA_CEN_DRV_IMP_DQ_DQS=0x%02x,0x%02x", + val4[0], val4[1]); + + // TERM_DATA_CEN_DRV_IMP_CNTL + l_fapirc = (*l_getMBvpdTermData)(l_fapi_mba_target, + fapi::TERM_DATA_CEN_DRV_IMP_CNTL, + &val4, sizeof(val4)); + if (l_fapirc) break; + TS_TRACE( "testGetTermData accessor " + "TERM_DATA_CEN_DRV_IMP_CNTL=0x%02x,0x%02x", + val4[0], val4[1]); + + // TERM_DATA_CEN_DRV_IMP_ADDR + l_fapirc = (*l_getMBvpdTermData)(l_fapi_mba_target, + fapi::TERM_DATA_CEN_DRV_IMP_ADDR, + &val4, sizeof(val4)); + if (l_fapirc) break; + TS_TRACE( "testGetTermData accessor " + "TERM_DATA_CEN_DRV_IMP_ADDR=0x%02x,0x%02x", + val4[0], val4[1]); + + // TERM_DATA_CEN_DRV_IMP_CLK + l_fapirc = (*l_getMBvpdTermData)(l_fapi_mba_target, + fapi::TERM_DATA_CEN_DRV_IMP_CLK, + &val4, sizeof(val4)); + if (l_fapirc) break; + TS_TRACE( "testGetTermData accessor " + "TERM_DATA_CEN_DRV_IMP_CLK=0x%02x,0x%02x", + val4[0], val4[1]); + + // TERM_DATA_CEN_DRV_IMP_SPCKE + l_fapirc = (*l_getMBvpdTermData)(l_fapi_mba_target, + fapi::TERM_DATA_CEN_DRV_IMP_SPCKE, + &val4, sizeof(val4)); + if (l_fapirc) break; + TS_TRACE( "testGetTermData accessor " + "TERM_DATA_CEN_DRV_IMP_SPCKE=0x%02x,0x%02x", + val4[0], val4[1]); + + // TERM_DATA_CEN_SLEW_RATE_DQ_DQS + l_fapirc = (*l_getMBvpdTermData)(l_fapi_mba_target, + fapi::TERM_DATA_CEN_SLEW_RATE_DQ_DQS, + &val4, sizeof(val4)); + if (l_fapirc) break; + TS_TRACE( "testGetTermData accessor " + "TERM_DATA_CEN_SLEW_RATE_DQ_DQS=0x%02x,0x%02x", + val4[0], val4[1]); + + // TERM_DATA_CEN_SLEW_RATE_CNTL + l_fapirc = (*l_getMBvpdTermData)(l_fapi_mba_target, + fapi::TERM_DATA_CEN_SLEW_RATE_CNTL, + &val4, sizeof(val4)); + if (l_fapirc) break; + TS_TRACE( "testGetTermData accessor " + "TERM_DATA_CEN_SLEW_RATE_CNTL=0x%02x,0x%02x", + val4[0], val4[1]); + + // TERM_DATA_CEN_SLEW_RATE_ADDR + l_fapirc = (*l_getMBvpdTermData)(l_fapi_mba_target, + fapi::TERM_DATA_CEN_SLEW_RATE_ADDR, + &val4, sizeof(val4)); + if (l_fapirc) break; + TS_TRACE( "testGetTermData accessor " + "TERM_DATA_CEN_SLEW_RATE_ADDR=0x%02x,0x%02x", + val4[0], val4[1]); + + // TERM_DATA_CEN_SLEW_RATE_CLK + l_fapirc = (*l_getMBvpdTermData)(l_fapi_mba_target, + fapi::TERM_DATA_CEN_SLEW_RATE_CLK, + &val4, sizeof(val4)); + if (l_fapirc) break; + TS_TRACE( "testGetTermData accessor " + "TERM_DATA_CEN_SLEW_RATE_CLK=0x%02x,0x%02x", + val4[0], val4[1]); + + // TERM_DATA_CEN_SLEW_RATE_SPCKE + l_fapirc = (*l_getMBvpdTermData)(l_fapi_mba_target, + fapi::TERM_DATA_CEN_SLEW_RATE_SPCKE, + &val4, sizeof(val4)); + if (l_fapirc) break; + TS_TRACE( "testGetTermData accessor " + "TERM_DATA_CEN_SLEW_RATE_SPCKE=0x%02x,0x%02x", + val4[0], val4[1]); +#endif +#else + // Verify fetching attributes using FAPI_ATTR_GET + // TERM_DATA_DRAM_RON + l_fapirc = FAPI_ATTR_GET(ATTR_EFF_DRAM_RON, + &l_fapi_mba_target, val1); + if (l_fapirc) break; + TS_TRACE( "testGetTermData attr " + "TERM_DATA_DRAM_RON=(0x%02x,0x%02x),(0x%02x,0x%02x)", + val1[0][0], val1[0][1], val1[1][0], val1[1][1]); + +#if UNITTESTfwt + // TERM_DATA_DRAM_RTT_NOM + l_fapirc = FAPI_ATTR_GET(ATTR_EFF_DRAM_RTT_NOM, + &l_fapi_mba_target, val2); + if (l_fapirc) break; + TS_TRACE( "testGetTermData attr " + "TERM_DATA_DRAM_RTT_NOM"); + TS_TRACE("testGetTermData[0][0]=0x%02x,0x%02x,0x%02x,0x%02x", + val2[0][0][0], val2[0][0][1], val2[0][0][2], val2[0][0][3]); + TS_TRACE("testGetTermData[0][1]=0x%02x,0x%02x,0x%02x,0x%02x", + val2[0][1][0], val2[0][1][1], val2[0][1][2], val2[0][1][3]); + TS_TRACE("testGetTermData[1][0]=0x%02x,0x%02x,0x%02x,0x%02x", + val2[1][0][0], val2[1][0][1], val2[1][0][2], val2[1][0][3]); + TS_TRACE("testGetTermData[1][1]=0x%02x,0x%02x,0x%02x,0x%02x", + val2[1][1][0], val2[1][1][1], val2[1][1][2], val2[1][1][3]); + + // TERM_DATA_DRAM_RTT_WR + l_fapirc = FAPI_ATTR_GET(ATTR_EFF_DRAM_RTT_WR, + &l_fapi_mba_target, val2); + if (l_fapirc) break; + TS_TRACE( "testGetTermData attr " + "TERM_DATA_DRAM_RTT_WR"); + TS_TRACE("testGetTermData[0][0]=0x%02x,0x%02x,0x%02x,0x%02x", + val2[0][0][0], val2[0][0][1], val2[0][0][2], val2[0][0][3]); + TS_TRACE("testGetTermData[0][1]=0x%02x,0x%02x,0x%02x,0x%02x", + val2[0][1][0], val2[0][1][1], val2[0][1][2], val2[0][1][3]); + TS_TRACE("testGetTermData[1][0]=0x%02x,0x%02x,0x%02x,0x%02x", + val2[1][0][0], val2[1][0][1], val2[1][0][2], val2[1][0][3]); + TS_TRACE("testGetTermData[1][1]=0x%02x,0x%02x,0x%02x,0x%02x", + val2[1][1][0], val2[1][1][1], val2[1][1][2], val2[1][1][3]); + + // TERM_DATA_ODT_RD + l_fapirc = FAPI_ATTR_GET(ATTR_EFF_ODT_RD, + &l_fapi_mba_target, val2); + if (l_fapirc) break; + TS_TRACE( "testGetTermData attr " + "TERM_DATA_ODT_RD"); + TS_TRACE("testGetTermData[0][0]=0x%02x,0x%02x,0x%02x,0x%02x", + val2[0][0][0], val2[0][0][1], val2[0][0][2], val2[0][0][3]); + TS_TRACE("testGetTermData[0][1]=0x%02x,0x%02x,0x%02x,0x%02x", + val2[0][1][0], val2[0][1][1], val2[0][1][2], val2[0][1][3]); + TS_TRACE("testGetTermData[1][0]=0x%02x,0x%02x,0x%02x,0x%02x", + val2[1][0][0], val2[1][0][1], val2[1][0][2], val2[1][0][3]); + TS_TRACE("testGetTermData[1][1]=0x%02x,0x%02x,0x%02x,0x%02x", + val2[1][1][0], val2[1][1][1], val2[1][1][2], val2[1][1][3]); + + // TERM_DATA_ODT_WR + l_fapirc = FAPI_ATTR_GET(ATTR_EFF_ODT_WR, + &l_fapi_mba_target, val2); + if (l_fapirc) break; + TS_TRACE( "testGetTermData attr " + "TERM_DATA_ODT_WR"); + TS_TRACE("testGetTermData[0][0]=0x%02x,0x%02x,0x%02x,0x%02x", + val2[0][0][0], val2[0][0][1], val2[0][0][2], val2[0][0][3]); + TS_TRACE("testGetTermData[0][1]=0x%02x,0x%02x,0x%02x,0x%02x", + val2[0][1][0], val2[0][1][1], val2[0][1][2], val2[0][1][3]); + TS_TRACE("testGetTermData[1][0]=0x%02x,0x%02x,0x%02x,0x%02x", + val2[1][0][0], val2[1][0][1], val2[1][0][2], val2[1][0][3]); + TS_TRACE("testGetTermData[1][1]=0x%02x,0x%02x,0x%02x,0x%02x", + val2[1][1][0], val2[1][1][1], val2[1][1][2], val2[1][1][3]); + + // TERM_DATA_CEN_RD_VREF + l_fapirc = FAPI_ATTR_GET(ATTR_EFF_CEN_RD_VREF, + &l_fapi_mba_target, val3); + if (l_fapirc) break; + TS_TRACE( "testGetTermData attr " + "TERM_DATA_CEN_RD_VREF=0x%08x,0x%08x", + val3[0], val3[1]); + + // TERM_DATA_DRAM_WR_VREF + l_fapirc = FAPI_ATTR_GET(ATTR_EFF_DRAM_WR_VREF, + &l_fapi_mba_target, val3); + if (l_fapirc) break; + TS_TRACE( "testGetTermData attr " + "TERM_DATA_DRAM_WR_VREF=0x%08x,0x%08x", + val3[0], val3[1]); + + // TERM_DATA_DRAM_WRDDR4_VREF + l_fapirc = FAPI_ATTR_GET(ATTR_EFF_DRAM_WRDDR4_VREF, + &l_fapi_mba_target, val4); + if (l_fapirc) break; + TS_TRACE( "testGetTermData attr " + "TERM_DATA_DRAM_WRDDR4_VREF=0x%02x,0x%02x", + val4[0], val4[1]); + + // TERM_DATA_CEN_RCV_IMP_DQ_DQS + l_fapirc = FAPI_ATTR_GET(ATTR_EFF_CEN_RCV_IMP_DQ_DQS, + &l_fapi_mba_target, val4); + if (l_fapirc) break; + TS_TRACE( "testGetTermData attr " + "TERM_DATA_CEN_RCV_IMP_DQ_DQS=0x%02x,0x%02x", + val4[0], val4[1]); + + // TERM_DATA_CEN_DRV_IMP_DQ_DQS + l_fapirc = FAPI_ATTR_GET(ATTR_EFF_CEN_DRV_IMP_DQ_DQS, + &l_fapi_mba_target, val4); + if (l_fapirc) break; + TS_TRACE( "testGetTermData attr " + "TERM_DATA_CEN_DRV_IMP_DQ_DQS=0x%02x,0x%02x", + val4[0], val4[1]); + + // TERM_DATA_CEN_DRV_IMP_CNTL + l_fapirc = FAPI_ATTR_GET(ATTR_EFF_CEN_DRV_IMP_CNTL, + &l_fapi_mba_target, val4); + if (l_fapirc) break; + TS_TRACE( "testGetTermData attr " + "TERM_DATA_CEN_DRV_IMP_CNTL=0x%02x,0x%02x", + val4[0], val4[1]); + + // TERM_DATA_CEN_DRV_IMP_ADDR + l_fapirc = FAPI_ATTR_GET(ATTR_EFF_CEN_DRV_IMP_ADDR, + &l_fapi_mba_target, val4); + if (l_fapirc) break; + TS_TRACE( "testGetTermData attr " + "TERM_DATA_CEN_DRV_IMP_ADDR=0x%02x,0x%02x", + val4[0], val4[1]); + + // TERM_DATA_CEN_DRV_IMP_CLK + l_fapirc = FAPI_ATTR_GET(ATTR_EFF_CEN_DRV_IMP_CLK, + &l_fapi_mba_target, val4); + if (l_fapirc) break; + TS_TRACE( "testGetTermData attr " + "TERM_DATA_CEN_DRV_IMP_CLK=0x%02x,0x%02x", + val4[0], val4[1]); + + // TERM_DATA_CEN_DRV_IMP_SPCKE + l_fapirc = FAPI_ATTR_GET(ATTR_EFF_CEN_DRV_IMP_SPCKE, + &l_fapi_mba_target, val4); + if (l_fapirc) break; + TS_TRACE( "testGetTermData attr " + "TERM_DATA_CEN_DRV_IMP_SPCKE=0x%02x,0x%02x", + val4[0], val4[1]); + + // TERM_DATA_CEN_SLEW_RATE_DQ_DQS + l_fapirc = FAPI_ATTR_GET(ATTR_EFF_CEN_SLEW_RATE_DQ_DQS, + &l_fapi_mba_target, val4); + if (l_fapirc) break; + TS_TRACE( "testGetTermData attr " + "TERM_DATA_CEN_SLEW_RATE_DQ_DQS=0x%02x,0x%02x", + val4[0], val4[1]); + + // TERM_DATA_CEN_SLEW_RATE_CNTL + l_fapirc = FAPI_ATTR_GET(ATTR_EFF_CEN_SLEW_RATE_CNTL, + &l_fapi_mba_target, val4); + if (l_fapirc) break; + TS_TRACE( "testGetTermData attr " + "TERM_DATA_CEN_SLEW_RATE_CNTL=0x%02x,0x%02x", + val4[0], val4[1]); + + // TERM_DATA_CEN_SLEW_RATE_ADDR + l_fapirc = FAPI_ATTR_GET(ATTR_EFF_CEN_SLEW_RATE_ADDR, + &l_fapi_mba_target, val4); + if (l_fapirc) break; + TS_TRACE( "testGetTermData attr " + "TERM_DATA_CEN_SLEW_RATE_ADDR=0x%02x,0x%02x", + val4[0], val4[1]); + + // TERM_DATA_CEN_SLEW_RATE_CLK + l_fapirc = FAPI_ATTR_GET(ATTR_EFF_CEN_SLEW_RATE_CLK, + &l_fapi_mba_target, val4); + if (l_fapirc) break; + TS_TRACE( "testGetTermData attr " + "TERM_DATA_CEN_SLEW_RATE_CLK=0x%02x,0x%02x", + val4[0], val4[1]); + + // TERM_DATA_CEN_SLEW_RATE_SPCKE + l_fapirc = FAPI_ATTR_GET(ATTR_EFF_CEN_SLEW_RATE_SPCKE, + &l_fapi_mba_target, val4); + if (l_fapirc) break; + TS_TRACE( "testGetTermData attr " + "TERM_DATA_CEN_SLEW_RATE_SPCKE=0x%02x,0x%02x", + val4[0], val4[1]); +#endif +#endif + } + if (l_fapirc) + { + TS_FAIL( "fapiGetTermData: FAPI_ATTR_GET fail rc=0x%x", + static_cast<uint32_t>(l_fapirc) ); + fapiLogError(l_fapirc); + } + } + + + TS_TRACE( "testGetTermData exit" ); + + } + /** * @brief call fapiGetMBvpdField to fetch memory buffer vpd records. diff --git a/src/usr/targeting/common/xmltohb/attribute_types.xml b/src/usr/targeting/common/xmltohb/attribute_types.xml index 22b6a7c0e..afb353a3c 100644 --- a/src/usr/targeting/common/xmltohb/attribute_types.xml +++ b/src/usr/targeting/common/xmltohb/attribute_types.xml @@ -6268,6 +6268,10 @@ firmware notes: Used as override attribute for pstate procedure </hwpfToHbAttrMap> </attribute> +<!-- TODO RTC 69935. These termination data attributes need to come from + CDIMM VPD. For now, they are setup by the mss_eff_config_termination HWP. + Remove these when valid vpd is on the CDIMMs --> + <attribute> <id>EFF_ODT_RD</id> <description>Rank Read ODT. Initialized and used by HWPs.</description> @@ -6395,42 +6399,6 @@ firmware notes: Used as override attribute for pstate procedure </attribute> <attribute> - <id>EFF_DRAM_WR_VREF_SCHMOO</id> - <description>Enables for which VREF to use on the WR Schmoo. Initialized and used by HWPs.</description> - <simpleType> - <uint32_t> - <default>0</default> - </uint32_t> - <array>2</array> - </simpleType> - <persistency>volatile-zeroed</persistency> - <readable/> - <writeable/> - <hwpfToHbAttrMap> - <id>ATTR_EFF_DRAM_WR_VREF_SCHMOO</id> - <macro>DIRECT</macro> - </hwpfToHbAttrMap> -</attribute> - -<attribute> - <id>EFF_DRAM_WRDDR4_VREF_SCHMOO</id> - <description>Enables for which VREF to use on the WR Schmoo for DDR4. Initialized and used by HWPs.</description> - <simpleType> - <uint32_t> - <default>0</default> - </uint32_t> - <array>2</array> - </simpleType> - <persistency>volatile-zeroed</persistency> - <readable/> - <writeable/> - <hwpfToHbAttrMap> - <id>ATTR_EFF_DRAM_WRDDR4_VREF_SCHMOO</id> - <macro>DIRECT</macro> - </hwpfToHbAttrMap> -</attribute> - -<attribute> <id>EFF_CEN_DRV_IMP_DQ_DQS</id> <description>Centaur DQ and DQS Drive Impedance. Initialized and used by HWPs.</description> <simpleType> @@ -6521,26 +6489,26 @@ firmware notes: Used as override attribute for pstate procedure </attribute> <attribute> - <id>EFF_CEN_DRV_IMP_DQ_DQS_SCHMOO</id> - <description>Enables for which impedance values can be used and tested in a timing test. Initialized and used by HWPs.</description> + <id>EFF_CEN_RCV_IMP_DQ_DQS</id> + <description>Centaur DQ and DQS Receiver Impedance. Initialized and used by HWPs.</description> <simpleType> - <uint32_t> + <uint8_t> <default>0</default> - </uint32_t> + </uint8_t> <array>2</array> </simpleType> <persistency>volatile-zeroed</persistency> <readable/> <writeable/> <hwpfToHbAttrMap> - <id>ATTR_EFF_CEN_DRV_IMP_DQ_DQS_SCHMOO</id> + <id>ATTR_EFF_CEN_RCV_IMP_DQ_DQS</id> <macro>DIRECT</macro> </hwpfToHbAttrMap> </attribute> <attribute> - <id>EFF_CEN_DRV_IMP_CLK_SCHMOO</id> - <description>Enables for which impedance values can be used and tested in a timing test. Initialized and used by HWPs.</description> + <id>EFF_CEN_SLEW_RATE_DQ_DQS</id> + <description>Centaur DQ and DQS Slew Rate. Initialized and used by HWPs.</description> <simpleType> <uint8_t> <default>0</default> @@ -6551,14 +6519,14 @@ firmware notes: Used as override attribute for pstate procedure <readable/> <writeable/> <hwpfToHbAttrMap> - <id>ATTR_EFF_CEN_DRV_IMP_CLK_SCHMOO</id> + <id>ATTR_EFF_CEN_SLEW_RATE_DQ_DQS</id> <macro>DIRECT</macro> </hwpfToHbAttrMap> </attribute> <attribute> - <id>EFF_CEN_DRV_IMP_SPCKE_SCHMOO</id> - <description>Enables for which impedance values can be used and tested in a timing test. Initialized and used by HWPs.</description> + <id>EFF_CEN_SLEW_RATE_ADDR</id> + <description>Centaur Address Slew Rate. Initialized and used by HWPs.</description> <simpleType> <uint8_t> <default>0</default> @@ -6569,14 +6537,14 @@ firmware notes: Used as override attribute for pstate procedure <readable/> <writeable/> <hwpfToHbAttrMap> - <id>ATTR_EFF_CEN_DRV_IMP_SPCKE_SCHMOO</id> + <id>ATTR_EFF_CEN_SLEW_RATE_ADDR</id> <macro>DIRECT</macro> </hwpfToHbAttrMap> </attribute> <attribute> - <id>EFF_CEN_DRV_IMP_CNTL_SCHMOO</id> - <description>Enables for which impedance values can be used and tested in a timing test. Initialized and used by HWPs.</description> + <id>EFF_CEN_SLEW_RATE_CLK</id> + <description>Centaur Clock Slew Rate. Initialized and used by HWPs.</description> <simpleType> <uint8_t> <default>0</default> @@ -6587,14 +6555,14 @@ firmware notes: Used as override attribute for pstate procedure <readable/> <writeable/> <hwpfToHbAttrMap> - <id>ATTR_EFF_CEN_DRV_IMP_CNTL_SCHMOO</id> + <id>ATTR_EFF_CEN_SLEW_RATE_CLK</id> <macro>DIRECT</macro> </hwpfToHbAttrMap> </attribute> <attribute> - <id>EFF_CEN_RCV_IMP_DQ_DQS</id> - <description>Centaur DQ and DQS Receiver Impedance. Initialized and used by HWPs.</description> + <id>EFF_CEN_SLEW_RATE_SPCKE</id> + <description>Centaur Spare Clock Slew Rate. Initialized and used by HWPs.</description> <simpleType> <uint8_t> <default>0</default> @@ -6605,14 +6573,32 @@ firmware notes: Used as override attribute for pstate procedure <readable/> <writeable/> <hwpfToHbAttrMap> - <id>ATTR_EFF_CEN_RCV_IMP_DQ_DQS</id> + <id>ATTR_EFF_CEN_SLEW_RATE_SPCKE</id> <macro>DIRECT</macro> </hwpfToHbAttrMap> </attribute> <attribute> - <id>EFF_CEN_RCV_IMP_DQ_DQS_SCHMOO</id> - <description>Enables for which impedance values can be used and tested in a timing test. Initialized and used by HWPs.</description> + <id>EFF_CEN_SLEW_RATE_CNTL</id> + <description>Centaur Control Slew Rate. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + <array>2</array> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_CEN_SLEW_RATE_CNTL</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_CEN_RD_VREF</id> + <description>Centaur Read Vref. Initialized and used by HWPs.</description> <simpleType> <uint32_t> <default>0</default> @@ -6623,32 +6609,34 @@ firmware notes: Used as override attribute for pstate procedure <readable/> <writeable/> <hwpfToHbAttrMap> - <id>ATTR_EFF_CEN_RCV_IMP_DQ_DQS_SCHMOO</id> + <id>ATTR_EFF_CEN_RD_VREF</id> <macro>DIRECT</macro> </hwpfToHbAttrMap> </attribute> +<!-- TODO RTC 69935 down to here --> + <attribute> - <id>EFF_CEN_SLEW_RATE_DQ_DQS</id> - <description>Centaur DQ and DQS Slew Rate. Initialized and used by HWPs.</description> + <id>EFF_CEN_DRV_IMP_DQ_DQS_SCHMOO</id> + <description>Enables for which impedance values can be used and tested in a timing test. Initialized and used by HWPs.</description> <simpleType> - <uint8_t> + <uint32_t> <default>0</default> - </uint8_t> + </uint32_t> <array>2</array> </simpleType> <persistency>volatile-zeroed</persistency> <readable/> <writeable/> <hwpfToHbAttrMap> - <id>ATTR_EFF_CEN_SLEW_RATE_DQ_DQS</id> + <id>ATTR_EFF_CEN_DRV_IMP_DQ_DQS_SCHMOO</id> <macro>DIRECT</macro> </hwpfToHbAttrMap> </attribute> <attribute> - <id>EFF_CEN_SLEW_RATE_ADDR</id> - <description>Centaur Address Slew Rate. Initialized and used by HWPs.</description> + <id>EFF_CEN_DRV_IMP_CLK_SCHMOO</id> + <description>Enables for which impedance values can be used and tested in a timing test. Initialized and used by HWPs.</description> <simpleType> <uint8_t> <default>0</default> @@ -6659,14 +6647,14 @@ firmware notes: Used as override attribute for pstate procedure <readable/> <writeable/> <hwpfToHbAttrMap> - <id>ATTR_EFF_CEN_SLEW_RATE_ADDR</id> + <id>ATTR_EFF_CEN_DRV_IMP_CLK_SCHMOO</id> <macro>DIRECT</macro> </hwpfToHbAttrMap> </attribute> <attribute> - <id>EFF_CEN_SLEW_RATE_CLK</id> - <description>Centaur Clock Slew Rate. Initialized and used by HWPs.</description> + <id>EFF_CEN_DRV_IMP_SPCKE_SCHMOO</id> + <description>Enables for which impedance values can be used and tested in a timing test. Initialized and used by HWPs.</description> <simpleType> <uint8_t> <default>0</default> @@ -6677,14 +6665,14 @@ firmware notes: Used as override attribute for pstate procedure <readable/> <writeable/> <hwpfToHbAttrMap> - <id>ATTR_EFF_CEN_SLEW_RATE_CLK</id> + <id>ATTR_EFF_CEN_DRV_IMP_SPCKE_SCHMOO</id> <macro>DIRECT</macro> </hwpfToHbAttrMap> </attribute> <attribute> - <id>EFF_CEN_SLEW_RATE_SPCKE</id> - <description>Centaur Spare Clock Slew Rate. Initialized and used by HWPs.</description> + <id>EFF_CEN_DRV_IMP_CNTL_SCHMOO</id> + <description>Enables for which impedance values can be used and tested in a timing test. Initialized and used by HWPs.</description> <simpleType> <uint8_t> <default>0</default> @@ -6695,25 +6683,25 @@ firmware notes: Used as override attribute for pstate procedure <readable/> <writeable/> <hwpfToHbAttrMap> - <id>ATTR_EFF_CEN_SLEW_RATE_SPCKE</id> + <id>ATTR_EFF_CEN_DRV_IMP_CNTL_SCHMOO</id> <macro>DIRECT</macro> </hwpfToHbAttrMap> </attribute> <attribute> - <id>EFF_CEN_SLEW_RATE_CNTL</id> - <description>Centaur Control Slew Rate. Initialized and used by HWPs.</description> + <id>EFF_CEN_RCV_IMP_DQ_DQS_SCHMOO</id> + <description>Enables for which impedance values can be used and tested in a timing test. Initialized and used by HWPs.</description> <simpleType> - <uint8_t> + <uint32_t> <default>0</default> - </uint8_t> + </uint32_t> <array>2</array> </simpleType> <persistency>volatile-zeroed</persistency> <readable/> <writeable/> <hwpfToHbAttrMap> - <id>ATTR_EFF_CEN_SLEW_RATE_CNTL</id> + <id>ATTR_EFF_CEN_RCV_IMP_DQ_DQS_SCHMOO</id> <macro>DIRECT</macro> </hwpfToHbAttrMap> </attribute> @@ -6809,8 +6797,8 @@ firmware notes: Used as override attribute for pstate procedure </attribute> <attribute> - <id>EFF_CEN_RD_VREF</id> - <description>Centaur Read Vref. Initialized and used by HWPs.</description> + <id>EFF_DRAM_WR_VREF_SCHMOO</id> + <description>Enables for which VREF to use on the WR Schmoo. Initialized and used by HWPs.</description> <simpleType> <uint32_t> <default>0</default> @@ -6821,7 +6809,25 @@ firmware notes: Used as override attribute for pstate procedure <readable/> <writeable/> <hwpfToHbAttrMap> - <id>ATTR_EFF_CEN_RD_VREF</id> + <id>ATTR_EFF_DRAM_WR_VREF_SCHMOO</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_DRAM_WRDDR4_VREF_SCHMOO</id> + <description>Enables for which VREF to use on the WR Schmoo for DDR4. Initialized and used by HWPs.</description> + <simpleType> + <uint32_t> + <default>0</default> + </uint32_t> + <array>2</array> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_DRAM_WRDDR4_VREF_SCHMOO</id> <macro>DIRECT</macro> </hwpfToHbAttrMap> </attribute> diff --git a/src/usr/targeting/common/xmltohb/target_types.xml b/src/usr/targeting/common/xmltohb/target_types.xml index e60c47904..5ca27259b 100644 --- a/src/usr/targeting/common/xmltohb/target_types.xml +++ b/src/usr/targeting/common/xmltohb/target_types.xml @@ -751,41 +751,45 @@ <attribute><id>EFF_QUATERNARY_RANK_GROUP1</id></attribute> <attribute><id>EFF_QUATERNARY_RANK_GROUP2</id></attribute> <attribute><id>EFF_QUATERNARY_RANK_GROUP3</id></attribute> - <attribute><id>EFF_ODT_RD</id></attribute> - <attribute><id>EFF_ODT_WR</id></attribute> <attribute><id>EFF_CKE_MAP</id></attribute> <attribute><id>EFF_SPCKE_MAP</id></attribute> <attribute><id>EFF_DIMM_SPARE</id></attribute> +<!-- TODO RTC 69935. These termination data attributes need to come from CDIMM + VPD. For now, they are setup by the mss_eff_config_termination HWP. + Remove these when valid vpd is on the CDIMMs --> <attribute><id>EFF_DRAM_RON</id></attribute> <attribute><id>EFF_DRAM_RTT_NOM</id></attribute> <attribute><id>EFF_DRAM_RTT_WR</id></attribute> + <attribute><id>EFF_ODT_RD</id></attribute> + <attribute><id>EFF_ODT_WR</id></attribute> <attribute><id>EFF_DRAM_WR_VREF</id></attribute> <attribute><id>EFF_DRAM_WRDDR4_VREF</id></attribute> - <attribute><id>EFF_DRAM_WR_VREF_SCHMOO</id></attribute> - <attribute><id>EFF_DRAM_WRDDR4_VREF_SCHMOO</id></attribute> + <attribute><id>EFF_CEN_RCV_IMP_DQ_DQS</id></attribute> <attribute><id>EFF_CEN_DRV_IMP_DQ_DQS</id></attribute> <attribute><id>EFF_CEN_DRV_IMP_ADDR</id></attribute> <attribute><id>EFF_CEN_DRV_IMP_CNTL</id></attribute> <attribute><id>EFF_CEN_DRV_IMP_CLK</id></attribute> <attribute><id>EFF_CEN_DRV_IMP_SPCKE</id></attribute> - <attribute><id>EFF_CEN_DRV_IMP_DQ_DQS_SCHMOO</id></attribute> - <attribute><id>EFF_CEN_DRV_IMP_CLK_SCHMOO</id></attribute> - <attribute><id>EFF_CEN_DRV_IMP_SPCKE_SCHMOO</id></attribute> - <attribute><id>EFF_CEN_DRV_IMP_CNTL_SCHMOO</id></attribute> - <attribute><id>EFF_CEN_RCV_IMP_DQ_DQS</id></attribute> - <attribute><id>EFF_CEN_RCV_IMP_DQ_DQS_SCHMOO</id></attribute> <attribute><id>EFF_CEN_SLEW_RATE_DQ_DQS</id></attribute> <attribute><id>EFF_CEN_SLEW_RATE_ADDR</id></attribute> <attribute><id>EFF_CEN_SLEW_RATE_CLK</id></attribute> <attribute><id>EFF_CEN_SLEW_RATE_SPCKE</id></attribute> <attribute><id>EFF_CEN_SLEW_RATE_CNTL</id></attribute> + <attribute><id>EFF_CEN_RD_VREF</id></attribute> +<!-- TODO RTC 69935. Down to here --> + <attribute><id>EFF_CEN_RD_VREF_SCHMOO</id></attribute> + <attribute><id>EFF_DRAM_WR_VREF_SCHMOO</id></attribute> + <attribute><id>EFF_DRAM_WRDDR4_VREF_SCHMOO</id></attribute> + <attribute><id>EFF_CEN_DRV_IMP_DQ_DQS_SCHMOO</id></attribute> + <attribute><id>EFF_CEN_DRV_IMP_CLK_SCHMOO</id></attribute> + <attribute><id>EFF_CEN_DRV_IMP_SPCKE_SCHMOO</id></attribute> + <attribute><id>EFF_CEN_DRV_IMP_CNTL_SCHMOO</id></attribute> + <attribute><id>EFF_CEN_RCV_IMP_DQ_DQS_SCHMOO</id></attribute> <attribute><id>EFF_CEN_SLEW_RATE_DQ_DQS_SCHMOO</id></attribute> <attribute><id>EFF_CEN_SLEW_RATE_CLK_SCHMOO</id></attribute> <attribute><id>EFF_CEN_SLEW_RATE_SPCKE_SCHMOO</id></attribute> <attribute><id>EFF_CEN_SLEW_RATE_ADDR_SCHMOO</id></attribute> <attribute><id>EFF_CEN_SLEW_RATE_CNTL_SCHMOO</id></attribute> - <attribute><id>EFF_CEN_RD_VREF</id></attribute> - <attribute><id>EFF_CEN_RD_VREF_SCHMOO</id></attribute> <attribute><id>EFF_DIMM_SIZE</id></attribute> <attribute><id>EFF_DRAM_BANKS</id></attribute> <attribute><id>EFF_DRAM_ROWS</id></attribute> |
