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| author | Ashish <ashish.more@in.ibm.com> | 2016-09-22 07:55:02 -0400 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-06-22 22:42:08 -0400 |
| commit | fbfac0cc3be29fc556128a95859ef3a3318e915f (patch) | |
| tree | 5233bef145206bf412a0b6205d6a192c202bd0be /src | |
| parent | 9209c26d4c4aae2655b24f298acdcfc2a5d09d0c (diff) | |
| download | talos-hostboot-fbfac0cc3be29fc556128a95859ef3a3318e915f.tar.gz talos-hostboot-fbfac0cc3be29fc556128a95859ef3a3318e915f.zip | |
p9_ppe_commands : Enhanced single step
Change-Id: I7dfd4a1cde9147b011584a8404a3f73f2412ff24
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30086
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Brian T. Vanderpool <vanderp@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42286
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/lib/p9_ppe_utils.H | 35 |
1 files changed, 25 insertions, 10 deletions
diff --git a/src/import/chips/p9/procedures/hwp/lib/p9_ppe_utils.H b/src/import/chips/p9/procedures/hwp/lib/p9_ppe_utils.H index c11b3bb1d..03c3cfacf 100644 --- a/src/import/chips/p9/procedures/hwp/lib/p9_ppe_utils.H +++ b/src/import/chips/p9/procedures/hwp/lib/p9_ppe_utils.H @@ -38,15 +38,22 @@ #define __P9_PPE_UTILS_H__ typedef struct { - uint16_t number; + uint16_t number; + uint32_t value; +} PPERegValue_t; + +typedef struct +{ + PPERegValue_t reg; std::string name; } PPEReg_t; typedef struct { - PPEReg_t reg; - uint32_t value; -} PPERegValue_t; + uint16_t number; + std::string name; +} PPEReg_num_name_t; + typedef struct { @@ -100,17 +107,18 @@ enum PPE_XIRS XIR_SPRG0, }; -enum PPE_SPECIAL_ACCESS -{ - MSR, - CR, -}; +//enum PPE_SPECIAL_ACCESS +//{ +// MSR, +// CR, +//}; enum PPE_SPRS { CTR = 9, DACR = 316, DBCR = 308, DEC = 22, + EDR = 61, IVPR = 63, ISR = 62, LR = 8, @@ -121,7 +129,14 @@ enum PPE_SPRS SRR1 = 27, TCR = 340, TSR = 336, - XER = 1, //336, + XER = 1, + //Some unique identification no. FOR OTHER REGS(non sprn) + XSR = 4200, + IAR = 2, + IR = 3, + MSR = 42, + CR = 420, + }; |
