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| author | Zane Shelley <zshelle@us.ibm.com> | 2017-11-28 16:10:28 -0600 |
|---|---|---|
| committer | Zane C. Shelley <zshelle@us.ibm.com> | 2017-12-11 17:21:39 -0500 |
| commit | f74d2c56712b6a2ccfce256885145b6867826059 (patch) | |
| tree | a7000eeca023d9e0256987dec0a65ee0cd070caa /src | |
| parent | e212014366653c2ef4172a45f0c74b70e9db485f (diff) | |
| download | talos-hostboot-f74d2c56712b6a2ccfce256885145b6867826059.tar.gz talos-hostboot-f74d2c56712b6a2ccfce256885145b6867826059.zip | |
PRD: Fixed target for PCI chiplet FIRs during OP checkstop analysis
Change-Id: If42d99a18d84f41071b2f48ac82f5462cb746b8c
CQ: SW409228
Backport: release-op910
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50121
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Benjamin J. Weisenbeck <bweisenb@us.ibm.com>
Reviewed-by: Brian J. Stegmiller <bjs@us.ibm.com>
Reviewed-by: Caleb N. Palmer <cnpalmer@us.ibm.com>
Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50462
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/usr/diag/prdf/occ_firdata/prdfWriteHomerFirData.C | 25 |
1 files changed, 11 insertions, 14 deletions
diff --git a/src/usr/diag/prdf/occ_firdata/prdfWriteHomerFirData.C b/src/usr/diag/prdf/occ_firdata/prdfWriteHomerFirData.C index 844060ae3..5182afa76 100644 --- a/src/usr/diag/prdf/occ_firdata/prdfWriteHomerFirData.C +++ b/src/usr/diag/prdf/occ_firdata/prdfWriteHomerFirData.C @@ -205,20 +205,6 @@ void getAddresses( TrgtMap_t & io_targMap ) io_targMap[TRGT_PEC][REG_REG] = { - // Chiplet FIRs - // NOTE: This is slightly different from the PRD rule code. These - // chiplet FIRs do exist on the PEC target, but PRD had to put - // these chiplet FIRs on the PROC target because of the way the - // PEC/PHB units are defined. However, that is not an issue when - // gathering this data and it is safe to use the PEC targets. - // NOTE: We cannot use these chiplet FIRs as global registers because - // there is a PHB FIR that is defined on the N2 chiplet and we - // don't want to skip collection of that FIR if there is nothing - // in the PEC chiplete FIRs. - 0x0D040000, // PCI_CHIPLET_CS_FIR - 0x0D040001, // PCI_CHIPLET_RE_FIR - 0x0D040002, // PCI_CHIPLET_FIR_MASK - // PLL registers 0x0D0F001E, // PCI_CONFIG_REG 0x0D0F001F, // PCI_ERROR_REG @@ -382,6 +368,17 @@ void getAddresses( TrgtMap_t & io_targMap ) 0x06040018, // XB_CHIPLET_UCS_FIR 0x06040019, // XB_CHIPLET_UCS_FIR_MASK + // Chiplet FIRs + 0x0D040000, // PCI0_CHIPLET_CS_FIR + 0x0D040001, // PCI0_CHIPLET_RE_FIR + 0x0D040002, // PCI0_CHIPLET_FIR_MASK + 0x0E040000, // PCI1_CHIPLET_CS_FIR + 0x0E040001, // PCI1_CHIPLET_RE_FIR + 0x0E040002, // PCI1_CHIPLET_FIR_MASK + 0x0F040000, // PCI2_CHIPLET_CS_FIR + 0x0F040001, // PCI2_CHIPLET_RE_FIR + 0x0F040002, // PCI2_CHIPLET_FIR_MASK + // Misc registers needed for PRD analysis 0x05011C2E, // PBEXTFIR (does not raise attn, used for fabric sorting) 0x05011C0A, // PB_CENT_MODE |
