SW281594: Update HWP mss_volt_vddr_offset to limit VDDR maximum voltage

Change-Id: Ic4015d9d4630b74179492e14ba5fee22cd258e85
CQ:SW281594
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/13894
Reviewed-by: Brian H. Horton <brianh@linux.ibm.com>
Reviewed-by: Richard J. Knight <rjknight@us.ibm.com>
Tested-by: Richard J. Knight <rjknight@us.ibm.com>
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/14235
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>

6 files changed, 107 insertions, 29 deletions

diff --git a/src/usr/hwpf/hwp/mc_config/mss_volt/mss_volt_vddr_offset.C b/src/usr/hwpf/hwp/mc_config/mss_volt/mss_volt_vddr_offset.C
index c07b4b9f3..5468f3953 100644
--- a/src/usr/hwpf/hwp/mc_config/mss_volt/mss_volt_vddr_offset.C
+++ b/src/usr/hwpf/hwp/mc_config/mss_volt/mss_volt_vddr_offset.C
@@ -22,7 +22,7 @@
 /* permissions and limitations under the License.                         */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
-// $Id: mss_volt_vddr_offset.C,v 1.19 2014/09/12 15:38:08 sglancy Exp $
+// $Id: mss_volt_vddr_offset.C,v 1.20 2014/10/06 15:56:56 sglancy Exp $
 /* File mss_volt_vddr_offset.C created by Stephen Glancy on Tue 20 May 2014. */
 
 //------------------------------------------------------------------------------
@@ -45,6 +45,7 @@
 //------------------------------------------------------------------------------
 // Version:|  Author: |  Date:   | Comment:
 //---------|----------|----------|-----------------------------------------------
+//  1.20   | sglancy  | 10/06/14 | Added in checks for going over voltage limits
 //  1.19   | sglancy  | 09/12/14 | Removed references to EFF attributes
 //  1.18   | sglancy  | 09/11/14 | Fixed bugs and fixed typos
 //  1.17   | sglancy  | 09/10/14 | Added additional checks for bad master power values
@@ -100,6 +101,7 @@ fapi::ReturnCode mss_volt_vddr_offset(std::vector<fapi::Target> & i_targets)
     uint8_t enable, is_functional;
     uint8_t num_non_functional = 0;
     uint8_t percent_uplift,percent_uplift_idle;
+    uint32_t vddr_max_limit_mv;
     std::vector<fapi::Target>  l_mbaChiplets;
     std::vector<fapi::Target>  l_dimm_targets;
     
@@ -208,6 +210,8 @@ fapi::ReturnCode mss_volt_vddr_offset(std::vector<fapi::Target> & i_targets)
        if(l_rc) return l_rc;
        l_rc = FAPI_ATTR_GET(ATTR_MSS_DDR3_VDDR_INTERCEPT,NULL,volt_intercept); 
        if(l_rc) return l_rc;
+       l_rc = FAPI_ATTR_GET(ATTR_MRW_DDR3_VDDR_MAX_LIMIT,NULL,vddr_max_limit_mv); 
+       if(l_rc) return l_rc;
     }
     //ddr4
     else {
@@ -215,6 +219,8 @@ fapi::ReturnCode mss_volt_vddr_offset(std::vector<fapi::Target> & i_targets)
        if(l_rc) return l_rc;
        l_rc = FAPI_ATTR_GET(ATTR_MSS_DDR4_VDDR_INTERCEPT,NULL,volt_intercept); 
        if(l_rc) return l_rc;
+       l_rc = FAPI_ATTR_GET(ATTR_MRW_DDR4_VDDR_MAX_LIMIT,NULL,vddr_max_limit_mv); 
+       if(l_rc) return l_rc;
     }
     
     //computes the active an inactive attribute values
@@ -338,6 +344,12 @@ fapi::ReturnCode mss_volt_vddr_offset(std::vector<fapi::Target> & i_targets)
     //computes and converts the voltage offset into mV
     uint32_t param_vddr_voltage_mv = (500 + var_power_on_vddr*volt_slope/100) / 1000 + volt_intercept;
     FAPI_INF("param_vddr_voltage_mv: %d mV",param_vddr_voltage_mv);
+    //found that the VDDR voltage is over the maximum limit
+    if(param_vddr_voltage_mv > vddr_max_limit_mv) {
+       FAPI_INF("param_vddr_voltage_mv, %d mV, is over vddr_max_limit_mv of %d mV.",param_vddr_voltage_mv,vddr_max_limit_mv);
+       FAPI_INF("Setting param_vddr_voltage_mv to vddr_max_limit_mv");
+       param_vddr_voltage_mv = vddr_max_limit_mv;
+    }
     //prints a debug statement
     FAPI_INF("ATTR_MSS_VDDR_OFFSET: %d mV",param_vddr_voltage_mv);
     
diff --git a/src/usr/hwpf/hwp/memory_attributes.xml b/src/usr/hwpf/hwp/memory_attributes.xml
index eb27a6928..005a0309a 100644
--- a/src/usr/hwpf/hwp/memory_attributes.xml
+++ b/src/usr/hwpf/hwp/memory_attributes.xml
@@ -23,7 +23,7 @@
 <!--                                                                        -->
 <!-- IBM_PROLOG_END_TAG                                                     -->
 <attributes>
-<!-- $Id: memory_attributes.xml,v 1.134 2014/09/08 21:27:37 thi Exp $ -->
+<!-- $Id: memory_attributes.xml,v 1.136 2014/10/03 18:37:47 jdsloat Exp $ -->
 <!-- DO NOT EDIT THIS FILE DIRECTLY PLEASE UPDATE THE ODS FILE AND FOLLOW THE INSTRUCTION TAB -->
 <!-- PLEASE SEE MARK BELLOWS (BELLOWS.IBM.COM) OR OTHERS ON MEMORY TEAM FOR HELP -->
 <!-- *********************************************************************** -->
@@ -2771,17 +2771,7 @@ Will be set at an MBA level with one policy to be used</description>
 </attribute>
 
 <attribute>
-    <id>ATTR_MSS_POWER_CONTROL_CAPABLE</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Capable power control settings.</description>
-    <valueType>uint8</valueType>
-    <enum>NONE = 0x00, SLOWEXIT_CAPABLE = 0x01, FASTEXIT_CAPABLE = 0x02, FASTSLOW_CAPABLE = 0x03</enum>
-    <platInit/>
-    <odmVisable/>
-</attribute>
-
-<attribute>
-    <id>ATTR_MSS_POWER_CONTROL_REQUESTED</id>
+    <id>ATTR_MRW_POWER_CONTROL_REQUESTED</id>
     <targetType>TARGET_TYPE_SYSTEM</targetType>
     <description>Capable power control settings. In MRW.</description>
     <valueType>uint8</valueType>
@@ -2878,6 +2868,24 @@ Will be set at an MBA level with one policy to be used</description>
     <persistent/>
 </attribute>
 
+<attribute>
+    <id>ATTR_MRW_DDR3_VDDR_MAX_LIMIT</id>
+    <targetType>TARGET_TYPE_SYSTEM</targetType>
+    <description>Maximum voltage limit for the dynamic VID DDR3 VDDR voltage setpoint. In mV.</description>
+    <valueType>uint32</valueType>
+    <platInit/>
+    <odmVisable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_MRW_DDR4_VDDR_MAX_LIMIT</id>
+    <targetType>TARGET_TYPE_SYSTEM</targetType>
+    <description>Maximum voltage limit for the dynamic VID DDR4 VDDR voltage setpoint. In mV.</description>
+    <valueType>uint32</valueType>
+    <platInit/>
+    <odmVisable/>
+</attribute>  
+
 <!-- DO NOT EDIT THIS FILE DIRECTLY PLEASE UPDATE THE ODS FILE AND FOLLOW THE INSTRUCTION TAB -->
 <!-- PLEASE SEE MARK BELLOWS (BELLOWS.IBM.COM) OR OTHERS ON MEMORY TEAM FOR HELP -->
 </attributes>
diff --git a/src/usr/hwpf/test/hwpMBvpdAccessorTest.H b/src/usr/hwpf/test/hwpMBvpdAccessorTest.H
index 2a2a657dd..25b85e815 100644
--- a/src/usr/hwpf/test/hwpMBvpdAccessorTest.H
+++ b/src/usr/hwpf/test/hwpMBvpdAccessorTest.H
@@ -489,14 +489,6 @@ public:
                                           TARGET_TYPE_MEMBUF_CHIP,
                    (const_cast<TARGETING::Target*>(l_mb_target)) );
 
-
-            uint8_t l_val = 5;
-            l_fapirc = FAPI_ATTR_GET(ATTR_MSS_POWER_CONTROL_CAPABLE,
-                                &l_fapi_mb_target,l_val);
-
-            if(l_fapirc) break;
-               TS_TRACE( "Power Control Capable Accessor "
-                         "POWER_CONTROL_CAPABLE=0x%02x", l_val);
         }
         if (l_fapirc)
         {
diff --git a/src/usr/targeting/common/genHwsvMrwXml.pl b/src/usr/targeting/common/genHwsvMrwXml.pl
index 30c2830c4..5c85d0846 100644
--- a/src/usr/targeting/common/genHwsvMrwXml.pl
+++ b/src/usr/targeting/common/genHwsvMrwXml.pl
@@ -240,6 +240,7 @@ push @systemAttr,
     "MNFG_XBUS_MIN_EYE_WIDTH", $reqPol->{'mnfg-xbus-min-eye-width'},
     "REDUNDANT_CLOCKS", $reqPol->{'redundant-clocks'},
     "MSS_DRAMINIT_RESET_DISABLE", $reqPol->{'mss_draminit_reset_disable'},
+    "MRW_POWER_CONTROL_REQUESTED", (uc $reqPol->{'mem_power_control_usage'}),
 ];
 
 if ($reqPol->{'mba_cacheline_interleave_mode_control'} eq 'required')
@@ -311,6 +312,11 @@ $optTargPolicies{'MSS_VOLT_DDR4_VDDR_SLOPE'}{MRW_NAME}
     = "mem_ddr4_vddr_slope" ;
 $optTargPolicies{'MSS_VOLT_DDR4_VDDR_INTERCEPT'}{MRW_NAME}
     = "mem_ddr4_vddr_intercept" ;
+$optTargPolicies{'MRW_DDR3_VDDR_MAX_LIMIT'}{MRW_NAME}
+    = "mem_ddr3_vddr_max_limit" ;
+$optTargPolicies{'MRW_DDR4_VDDR_MAX_LIMIT'}{MRW_NAME}
+    = "mem_ddr4_vddr_max_limit" ;
+
 
 foreach my $policy ( keys %optTargPolicies )
 {
diff --git a/src/usr/targeting/common/xmltohb/attribute_types.xml b/src/usr/targeting/common/xmltohb/attribute_types.xml
index 236cd88d2..1cdf89a4f 100644
--- a/src/usr/targeting/common/xmltohb/attribute_types.xml
+++ b/src/usr/targeting/common/xmltohb/attribute_types.xml
@@ -14223,6 +14223,24 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript
 </attribute>
 
 <attribute>
+    <id>MRW_DDR3_VDDR_MAX_LIMIT</id>
+    <description>Maximum voltage limit for the dynamic VID DDR3 VDDR
+        voltage setpoint. In mV.
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MRW_DDR3_VDDR_MAX_LIMIT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
     <id>MSS_VOLT_DDR4_VDDR_SLOPE</id>
     <description>Units: 1/Amps
     </description>
@@ -14257,6 +14275,24 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript
 </attribute>
 
 <attribute>
+    <id>MRW_DDR4_VDDR_MAX_LIMIT</id>
+    <description>Maximum voltage limit for the dynamic VID DDR4 VDDR voltage
+        setpoint. In mV.
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MRW_DDR4_VDDR_MAX_LIMIT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
     <id>MSS_VOLT_OVERRIDE</id>
     <description>
         Voltage override for MSS_VOLT.  Used for membuf lab debug.
@@ -14303,25 +14339,49 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript
     </hwpfToHbAttrMap>
 </attribute>
 
+<enumerationType>
+    <id>MRW_POWER_CONTROL_REQUESTED</id>
+    <description>
+        Enumeration defining the type of power control requested
+    </description>
+    <enumerator>
+        <name>NONE</name>
+        <value>0</value>
+    </enumerator>
+    <enumerator>
+        <name>SLOWEXIT</name>
+        <value>1</value>
+    </enumerator>
+    <enumerator>
+        <name>FASTEXIT</name>
+        <value>2</value>
+    </enumerator>
+    <enumerator>
+        <name>FASTEXIT_AND_SLOWEXIT</name>
+        <value>3</value>
+    </enumerator>
+    <default>NONE</default>
+</enumerationType>
+
 <attribute>
-    <id>MSS_POWER_CONTROL_REQUESTED</id>
+    <id>MRW_POWER_CONTROL_REQUESTED</id>
     <description>
         Type of memory power control requested
 
-        0x00 = Off
+        0x00 = NONE
         0x01 = SLOWEXIT
         0x02 = FASTEXIT
+        0x03 = FASTEXIT_AND_SLOWEXIT
     </description>
     <simpleType>
         <uint8_t>
             <default>0x00</default>
         </uint8_t>
     </simpleType>
-    <persistency>volatile</persistency>
+    <persistency>non-volatile</persistency>
     <readable/>
-    <writeable/>
     <hwpfToHbAttrMap>
-        <id>ATTR_MSS_POWER_CONTROL_REQUESTED</id>
+        <id>ATTR_MRW_POWER_CONTROL_REQUESTED</id>
         <macro>DIRECT</macro>
     </hwpfToHbAttrMap>
 </attribute>
diff --git a/src/usr/targeting/common/xmltohb/target_types.xml b/src/usr/targeting/common/xmltohb/target_types.xml
index a160b38a1..6ec420a73 100644
--- a/src/usr/targeting/common/xmltohb/target_types.xml
+++ b/src/usr/targeting/common/xmltohb/target_types.xml
@@ -125,6 +125,9 @@
     <attribute><id>FABRIC_TO_PHYSICAL_NODE_MAP</id></attribute>
     <!-- Start memory_attributes.xml -->
     <attribute><id>ISDIMM_POWER_CURVE_ALGORITHM_VERSION</id></attribute>
+    <attribute><id>MRW_POWER_CONTROL_REQUESTED</id></attribute>
+    <attribute><id>MRW_DDR3_VDDR_MAX_LIMIT</id></attribute>
+    <attribute><id>MRW_DDR4_VDDR_MAX_LIMIT</id></attribute>
     <!-- Start pm_plat_attributes.xml -->
     <attribute><id>PM_EXTERNAL_VRM_STEPSIZE</id></attribute>
     <attribute><id>PM_EXTERNAL_VRM_STEPDELAY</id></attribute>
@@ -278,8 +281,6 @@
     <attribute><id>PM_PFET_WORKAROUND_RUN_FLAG</id></attribute>
     <attribute><id>PM_SLEEP_ENABLE</id></attribute>
     <attribute><id>MSS_DRAMINIT_RESET_DISABLE</id></attribute>
-    <attribute><id>ISDIMM_POWER_CURVE_ALGORITHM_VERSION</id></attribute>
-    <attribute><id>MSS_POWER_CONTROL_REQUESTED</id></attribute>
     <attribute><id>RECONFIG_LOOP_TESTS</id></attribute>
     <attribute><id>RECONFIG_LOOP_TESTS_ENABLE</id></attribute>
     <!-- IPMI Sensor numbers for reporting system status and info to the BMC -->
@@ -1408,7 +1409,6 @@
             <field><id>reserved</id><value>0</value></field>
         </default>
     </attribute>
-    <attribute><id>MSS_POWER_CONTROL_REQUESTED</id></attribute>
     <attribute><id>CDM_DOMAIN</id><default>MEM</default></attribute>
     <!-- IPMI Sensor numbers for reporting Centaur status to the BMC -->
     <attribute><id>IPMI_SENSORS</id></attribute>