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authorChristian Geddes <crgeddes@us.ibm.com>2018-09-25 15:04:40 -0500
committerWilliam G. Hoffa <wghoffa@us.ibm.com>2018-09-26 09:44:21 -0500
commite569e65e98947aa118b3a28e86b318b4c3c33906 (patch)
treea758224fabf96f9f646513563f5778e447abf47c /src
parent2efcf21862329a9dc028ee5a017556f5aa19d62d (diff)
downloadtalos-hostboot-e569e65e98947aa118b3a28e86b318b4c3c33906.tar.gz
talos-hostboot-e569e65e98947aa118b3a28e86b318b4c3c33906.zip
Re-read SBE doorbell register in simics if PSU interrupt is found
We use PSU interrupts to signal between the host and the SBE if there is a PSU message available for each other. Bit 0 in the doorbell reg tells hostboot that the SBE has put a message in the communication registers. Once hostboot sees this it is responsible for clearing that bit so the SBE knows it can send another msg. We are seeing a problem in simics where hostboot is not clearing this bit, we think its because when hostboot checks if the bit is set, the simics has not set the value yet, so hostboot never clears it. This change adds a retry in simics so we will re-read the doorbell register if we take a PSU interrupt and the doorbell register is saying its empty. We are hoping this wait+retry will give the simics models enough time to catch up if this is indeed the problem. This issue has not been observed in real HW. Change-Id: I85c63fe545d473d55f6ec0fb554b6c760ae5cbf8 CQ: SW444734 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/66622 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
Diffstat (limited to 'src')
-rw-r--r--src/usr/sbeio/sbe_psudd.C24
1 files changed, 23 insertions, 1 deletions
diff --git a/src/usr/sbeio/sbe_psudd.C b/src/usr/sbeio/sbe_psudd.C
index ab53d0d3e..3e23c9642 100644
--- a/src/usr/sbeio/sbe_psudd.C
+++ b/src/usr/sbeio/sbe_psudd.C
@@ -54,6 +54,7 @@
#include <sys/time.h>
#include <errl/errludprintk.H>
#include <vfs/vfs.H> // module_is_loaded
+#include <util/misc.H>
trace_desc_t* g_trac_sbeio;
TRAC_INIT(&g_trac_sbeio, SBEIO_COMP_NAME, 6*KILOBYTE, TRACE::BUFFER_SLOW);
@@ -201,7 +202,7 @@ void SbePsu::msgHandler()
{
//Handle the interrupt message -- pass the PIR of the
// proc causing the interrupt
- SBE_TRACD("SbePsu::msgHandler got MSG_INTR message");
+ SBE_TRACF("SbePsu::msgHandler got MSG_INTR message");
l_err = handleInterrupt(msg->data[1]);
if (l_err)
@@ -492,6 +493,7 @@ errlHndl_t SbePsu::handleInterrupt(PIR_t i_pir)
errlHndl_t errl = nullptr;
SBE_TRACD(ENTER_MRK "SbePsu::handleInterrupt");
bool l_responseAvailable = false;
+ bool l_simicsRunning = Util::isSimicsRunning();
do
{
@@ -525,6 +527,20 @@ errlHndl_t SbePsu::handleInterrupt(PIR_t i_pir)
if (errl)
{ break; }
+
+ if ( l_simicsRunning &&
+ HOST_RESPONSE_WAITING != (l_doorbellVal & HOST_RESPONSE_WAITING) )
+ {
+ // wait a second and try again
+ nanosleep(1,0);
+
+ //read the door bell again to see if the simics model caught up
+ errl = readScom(l_intrChip,PSU_HOST_DOORBELL_REG_RW,&l_doorbellVal);
+ if (errl)
+ { break; }
+
+ }
+
if (l_doorbellVal & HOST_RESPONSE_WAITING)
{
//In this case the doorbell reg indicated a response is
@@ -552,6 +568,12 @@ errlHndl_t SbePsu::handleInterrupt(PIR_t i_pir)
if (errl)
{ break; }
}
+ else if(l_simicsRunning)
+ {
+ SBE_TRACF(ENTER_MRK "SbePsu::handleInterrupt interrupt found but no Doorbell is set 0x%llx", l_doorbellVal);
+ // If we are in simics we want to break out here
+ MAGIC_INSTRUCTION(MAGIC_BREAK_ON_ERROR);
+ }
//Clear the rest of the PSU Scom Reg Interrupt Status register
// This clears the PSU interrupt condition so the PSU interrupt
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