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| author | Zane Shelley <zshelle@us.ibm.com> | 2017-05-26 11:08:27 -0500 |
|---|---|---|
| committer | Zane C. Shelley <zshelle@us.ibm.com> | 2017-06-08 12:35:30 -0400 |
| commit | e1cfd4e624d95b6a6e8c96926848a633e10b21f4 (patch) | |
| tree | 7b3e849cc5d60b607950c79723c579c69c8e9791 /src | |
| parent | a1e1b5031aade5d2847269ffd70b9ec3134dd2e6 (diff) | |
| download | talos-hostboot-e1cfd4e624d95b6a6e8c96926848a633e10b21f4.tar.gz talos-hostboot-e1cfd4e624d95b6a6e8c96926848a633e10b21f4.zip | |
PRD: bug in memory CE threshold calculation
Change-Id: I317980852382498da25874e00761386d180b9d60
CQ: SW390498
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41050
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Benjamin J. Weisenbeck <bweisenb@us.ibm.com>
Reviewed-by: Caleb N. Palmer <cnpalmer@us.ibm.com>
Reviewed-by: Brian J. Stegmiller <bjs@us.ibm.com>
Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41489
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Diffstat (limited to 'src')
| -rwxr-xr-x | src/usr/diag/prdf/common/plat/mem/prdfMemThresholds.C | 11 | ||||
| -rwxr-xr-x | src/usr/diag/prdf/common/plat/mem/prdfMemUtils.C | 59 |
2 files changed, 35 insertions, 35 deletions
diff --git a/src/usr/diag/prdf/common/plat/mem/prdfMemThresholds.C b/src/usr/diag/prdf/common/plat/mem/prdfMemThresholds.C index e0cc1790f..fcb01f460 100755 --- a/src/usr/diag/prdf/common/plat/mem/prdfMemThresholds.C +++ b/src/usr/diag/prdf/common/plat/mem/prdfMemThresholds.C @@ -181,19 +181,16 @@ void getMnfgMemCeTh( ExtensibleChip * i_chip, const MemRank & i_rank, uint8_t baseAllowed = baseTh - 1; // Calculate CEs per DRAM. - // The DRAM size is in MBAXCR[6:7], where 0 = 2Gb, 1 = 4Gb, 2 = 8Gb, - // and 3 = 16 Gb. So the allowed CEs per DRAM can be calculated with - // the following: - // perDram = base * 2^(MBAXCR[6:7]+1) * (9/16) - // or, perDram = (base << MBAXCR[6:7]+1) * (9/16) - uint32_t computeBase = (baseAllowed << (size+1)) * 9; + // (base * dram size) * (9/16) + uint32_t computeBase = baseAllowed * size * 9; o_cePerDram = (computeBase + 8) / 16; // Calculate CEs per DIMM. + // (base * dram size) * (2 + rank count) * (9/16) o_cePerDimm = ((computeBase * (2 + rankCount)) + 8) / 16; // Calculate CEs per rank per DIMM. - // Same as perDimm where rankCount is 1; + // Same as per DIMM where rank count is 1 o_cePerRank = ((computeBase * (2 + 1)) + 8) / 16; } } diff --git a/src/usr/diag/prdf/common/plat/mem/prdfMemUtils.C b/src/usr/diag/prdf/common/plat/mem/prdfMemUtils.C index 82a0f3d81..41d86cda4 100755 --- a/src/usr/diag/prdf/common/plat/mem/prdfMemUtils.C +++ b/src/usr/diag/prdf/common/plat/mem/prdfMemUtils.C @@ -416,34 +416,37 @@ uint8_t getDramSize<TYPE_MBA>(ExtensibleChip *i_chip, uint8_t i_dimmSlct) uint8_t o_rc = 0; - //TODO RTC 166802 - //do - //{ - // CenMbaDataBundle * mbadb = getMbaDataBundle( i_chip ); - // ExtensibleChip * membufChip = mbadb->getMembChip(); - // if ( NULL == membufChip ) - // { - // PRDF_ERR( PRDF_FUNC "getMembChip() failed: MBA=0x%08x", - // getHuid(mbaTrgt) ); - // o_rc = FAIL; break; - // } - - // uint32_t pos = getTargetPosition(mbaTrgt); - // // If we will still be using the register values for centaur, we will - // // need to convert them to the appropriate enum - // const char * reg_str = (0 == pos) ? "MBA0_MBAXCR" : "MBA1_MBAXCR"; - - // SCAN_COMM_REGISTER_CLASS * reg = membufChip->getRegister( reg_str ); - // o_rc = reg->Read(); - // if ( SUCCESS != o_rc ) - // { - // PRDF_ERR( PRDF_FUNC "Read() failed on %s. Target=0x%08x", - // reg_str, getHuid(mbaTrgt) ); - // break; - // } - // o_size = reg->GetBitFieldJustified( 6, 2 ); - - //} while(0); + /* TODO RTC 166802 - consider using ATTR_EFF_DRAM_DENSITY as well. + do + { + CenMbaDataBundle * mbadb = getMbaDataBundle( i_chip ); + ExtensibleChip * membufChip = mbadb->getMembChip(); + if ( NULL == membufChip ) + { + PRDF_ERR( PRDF_FUNC "getMembChip() failed: MBA=0x%08x", + getHuid(mbaTrgt) ); + o_rc = FAIL; break; + } + + uint32_t pos = getTargetPosition(mbaTrgt); + const char * reg_str = (0 == pos) ? "MBA0_MBAXCR" : "MBA1_MBAXCR"; + + SCAN_COMM_REGISTER_CLASS * reg = membufChip->getRegister( reg_str ); + o_rc = reg->Read(); + if ( SUCCESS != o_rc ) + { + PRDF_ERR( PRDF_FUNC "Read() failed on %s. Target=0x%08x", + reg_str, getHuid(mbaTrgt) ); + break; + } + + // The value of MBAXCR[6:7] is 0 = 2Gb, 1 = 4Gb, 2 = 8Gb, and 3 = 16 Gb. + // Therefore, to get the DRAM size do the following: + // DRAM size = 2 ^ (MBAXCR[6:7] + 1) + o_size = 1 << (reg->GetBitFieldJustified(6,2) + 1); + + } while(0); + */ return o_rc; |

