diff options
| author | crgeddes <crgeddes@us.ibm.com> | 2016-09-29 11:49:04 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2016-10-03 16:11:05 -0400 |
| commit | dfccfcbc817be65c9ed71ee627ddacd9ddbb6ddc (patch) | |
| tree | 9a2429b6914ac58810a321347c0e83f90d6db17f /src | |
| parent | 03c352fc3a737a709c863a9d2a1ce7a510c6c0da (diff) | |
| download | talos-hostboot-dfccfcbc817be65c9ed71ee627ddacd9ddbb6ddc.tar.gz talos-hostboot-dfccfcbc817be65c9ed71ee627ddacd9ddbb6ddc.zip | |
Update genHwsvMrw.xml for memory_mrw_attributes.xml default values
This commit adds attributes to the genHwsvMrw script so that default
values will be generated when we generate mrw xml
Change-Id: If678b80302fd2cb7888a00f9ba5fa9b52db7f31f
RTC: 161065
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30489
Reviewed-by: Martin Gloff <mgloff@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Matt Derksen <v2cibmd@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src')
| -rwxr-xr-x | src/usr/targeting/common/genHwsvMrwXml.pl | 15 | ||||
| -rw-r--r-- | src/usr/targeting/common/xmltohb/simics_NIMBUS.system.xml | 4 |
2 files changed, 19 insertions, 0 deletions
diff --git a/src/usr/targeting/common/genHwsvMrwXml.pl b/src/usr/targeting/common/genHwsvMrwXml.pl index 2b5b313c2..18e14a01a 100755 --- a/src/usr/targeting/common/genHwsvMrwXml.pl +++ b/src/usr/targeting/common/genHwsvMrwXml.pl @@ -322,6 +322,21 @@ push @systemAttr, "MNFG_TH_CEN_L4_CACHE_CES", $reqPol->{'mnfg_th_cen_l4_cache_ces'}, "BRAZOS_RX_FIFO_OVERRIDE", $reqPol->{'rx_fifo_final_l2u_dly_override'}, "MAX_ALLOWED_DIMM_FREQ", $reqPol->{'max_allowed_dimm_freq'}, + "MRW_VMEM_REGULATOR_MEMORY_POWER_LIMIT_PER_DIMM_DDR3", $reqPol->{'vmem_regulator_memory_power_limit_per_dimm'}, + "MRW_VMEM_REGULATOR_MEMORY_POWER_LIMIT_PER_DIMM_DDR4", $reqPol->{'vmem_regulator_memory_power_limit_per_dimm_ddr4'}, + "MSS_MRW_VMEM_REGULATOR_POWER_LIMIT_PER_DIMM_ADJ_ENABLE", $reqPol->{'vmem_regulator_memory_power_limit_per_dimm_adjustment_enable'}, + "MSS_MRW_PREFETCH_ENABLE", $reqPol->{'mss_prefetch_enable'}, + "MSS_MRW_CLEANER_ENABLE", $reqPol->{'mss_cleaner_enable'}, + #TODO RTC:161768 these need to come from MRW + "MSS_MRW_MEM_M_DRAM_CLOCKS", 512, + "MSS_MRW_FINE_REFRESH_MODE", 0, + "MSS_MRW_TEMP_REFRESH_RANGE", 1, + "MSS_MRW_RESET_DELAY_BEFORE_CAL", 0, + "MSS_MRW_MCS_PREFETCH_RETRY_THRESHOLD", 0, + "MSS_MRW_PERIODIC_MEMCAL_MODE_OPTIONS", 0xD90C, + "MSS_MRW_PERIODIC_ZQCAL_MODE_OPTIONS", 0x8000, + "MSS_MRW_DRAM_2N_MODE", 0, + "MSS_MRW_SAFEMODE_MEM_THROTTLED_N_COMMANDS_PER_PORT", 32, ]; if ($reqPol->{'required_synch_mode'} eq 'never') diff --git a/src/usr/targeting/common/xmltohb/simics_NIMBUS.system.xml b/src/usr/targeting/common/xmltohb/simics_NIMBUS.system.xml index 56f0ed6ea..8358f796d 100644 --- a/src/usr/targeting/common/xmltohb/simics_NIMBUS.system.xml +++ b/src/usr/targeting/common/xmltohb/simics_NIMBUS.system.xml @@ -139,6 +139,10 @@ 0 </default> </attribute> + <attribute> + <id>MSS_MRW_MAX_DRAM_DATABUS_UTIL</id> + <default>10000</default> + </attribute> </targetInstance> <!-- System node 0 --> |
