VBU feedback fixes

  Scominit - plug rule fix
  FAPI_ASSERT - Added <callout> sections in xml, added set_ for callouts
  ddrphy.scom.initfile - Spy Fix
  Draminit - Extend timeout counters for sim

Change-Id: I55c453df8fa6a53a1292f853560ba2489f8e2343
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40518
Dev-Ready: Brent Wieman <bwieman@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43548
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

9 files changed, 129 insertions, 55 deletions

diff --git a/src/import/chips/centaur/procedures/hwp/memory/p9c_dimmBadDqBitmapFuncs.C b/src/import/chips/centaur/procedures/hwp/memory/p9c_dimmBadDqBitmapFuncs.C
index 42fd91ec0..3e768bc71 100755
--- a/src/import/chips/centaur/procedures/hwp/memory/p9c_dimmBadDqBitmapFuncs.C
+++ b/src/import/chips/centaur/procedures/hwp/memory/p9c_dimmBadDqBitmapFuncs.C
@@ -66,6 +66,7 @@ extern "C"
                     (i_dimm < MAX_DIMM_PER_PORT) &&
                     (i_rank < MAX_RANKS_PER_DIMM),
                     fapi2::CEN_BAD_DQ_DIMM_BAD_PARAM().
+                    set_MBA(i_mba).
                     set_FFDC_PORT(i_port).
                     set_FFDC_DIMM(i_dimm).
                     set_FFDC_RANK(i_rank),
@@ -94,6 +95,7 @@ extern "C"
 
         FAPI_ASSERT(dimmIter != l_dimms.end(),
                     fapi2::CEN_BAD_DQ_DIMM_NOT_FOUND().
+                    set_MBA(i_mba).
                     set_FFDC_PORT(i_port).
                     set_FFDC_DIMM(i_dimm),
                     "dimmBadDqCheckParamFindDimm: "
diff --git a/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_ddr4_funcs.C b/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_ddr4_funcs.C
index f6f53c294..ca84a7a12 100755
--- a/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_ddr4_funcs.C
+++ b/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_ddr4_funcs.C
@@ -584,6 +584,7 @@ fapi2::ReturnCode mss_create_rcd_ddr4(const fapi2::Target<fapi2::TARGET_TYPE_MBA
             {
                 FAPI_ASSERT(false,
                             fapi2::CEN_DRAM_INVALID_FREQ().
+                            set_TARGET_MBA_ERROR(i_target_mba).
                             set_FREQ(l_mss_freq).
                             set_TARGET(i_target_mba),
                             "Invalid LRDIMM ATTR_CEN_MSS_FREQ = %d on %s!",
@@ -604,6 +605,7 @@ fapi2::ReturnCode mss_create_rcd_ddr4(const fapi2::Target<fapi2::TARGET_TYPE_MBA
             {
                 FAPI_ASSERT(false,
                             fapi2::CEN_DRAM_INVALID_VOLT().
+                            set_TARGET_MBA_ERROR(i_target_mba).
                             set_VOLT(l_mss_volt).
                             set_TARGET(i_target_mba),
                             "Invalid LRDIMM ATTR_CEN_MSS_VOLT = %d on %s!", l_mss_volt,
@@ -691,7 +693,14 @@ fapi2::ReturnCode mss_create_rcd_ddr4(const fapi2::Target<fapi2::TARGET_TYPE_MBA
             }
             else
             {
-                FAPI_ASSERT(false, fapi2::CEN_MSS_PLACE_HOLDER_ERROR(), "Invalid DIMM ATTR_CEN_MSS_FREQ = %d on %s!", l_mss_freq,
+                FAPI_ASSERT(false,
+                            fapi2::CEN_DRAM_INVALID_FREQ().
+                            set_TARGET_MBA_ERROR(i_target_mba).
+                            set_FREQ(l_mss_freq).
+                            set_PORT(l_port).
+                            set_TARGET(i_target_mba),
+                            "Invalid DIMM ATTR_CEN_MSS_FREQ = %d on %s!",
+                            l_mss_freq,
                             mss::c_str(i_target_mba));
             }
 
@@ -3535,8 +3544,9 @@ fapi2::ReturnCode mss_ddr4_modify_mrs_pda(const fapi2::Target<fapi2::TARGET_TYPE
 
         //MRS attribute not found, error out
         default:
-            FAPI_ASSERT(false, fapi2::CEN_MSS_PDA_NONMRS_ATTR_NAME().set_NONMRS_ATTR_NAME(i_attribute_name).set_MBA_TARGET(
-                            i_target),
+            FAPI_ASSERT(false, fapi2::CEN_MSS_PDA_NONMRS_ATTR_NAME().
+                        set_NONMRS_ATTR_NAME(i_attribute_name).
+                        set_MBA_TARGET(i_target),
                         "ERROR!! Found attribute name not associated with an MRS! Exiting...");
     }
 
@@ -4385,7 +4395,10 @@ fapi2::ReturnCode mss_ddr4_load_nominal_mrs_pda(const fapi2::Target<fapi2::TARGE
     }
     else
     {
-        FAPI_ASSERT(false, fapi2::CEN_MSS_PDA_MRS_NOT_FOUND().set_MRS_VALUE(i_MRS).set_MBA_TARGET(i_target),
+        FAPI_ASSERT(false,
+                    fapi2::CEN_MSS_PDA_MRS_NOT_FOUND().
+                    set_MRS_VALUE(i_MRS).
+                    set_MBA_TARGET(i_target),
                     "ERROR!! Found attribute name not associated with an MRS! Exiting...");
     }
 
diff --git a/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_draminit.C b/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_draminit.C
index 1583dd1fc..7cf2dca98 100755
--- a/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_draminit.C
+++ b/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_draminit.C
@@ -334,6 +334,7 @@ extern "C" {
             {
                 FAPI_ASSERT(false,
                             fapi2::CEN_DRAM_GEN_NOT_RECOGNIZED().
+                            set_TARGET_MBA_ERROR(i_target).
                             set_DRAM_GEN(l_dram_gen).
                             set_PORT(l_port_number).
                             set_TARGET(i_target),
@@ -346,7 +347,7 @@ extern "C" {
         {
             // Set the End bit on the last CCS Instruction
             FAPI_TRY(mss_ccs_set_end_bit( i_target, l_ccs_inst_cnt - 1), "CCS_SET_END_BIT FAILED");
-            FAPI_TRY(mss_execute_ccs_inst_array(i_target, 10, 10), " EXECUTE_CCS_INST_ARRAY FAILED");
+            FAPI_TRY(mss_execute_ccs_inst_array(i_target, DELAY_200000SIMCYCLES, 20), " EXECUTE_CCS_INST_ARRAY FAILED");
 
             l_ccs_inst_cnt = 0;
         }
diff --git a/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_draminit_training.C b/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_draminit_training.C
index 5c3107212..c7b5dcfb9 100755
--- a/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_draminit_training.C
+++ b/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_draminit_training.C
@@ -665,7 +665,8 @@ extern "C" {
                         fapi2::CEN_MSS_DRAMINIT_TRAINING_WR_LVL_ERROR().
                         set_MBA_POSITION(l_mbaPosition).
                         set_PORT_POSITION(i_port).
-                        set_RANKGROUP_POSITION(i_group),
+                        set_RANKGROUP_POSITION(i_group).
+                        set_TARGET_MBA_ERROR(i_target),
                         "+++ Write leveling error occured on %s port: %d rank group: %d! +++",
                         mss::c_str(i_target), i_port, i_group);
 
@@ -717,6 +718,7 @@ extern "C" {
                                       i_group);
                             FAPI_ASSERT(false,
                                         fapi2::CEN_MSS_DRAMINIT_TRAINING_DQS_ALIGNMENT_ERROR().
+                                        set_TARGET_MBA_ERROR(i_target).
                                         set_MBA_POSITION(l_mbaPosition).
                                         set_PORT_POSITION(i_port).
                                         set_RANKGROUP_POSITION(i_group),
diff --git a/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_eff_config.C b/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_eff_config.C
index bef0bebf0..963c0a2cd 100644
--- a/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_eff_config.C
+++ b/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_eff_config.C
@@ -163,7 +163,8 @@ extern "C"
 
             // AST HERE: !If DDR4 spec changes to include other values, this section needs to be updated!
             FAPI_ASSERT((l_spd_tb_mtb_ddr4 == 0) && (l_spd_tb_ftb_ddr4 == 0),
-                        fapi2::CEN_MSS_EFF_CONFIG_INVALID_DDR4_SPD_TB(),
+                        fapi2::CEN_MSS_EFF_CONFIG_INVALID_DDR4_SPD_TB().
+                        set_TARGET_DIMM(i_target_dimm),
                         "Invalid DDR4 MTB/FTB Timebase received from SPD attribute on %s!", mss::c_str(i_target_dimm));
 
             // for 1000fs = 1ps = 1000 * 1 / 1
@@ -212,7 +213,8 @@ extern "C"
         else
         {
             FAPI_ASSERT(false,
-                        fapi2::CEN_MSS_EFF_CONFIG_INCOMPATABLE_SPD_DRAM_GEN(),
+                        fapi2::CEN_MSS_EFF_CONFIG_INCOMPATABLE_SPD_DRAM_GEN().
+                        set_TARGET_DIMM(i_target_dimm),
                         "Incompatable SPD DRAM generation on %s!", mss::c_str(i_target_dimm));
         }
 
@@ -345,6 +347,7 @@ extern "C"
         {
             FAPI_ASSERT(false,
                         fapi2::CEN_MSS_EFF_CONFIG_MISMATCH_EMPTY().
+                        set_TARGET_MBA(i_target_mba).
                         set_CUR_DIMM_SPD_VALID_U8ARRAY_0_0(i_mss_eff_config_data->cur_dimm_spd_valid_u8array[0][0]).
                         set_CUR_DIMM_SPD_VALID_U8ARRAY_0_1(i_mss_eff_config_data->cur_dimm_spd_valid_u8array[0][1]).
                         set_CUR_DIMM_SPD_VALID_U8ARRAY_1_0(i_mss_eff_config_data->cur_dimm_spd_valid_u8array[1][0]).
@@ -372,6 +375,7 @@ extern "C"
         {
             FAPI_ASSERT(false,
                         fapi2::CEN_MSS_EFF_CONFIG_MISMATCH_SIDE().
+                        set_TARGET_MBA(i_target_mba).
                         set_CUR_DIMM_SPD_VALID_U8ARRAY_0_0(i_mss_eff_config_data->cur_dimm_spd_valid_u8array[0][0]).
                         set_CUR_DIMM_SPD_VALID_U8ARRAY_0_1(i_mss_eff_config_data->cur_dimm_spd_valid_u8array[0][1]).
                         set_CUR_DIMM_SPD_VALID_U8ARRAY_1_0(i_mss_eff_config_data->cur_dimm_spd_valid_u8array[1][0]).
@@ -398,6 +402,7 @@ extern "C"
         {
             FAPI_ASSERT(false,
                         fapi2::CEN_MSS_EFF_CONFIG_MISMATCH_TOP().
+                        set_TARGET_MBA(i_target_mba).
                         set_CUR_DIMM_SPD_VALID_U8ARRAY_0_0(i_mss_eff_config_data->cur_dimm_spd_valid_u8array[0][0]).
                         set_CUR_DIMM_SPD_VALID_U8ARRAY_0_1(i_mss_eff_config_data->cur_dimm_spd_valid_u8array[0][1]).
                         set_CUR_DIMM_SPD_VALID_U8ARRAY_1_0(i_mss_eff_config_data->cur_dimm_spd_valid_u8array[1][0]).
@@ -472,6 +477,7 @@ extern "C"
         {
             FAPI_ASSERT(false,
                         fapi2::CEN_MSS_EFF_CONFIG_INCOMPATABLE_DRAM_GEN().
+                        set_TARGET_MBA(i_target_mba).
                         set_DRAM_DEVICE_TYPE_0_0( i_data->dram_device_type[0][0]).
                         set_DRAM_DEVICE_TYPE_0_1( i_data->dram_device_type[0][1]).
                         set_DRAM_DEVICE_TYPE_1_0( i_data->dram_device_type[1][0]).
@@ -500,6 +506,7 @@ extern "C"
         {
             FAPI_ASSERT(false,
                         fapi2::CEN_MSS_EFF_CONFIG_INCOMPATABLE_DIMM_TYPE().
+                        set_TARGET_MBA(i_target_mba).
                         set_MODULE_TYPE_0_0(i_data->module_type[0][0]).
                         set_MODULE_TYPE_0_1(i_data->module_type[0][1]).
                         set_MODULE_TYPE_1_0(i_data->module_type[1][0]).
@@ -527,6 +534,7 @@ extern "C"
         {
             FAPI_ASSERT(false,
                         fapi2::CEN_MSS_EFF_CONFIG_INCOMPATABLE_DIMM_RANKS().
+                        set_TARGET_MBA(i_target_mba).
                         set_NUM_RANKS_0_0(i_data->num_ranks[0][0]).
                         set_NUM_RANKS_0_1(i_data->num_ranks[0][1]).
                         set_NUM_RANKS_1_0(i_data->num_ranks[1][0]).
@@ -554,6 +562,7 @@ extern "C"
         {
             FAPI_ASSERT(false,
                         fapi2::CEN_MSS_EFF_CONFIG_INCOMPATABLE_DIMM_BANKS().
+                        set_TARGET_MBA(i_target_mba).
                         set_SDRAM_BANKS_0_0(i_data->sdram_banks[0][0]).
                         set_SDRAM_BANKS_0_1(i_data->sdram_banks[0][1]).
                         set_SDRAM_BANKS_1_0(i_data->sdram_banks[1][0]).
@@ -581,6 +590,7 @@ extern "C"
         {
             FAPI_ASSERT(false,
                         fapi2::CEN_MSS_EFF_CONFIG_INCOMPATABLE_DIMM_ROWS().
+                        set_TARGET_MBA(i_target_mba).
                         set_SDRAM_ROWS_0_0( i_data->sdram_rows[0][0]).
                         set_SDRAM_ROWS_0_1(i_data->sdram_rows[0][1]).
                         set_SDRAM_ROWS_1_0(i_data->sdram_rows[1][0]).
@@ -608,6 +618,7 @@ extern "C"
         {
             FAPI_ASSERT(false,
                         fapi2::CEN_MSS_EFF_CONFIG_INCOMPATABLE_DIMM_COLUMNS().
+                        set_TARGET_MBA(i_target_mba).
                         set_SDRAM_COLS_0_0(i_data->sdram_columns[0][0]).
                         set_SDRAM_COLS_0_1(i_data->sdram_columns[0][1]).
                         set_SDRAM_COLS_1_0(i_data->sdram_columns[1][0]).
@@ -635,6 +646,7 @@ extern "C"
         {
             FAPI_ASSERT(false,
                         fapi2::CEN_MSS_EFF_CONFIG_INCOMPATABLE_DRAM_BUS_WIDTH().
+                        set_TARGET_MBA(i_target_mba).
                         set_BUS_WIDTH_0_0( i_data->module_memory_bus_width[0][0]).
                         set_BUS_WIDTH_0_1( i_data->module_memory_bus_width[0][1]).
                         set_BUS_WIDTH_1_0( i_data->module_memory_bus_width[1][0]).
@@ -649,6 +661,7 @@ extern "C"
         {
             FAPI_ASSERT(false,
                         fapi2::CEN_MSS_EFF_CONFIG_UNSUPPORTED_MODULE_MEMORY_BUS_WIDTH().
+                        set_TARGET_MBA(i_target_mba).
                         set_MODULE_MEMORY_BUS_WIDTH( i_data->module_memory_bus_width[0][0]),
                         "Unsupported DRAM bus width on %s!",
                         mss::c_str(i_target_mba));
@@ -674,6 +687,7 @@ extern "C"
         {
             FAPI_ASSERT(false,
                         fapi2::CEN_MSS_EFF_CONFIG_INCOMPATABLE_DRAM_WIDTH().
+                        set_TARGET_MBA(i_target_mba).
                         set_DRAM_WIDTH_0_0(i_data->dram_width[0][0]).
                         set_DRAM_WIDTH_0_1(i_data->dram_width[0][1]).
                         set_DRAM_WIDTH_1_0(i_data->dram_width[1][0]).
@@ -772,6 +786,7 @@ extern "C"
             default:
                 FAPI_ASSERT(false,
                             fapi2::CEN_MSS_EFF_CONFIG_DRAM_DEVICE_ERROR().
+                            set_TARGET_MBA(i_target_mba).
                             set_DRAM_DEVICE_TYPE(i_data->dram_device_type[0][0]),
                             "Unknown DRAM type on %s!", mss::c_str(i_target_mba));
         }
@@ -799,6 +814,7 @@ extern "C"
             default:
                 FAPI_ASSERT(false,
                             fapi2::CEN_MSS_EFF_CONFIG_MOD_TYPE_ERROR().
+                            set_TARGET_MBA(i_target_mba).
                             set_MOD_TYPE(i_data->module_type[0][0]),
                             "Unknown DIMM type on %s!", mss::c_str(i_target_mba));
         }
@@ -848,6 +864,7 @@ extern "C"
             default:
                 FAPI_ASSERT(false,
                             fapi2::CEN_MSS_EFF_CONFIG_SDRAM_BANK_ERROR().
+                            set_TARGET_MBA(i_target_mba).
                             set_SDRAM_BANKS(i_data->sdram_banks[0][0]),
                             "Unknown DRAM banks on %s!", mss::c_str(i_target_mba));
         }
@@ -886,6 +903,7 @@ extern "C"
             default:
                 FAPI_ASSERT(false,
                             fapi2::CEN_MSS_EFF_CONFIG_SDRAM_ROWS_ERROR().
+                            set_TARGET_MBA(i_target_mba).
                             set_SDRAM_ROWS(i_data->sdram_rows[0][0]),
                             "Unknown DRAM rows on %s!", mss::c_str(i_target_mba));
         }
@@ -912,6 +930,7 @@ extern "C"
             default:
                 FAPI_ASSERT(false,
                             fapi2::CEN_MSS_EFF_CONFIG_SDRAM_COLS_ERROR().
+                            set_TARGET_MBA(i_target_mba).
                             set_SDRAM_COLS(i_data->sdram_columns[0][0]),
                             "Unknown DRAM cols on %s!", mss::c_str(i_target_mba));
         }
@@ -944,7 +963,9 @@ extern "C"
         {
             o_atts->eff_dram_width = fapi2::ENUM_ATTR_CEN_EFF_DRAM_WIDTH_X16;
             FAPI_ASSERT(false,
-                        fapi2::CEN_MSS_EFF_CONFIG_DRAM_WIDTH_16_ERROR(),
+                        fapi2::CEN_MSS_EFF_CONFIG_DRAM_WIDTH_16_ERROR().
+                        set_DRAM_WIDTH(i_data->dram_width[0][0]).
+                        set_TARGET_MBA(i_target_mba),
                         "Unsupported DRAM width x16 on %s!",
                         mss::c_str(i_target_mba));
         }
@@ -953,14 +974,18 @@ extern "C"
         {
             o_atts->eff_dram_width = fapi2::ENUM_ATTR_CEN_EFF_DRAM_WIDTH_X32;
             FAPI_ASSERT(false,
-                        fapi2::CEN_MSS_EFF_CONFIG_DRAM_WIDTH_32_ERROR(),
+                        fapi2::CEN_MSS_EFF_CONFIG_DRAM_WIDTH_32_ERROR().
+                        set_DRAM_WIDTH(i_data->dram_width[0][0]).
+                        set_TARGET_MBA(i_target_mba),
                         "Unsupported DRAM width x32 on %s!",
                         mss::c_str(i_target_mba));
         }
         else
         {
             FAPI_ASSERT(false,
-                        fapi2::CEN_MSS_EFF_CONFIG_DRAM_WIDTH_ERROR(),
+                        fapi2::CEN_MSS_EFF_CONFIG_DRAM_WIDTH_ERROR().
+                        set_DRAM_WIDTH(i_data->dram_width[0][0]).
+                        set_TARGET_MBA(i_target_mba),
                         "Unknown DRAM width on %s!", mss::c_str(i_target_mba));
         }
 
@@ -1007,6 +1032,7 @@ extern "C"
                     i_mss_eff_config_data->cur_dram_density = 1;
                     FAPI_ASSERT(i_mss_eff_config_data->allow_single_port != fapi2::ENUM_ATTR_CEN_MSS_ALLOW_SINGLE_PORT_FALSE,
                                 fapi2::CEN_MSS_EFF_CONFIG_DRAM_DENSITY_ERR().
+                                set_TARGET_MBA(i_target_mba).
                                 set_SDRAM_DENSITY(i_data->sdram_density[l_cur_mba_port][l_cur_mba_dimm]),
                                 "Unsupported DRAM density on %s!",
                                 mss::c_str(i_target_mba));
@@ -1293,6 +1319,7 @@ extern "C"
                 {
                     FAPI_ASSERT(false,
                                 fapi2::CEN_MSS_EFF_CONFIG_INCOMPATABLE_DRAM_GEN().
+                                set_TARGET_MBA(i_target_mba).
                                 set_DRAM_DEVICE_TYPE_0_0(i_data->dram_device_type[0][0]).
                                 set_DRAM_DEVICE_TYPE_0_1(i_data->dram_device_type[0][1]).
                                 set_DRAM_DEVICE_TYPE_1_0(i_data->dram_device_type[1][0]).
@@ -1319,6 +1346,7 @@ extern "C"
                     {
                         FAPI_ASSERT(false,
                                     fapi2::CEN_MSS_EFF_CONFIG_MSS_FREQ().
+                                    set_TARGET_MBA(i_target_mba).
                                     set_FREQ_VAL(i_mss_eff_config_data->mss_freq),
                                     "Invalid ATTR_MSS_FREQ = %d on %s!", i_mss_eff_config_data->mss_freq, mss::c_str(i_target_mba));
                     }
@@ -1404,6 +1432,7 @@ extern "C"
                 {
                     FAPI_ASSERT(false,
                                 fapi2::CEN_MSS_EFF_CONFIG_INCOMPATABLE_DRAM_GEN().
+                                set_TARGET_MBA(i_target_mba).
                                 set_DRAM_DEVICE_TYPE_0_0(i_data->dram_device_type[0][0]).
                                 set_DRAM_DEVICE_TYPE_0_1(i_data->dram_device_type[0][1]).
                                 set_DRAM_DEVICE_TYPE_1_0(i_data->dram_device_type[1][0]).
@@ -1445,6 +1474,7 @@ extern "C"
                 {
                     FAPI_ASSERT(false,
                                 fapi2::CEN_MSS_EFF_CONFIG_INCOMPATABLE_DRAM_GEN().
+                                set_TARGET_MBA(i_target_mba).
                                 set_DRAM_DEVICE_TYPE_0_0(i_data->dram_device_type[0][0]).
                                 set_DRAM_DEVICE_TYPE_0_1(i_data->dram_device_type[0][1]).
                                 set_DRAM_DEVICE_TYPE_1_0(i_data->dram_device_type[1][0]).
@@ -1544,6 +1574,7 @@ extern "C"
                 {
                     FAPI_ASSERT(false,
                                 fapi2::CEN_MSS_EFF_CONFIG_INCOMPATABLE_DRAM_GEN().
+                                set_TARGET_MBA(i_target_mba).
                                 set_DRAM_DEVICE_TYPE_0_0(i_data->dram_device_type[0][0]).
                                 set_DRAM_DEVICE_TYPE_0_1(i_data->dram_device_type[0][1]).
                                 set_DRAM_DEVICE_TYPE_1_0(i_data->dram_device_type[1][0]).
@@ -1642,6 +1673,7 @@ extern "C"
                 {
                     FAPI_ASSERT(false,
                                 fapi2::CEN_MSS_EFF_CONFIG_INCOMPATABLE_DRAM_GEN().
+                                set_TARGET_MBA(i_target_mba).
                                 set_DRAM_DEVICE_TYPE_0_0(i_data->dram_device_type[0][0]).
                                 set_DRAM_DEVICE_TYPE_0_1(i_data->dram_device_type[0][1]).
                                 set_DRAM_DEVICE_TYPE_1_0(i_data->dram_device_type[1][0]).
@@ -1690,6 +1722,7 @@ extern "C"
             {
                 FAPI_ASSERT(false,
                             fapi2::CEN_MSS_EFF_CONFIG_CWL_CALC_ERR().
+                            set_TARGET_MBA(i_target_mba).
                             set_CWL_VAL((TWO_MHZ / i_mss_eff_config_data->mss_freq)),
                             "Error calculating CWL");
             }
@@ -1726,6 +1759,7 @@ extern "C"
             {
                 FAPI_ASSERT(false,
                             fapi2::CEN_MSS_EFF_CONFIG_CWL_CALC_ERR().
+                            set_TARGET_MBA(i_target_mba).
                             set_CWL_VAL(TWO_MHZ / i_mss_eff_config_data->mss_freq),
                             "Error calculating CWL");
             }
@@ -1734,6 +1768,7 @@ extern "C"
         {
             FAPI_ASSERT(false,
                         fapi2::CEN_MSS_EFF_CONFIG_INCOMPATABLE_DRAM_GEN().
+                        set_TARGET_MBA(i_target_mba).
                         set_DRAM_DEVICE_TYPE_0_0(i_data->dram_device_type[0][0]).
                         set_DRAM_DEVICE_TYPE_0_1(i_data->dram_device_type[0][1]).
                         set_DRAM_DEVICE_TYPE_1_0(i_data->dram_device_type[1][0]).
@@ -1904,6 +1939,7 @@ extern "C"
                             o_atts->eff_ibm_type[l_cur_mba_port][l_cur_mba_dimm] = fapi2::ENUM_ATTR_CEN_EFF_IBM_TYPE_UNDEFINED;
                             FAPI_ASSERT(false,
                                         fapi2::CEN_MSS_EFF_CONFIG_RDIMM_UNSUPPORTED_TYPE().
+                                        set_TARGET_MBA(i_target_mba).
                                         set_UNSUPPORTED_VAL(o_atts->eff_ibm_type[l_cur_mba_port][l_cur_mba_dimm]),
                                         "Currently unsupported IBM_TYPE on %s!", mss::c_str(i_target_mba));
                         }
@@ -1926,6 +1962,7 @@ extern "C"
                                 o_atts->eff_ibm_type[l_cur_mba_port][l_cur_mba_dimm] = fapi2::ENUM_ATTR_CEN_EFF_IBM_TYPE_UNDEFINED;
                                 FAPI_ASSERT(false,
                                             fapi2::CEN_MSS_EFF_CONFIG_UDIMM_UNSUPPORTED_TYPE().
+                                            set_TARGET_MBA(i_target_mba).
                                             set_UNSUPPORTED_VAL(o_atts->eff_ibm_type[l_cur_mba_port][l_cur_mba_dimm]),
                                             "Currently unsupported IBM_TYPE on %s!", mss::c_str(i_target_mba));
                             }
@@ -1949,6 +1986,7 @@ extern "C"
                                 o_atts->eff_ibm_type[l_cur_mba_port][l_cur_mba_dimm] = fapi2::ENUM_ATTR_CEN_EFF_IBM_TYPE_UNDEFINED;
                                 FAPI_ASSERT(false,
                                             fapi2::CEN_MSS_EFF_CONFIG_UDIMM_UNSUPPORTED_TYPE().
+                                            set_TARGET_MBA(i_target_mba).
                                             set_UNSUPPORTED_VAL(o_atts->eff_ibm_type[l_cur_mba_port][l_cur_mba_dimm]),
                                             "Currently unsupported IBM_TYPE on %s!", mss::c_str(i_target_mba));
                             }
@@ -1975,6 +2013,7 @@ extern "C"
                         {
                             FAPI_ASSERT(false,
                                         fapi2::CEN_MSS_EFF_CONFIG_INCOMPATABLE_DRAM_GEN().
+                                        set_TARGET_MBA(i_target_mba).
                                         set_DRAM_DEVICE_TYPE_0_0(i_data->dram_device_type[0][0]).
                                         set_DRAM_DEVICE_TYPE_0_1(i_data->dram_device_type[0][1]).
                                         set_DRAM_DEVICE_TYPE_1_0(i_data->dram_device_type[1][0]).
@@ -1987,6 +2026,7 @@ extern "C"
                         o_atts->eff_ibm_type[l_cur_mba_port][l_cur_mba_dimm] = fapi2::ENUM_ATTR_CEN_EFF_IBM_TYPE_UNDEFINED;
                         FAPI_ASSERT(false,
                                     fapi2::CEN_MSS_EFF_CONFIG_DIMM_UNSUPPORTED_TYPE().
+                                    set_TARGET_MBA(i_target_mba).
                                     set_UNSUPPORTED_VAL(o_atts->eff_ibm_type[l_cur_mba_port][l_cur_mba_dimm]),
                                     "Currently unsupported DIMM_TYPE on %s!", mss::c_str(i_target_mba));
                     }
@@ -2065,7 +2105,8 @@ extern "C"
                     {
                         o_atts->eff_dram_address_mirroring[l_cur_mba_port][l_cur_mba_dimm] = 0x00;
                         FAPI_ASSERT(false,
-                                    fapi2::CEN_MSS_EFF_CONFIG_DIMM_UNSUPPORTED_TYPE(),
+                                    fapi2::CEN_MSS_EFF_CONFIG_DIMM_UNSUPPORTED_TYPE().
+                                    set_TARGET_MBA(i_target_mba),
                                     "Currently unsupported DIMM_TYPE on %s!", mss::c_str(i_target_mba));
                     }
                 }
@@ -2183,6 +2224,7 @@ extern "C"
                     {
                         FAPI_ASSERT(false,
                                     fapi2::CEN_MSS_EFF_CONFIG_INVALID_RDIMM_FREQ().
+                                    set_TARGET_MBA(i_target_mba).
                                     set_INVALID_RDIMM_FREQ(i_mss_eff_config_data->mss_freq),
                                     "Invalid RDIMM ATTR_MSS_FREQ = %d on %s!", i_mss_eff_config_data->mss_freq, mss::c_str(i_target_mba));
                     }
@@ -2202,6 +2244,7 @@ extern "C"
                     {
                         FAPI_ASSERT(false,
                                     fapi2::CEN_MSS_EFF_CONFIG_INVALID_RDIMM_VOLT().
+                                    set_TARGET_MBA(i_target_mba).
                                     set_INVALID_RDIMM_VOLT( i_mss_eff_config_data->mss_volt),
                                     "Invalid RDIMM ATTR_MSS_VOLT = %d on %s!", i_mss_eff_config_data->mss_volt, mss::c_str(i_target_mba));
                     }
@@ -2230,6 +2273,7 @@ extern "C"
                     {
                         FAPI_ASSERT(false,
                                     fapi2::CEN_MSS_EFF_CONFIG_INVALID_RDIMM_RCD_IBT().
+                                    set_TARGET_MBA(i_target_mba).
                                     set_INVALID_RDIMM_RCD_IBT_U32ARRAY_0_0(l_rdimm_rcd_ibt[0][0]).
                                     set_INVALID_RDIMM_RCD_IBT_U32ARRAY_0_1(l_rdimm_rcd_ibt[0][1]).
                                     set_INVALID_RDIMM_RCD_IBT_U32ARRAY_1_0(l_rdimm_rcd_ibt[1][0]).
@@ -2251,6 +2295,7 @@ extern "C"
                     {
                         FAPI_ASSERT(false,
                                     fapi2::CEN_MSS_EFF_CONFIG_INVALID_RDIMM_RCD_OUTPUT_TIMING().
+                                    set_TARGET_MBA(i_target_mba).
                                     set_INVALID_RDIMM_RCD_OUTPUT_TIMING_U8ARRAY_0_0(l_rdimm_rcd_output_timing[0][0]).
                                     set_INVALID_RDIMM_RCD_OUTPUT_TIMING_U8ARRAY_0_0(l_rdimm_rcd_output_timing[0][1]).
                                     set_INVALID_RDIMM_RCD_OUTPUT_TIMING_U8ARRAY_0_0(l_rdimm_rcd_output_timing[1][0]).
@@ -2330,6 +2375,7 @@ extern "C"
         {
             FAPI_ASSERT(false,
                         fapi2::CEN_MSS_EFF_CONFIG_INCOMPATABLE_DRAM_GEN().
+                        set_TARGET_MBA(i_target_mba).
                         set_DRAM_DEVICE_TYPE_0_0(i_data->dram_device_type[0][0]).
                         set_DRAM_DEVICE_TYPE_0_1(i_data->dram_device_type[0][1]).
                         set_DRAM_DEVICE_TYPE_1_0(i_data->dram_device_type[1][0]).
@@ -2632,6 +2678,7 @@ extern "C"
 
         FAPI_ASSERT(l_mss_eff_config_data->mss_freq != 0,
                     fapi2::CEN_MSS_EFF_CONFIG_MSS_FREQ().
+                    set_TARGET_MBA(i_target_mba).
                     set_FREQ_VAL(l_mss_eff_config_data->mss_freq),
                     "Invalid ATTR_MSS_FREQ = %d on %s!",
                     l_mss_eff_config_data->mss_freq,
diff --git a/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_eff_config_rank_group.C b/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_eff_config_rank_group.C
index a36af727b..dfdd41e89 100644
--- a/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_eff_config_rank_group.C
+++ b/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_eff_config_rank_group.C
@@ -161,7 +161,8 @@ extern "C" {
                 if (num_ranks_per_dimm_u8array[cur_port][0] != num_ranks_per_dimm_u8array[cur_port][1])
                 {
                     FAPI_ASSERT(false,
-                                fapi2::CEN_MSS_EFF_CONFIG_RANK_GROUP_NON_MATCH_RANKS(),
+                                fapi2::CEN_MSS_EFF_CONFIG_RANK_GROUP_NON_MATCH_RANKS().
+                                set_TARGET_MBA(i_target_mba),
                                 "Plug rule violation, num_ranks_per_dimm=%d[0],%d[1] on %s PORT%d!", num_ranks_per_dimm_u8array[cur_port][0],
                                 num_ranks_per_dimm_u8array[cur_port][1], mss::c_str(i_target_mba), cur_port);
                 }
@@ -192,7 +193,8 @@ extern "C" {
                 else if (num_ranks_per_dimm_u8array[cur_port][0] != 1)
                 {
                     FAPI_ASSERT(false,
-                                fapi2::CEN_MSS_EFF_CONFIG_RANK_GROUP_NUM_RANKS_NEQ1(),
+                                fapi2::CEN_MSS_EFF_CONFIG_RANK_GROUP_NUM_RANKS_NEQ1().
+                                set_TARGET_MBA(i_target_mba),
                                 "Plug rule violation, num_ranks_per_dimm=%d[0],%d[1] on %s PORT%d!", num_ranks_per_dimm_u8array[cur_port][0],
                                 num_ranks_per_dimm_u8array[cur_port][1], mss::c_str(i_target_mba), cur_port);
 
@@ -251,7 +253,8 @@ extern "C" {
             else
             {
                 FAPI_ASSERT(false,
-                            fapi2::CEN_MSS_EFF_CONFIG_RANK_GROUP_NO_MATCH(),
+                            fapi2::CEN_MSS_EFF_CONFIG_RANK_GROUP_NO_MATCH().
+                            set_TARGET_MBA(i_target_mba),
                             "Plug rule violation, num_ranks_per_dimm=%d[0],%d[1] on %s PORT%d!", num_ranks_per_dimm_u8array[cur_port][0],
                             num_ranks_per_dimm_u8array[cur_port][1], mss::c_str(i_target_mba), cur_port);
 
diff --git a/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_funcs.C b/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_funcs.C
index e3e8f35e2..7b460f3c1 100755
--- a/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_funcs.C
+++ b/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_funcs.C
@@ -251,8 +251,8 @@ fapi2::ReturnCode mss_ccs_inst_arry_0(
 
     if ((io_instruction_number >= 30) && (i_port != 0xFFFFFFFF))
     {
-        l_num_retry = 10;
-        l_timer = 10;
+        l_num_retry = 20;
+        l_timer = DELAY_100US;
         FAPI_DBG("CCS: Set end bit.\n");
         FAPI_TRY(mss_ccs_set_end_bit( i_target, 29));
         FAPI_TRY(mss_execute_ccs_inst_array( i_target, l_num_retry, l_timer));
@@ -409,8 +409,8 @@ fapi2::ReturnCode mss_ccs_inst_arry_1(
 
     if ((io_instruction_number >= 30) && (i_ccs_end.isBitClear(0)))
     {
-        l_num_retry = 10;
-        l_timer = 10;
+        l_num_retry = 20;
+        l_timer = DELAY_100US;
         FAPI_TRY(mss_ccs_set_end_bit( i_target, 29));
         FAPI_TRY(mss_execute_ccs_inst_array( i_target, l_num_retry, l_timer));
         io_instruction_number = 0;
@@ -650,24 +650,24 @@ fapi2::ReturnCode mss_ccs_fail_type(
     fapi2::buffer<uint64_t> l_data_buffer;
     FAPI_TRY(fapi2::getScom(i_target, CEN_MBA_CCS_STATQ, l_data_buffer));
 
-    if (l_data_buffer.getBit<3>())
-    {
-        //DECONFIG and FFDC INFO
-        FAPI_ASSERT(false, fapi2::CEN_MSS_CCS_READ_MISCOMPARE().set_TARGET_MBA_ERROR(i_target).set_REG_CONTENTS(l_data_buffer),
-                    "CCS returned a FAIL condtion of \"Read Miscompare\" ");
-    }
-    else if (l_data_buffer.getBit<4>())
-    {
-        //DECONFIG and FFDC INFO
-        FAPI_ASSERT(false, fapi2::CEN_MSS_CCS_UE_SUE().set_TARGET_MBA_ERROR(i_target).set_REG_CONTENTS(l_data_buffer),
-                    "CCS returned a FAIL condition of \"UE or SUE Error\" ");
-    }
-    else if (l_data_buffer.getBit<5>())
-    {
-        //DECONFIG and FFDC INFO
-        FAPI_ASSERT(false, fapi2::CEN_MSS_CCS_CAL_TIMEOUT().set_TARGET_MBA_ERROR(i_target).set_REG_CONTENTS(l_data_buffer),
-                    "CCS returned a FAIL condition of \"Calibration Operation Time Out\" ");
-    }
+    //DECONFIG and FFDC INFO
+    FAPI_ASSERT(!l_data_buffer.getBit<3>(),
+                fapi2::CEN_MSS_CCS_READ_MISCOMPARE().
+                set_TARGET_MBA_ERROR(i_target).
+                set_REG_CONTENTS(l_data_buffer),
+                "CCS returned a FAIL condtion of \"Read Miscompare\" ");
+    //DECONFIG and FFDC INFO
+    FAPI_ASSERT(!l_data_buffer.getBit<4>(),
+                fapi2::CEN_MSS_CCS_UE_SUE().
+                set_TARGET_MBA_ERROR(i_target).
+                set_REG_CONTENTS(l_data_buffer),
+                "CCS returned a FAIL condition of \"UE or SUE Error\" ");
+    //DECONFIG and FFDC INFO
+    FAPI_ASSERT(!l_data_buffer.getBit<5>(),
+                fapi2::CEN_MSS_CCS_CAL_TIMEOUT().
+                set_TARGET_MBA_ERROR(i_target).
+                set_REG_CONTENTS(l_data_buffer),
+                "CCS returned a FAIL condition of \"Calibration Operation Time Out\" ");
 
 fapi_try_exit:
     return fapi2::FAPI2_RC_SUCCESS;
@@ -712,7 +712,10 @@ fapi2::ReturnCode mss_execute_ccs_inst_array(
         FAPI_ERR("CCS Operation Hung");
         FAPI_ERR("CCS has returned a IN_PROGRESS status and considered Hung.");
         FAPI_TRY(mss_ccs_fail_type(i_target));
-        FAPI_ASSERT(false, fapi2::CEN_MSS_CCS_HUNG().set_TARGET_MBA_ERROR(i_target), "Returning a CCS HUNG RC Value.");
+        FAPI_ASSERT(false,
+                    fapi2::CEN_MSS_CCS_HUNG().
+                    set_TARGET_MBA_ERROR(i_target),
+                    "Returning a CCS HUNG RC Value.");
     }
     else if (l_status == MSS_STAT_QUERY_PASS)
     {
diff --git a/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_scominit.C b/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_scominit.C
index 9e037bc05..fe8100c1b 100644
--- a/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_scominit.C
+++ b/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_scominit.C
@@ -59,12 +59,12 @@ extern "C" {
         const auto l_mba_targets = i_target.getChildren<fapi2::TARGET_TYPE_MBA>();
         const auto l_l4_targets = i_target.getChildren<fapi2::TARGET_TYPE_L4>(fapi2::TARGET_STATE_PRESENT);
 
-        FAPI_ASSERT(l_mba_targets.size() == MAX_MBA_PER_CEN,
-                    fapi2::CEN_MSS_SCOMINIT_NUM_MBA_ERROR().
-                    set_MEMBUF(i_target).
-                    set_NUM_MBAS(l_mba_targets.size()),
-                    "getChildren returned %d functional MBAs, expected 2.  Mulkey to review plug rule.",
-                    l_mba_targets.size());
+        FAPI_ASSERT_NOEXIT(l_mba_targets.size() == MAX_MBA_PER_CEN,
+                           fapi2::CEN_MSS_SCOMINIT_NUM_MBA_ERROR().
+                           set_MEMBUF(i_target).
+                           set_NUM_MBAS(l_mba_targets.size()),
+                           "getChildren returned %d functional MBAs, expected 2.",
+                           l_mba_targets.size());
 
         FAPI_ASSERT(l_l4_targets.size() > 0,
                     fapi2::CEN_MSS_SCOMINIT_NUM_L4_ERROR().
@@ -95,17 +95,20 @@ extern "C" {
         }
 
         //################ MBS ######################
-        FAPI_DBG("Running MBS scom initfile\n");
-        FAPI_EXEC_HWP(l_rc, centaur_mbs_scom, i_target, l_mba_targets[0], l_mba_targets[1], l_l4_targets[0], FAPI_SYSTEM);
-
-        if (l_rc)
-        {
-            FAPI_ERR("  !!!  Error running MBS scom initfile on %s\n", mss::c_str(i_target));
-            return (l_rc);
-        }
-        else
+        for (const auto& mba : l_mba_targets)
         {
-            FAPI_DBG("MBS scom initfile passed on %s\n", mss::c_str(i_target));
+            FAPI_DBG("Running MBS scom initfile\n");
+            FAPI_EXEC_HWP(l_rc, centaur_mbs_scom, i_target, mba, l_l4_targets[0], FAPI_SYSTEM);
+
+            if (l_rc)
+            {
+                FAPI_ERR("  !!!  Error running MBS scom initfile on %s\n", mss::c_str(i_target));
+                return (l_rc);
+            }
+            else
+            {
+                FAPI_DBG("MBS scom initfile passed on %s\n", mss::c_str(i_target));
+            }
         }
 
         //################ MBA ######################
diff --git a/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_volt.C b/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_volt.C
index 92683204a..ccde4f816 100644
--- a/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_volt.C
+++ b/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_volt.C
@@ -228,7 +228,7 @@ fapi2::ReturnCode p9c_mss_volt(const std::vector<fapi2::Target<fapi2::TARGET_TYP
         else
         {
             FAPI_ASSERT(false,
-                        fapi2::CEN_MSS_VOLT_OVERIDE_UKNOWN().
+                        fapi2::CEN_MSS_VOLT_OVERRIDE_UNKNOWN().
                         set_OVERRIDE_TYPE(l_volt_override),
                         "Unknown volt override request.  Override Request: 0x%x", l_volt_override);
         }