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| author | Greg Still <stillgs@us.ibm.com> | 2017-11-10 09:56:02 -0600 |
|---|---|---|
| committer | Christian R. Geddes <crgeddes@us.ibm.com> | 2017-11-21 16:59:19 -0500 |
| commit | dc276ea88de6962710917267975cc3d71e8076ea (patch) | |
| tree | b6c7fc57b29f1bb3bb7db3fab6baea4076e69d55 /src | |
| parent | 04846f139458c34b6b35824f2a63876fe75daf06 (diff) | |
| download | talos-hostboot-dc276ea88de6962710917267975cc3d71e8076ea.tar.gz talos-hostboot-dc276ea88de6962710917267975cc3d71e8076ea.zip | |
PM: Fix p9_setup_evid for manual voltage overrides
- remove check for safe frequency if all boot voltage have been overridden
Key_Cronus_Test=PM_REGRESS
Change-Id: Ia33ccb0fe33e457af9d6c113c9f0ce05bc0e13be
CQ: SW407814
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49541
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com>
Reviewed-by: Brian T. Vanderpool <vanderp@us.ibm.com>
Dev-Ready: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49554
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/pm/p9_setup_evid.C | 16 |
1 files changed, 0 insertions, 16 deletions
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_setup_evid.C b/src/import/chips/p9/procedures/hwp/pm/p9_setup_evid.C index b3c731fb0..829c19dc2 100644 --- a/src/import/chips/p9/procedures/hwp/pm/p9_setup_evid.C +++ b/src/import/chips/p9/procedures/hwp/pm/p9_setup_evid.C @@ -322,22 +322,6 @@ compute_boot_safe(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target, attrs->proc_dpll_divider ) / 1000; - uint32_t l_reference_freq_khz = revle32(l_globalppb->frequency_step_khz); - - // The Boot frequency must be less than ultra turbo frequency - // if not log an error - if ((l_boot_freq_mhz * 1000) > l_reference_freq_khz) - { - FAPI_ERR("Boot frequency %d kHz is greater than UltraTurbo frequency %d kHz", - (l_boot_freq_mhz * 1000), l_reference_freq_khz); - FAPI_ASSERT(false, - fapi2::PM_EVID_BOOT_FREQ_GT_UT() - .set_CHIP_TARGET(i_target) - .set_BOOT_FREQ(l_boot_freq_mhz * 1000) - .set_UT_FREQ(l_reference_freq_khz), - "Safe mode freqency is greater than UltraTurbo frequency"); - } - FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_SAFE_MODE_FREQUENCY_MHZ, i_target, l_boot_freq_mhz)); |
