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author | Mark Pizzutillo <Mark.Pizzutillo@ibm.com> | 2019-06-03 09:07:50 -0500 |
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committer | Christian R. Geddes <crgeddes@us.ibm.com> | 2019-06-19 09:17:50 -0500 |
commit | d9a2585c80fe37489ea10067bddab5c19c05c234 (patch) | |
tree | 2ef951b2461dbd696fa32754ec02dfc9cff0c19c /src | |
parent | dcf8b4ea580d03d76f5ad7fae9eb55d83b282959 (diff) | |
download | talos-hostboot-d9a2585c80fe37489ea10067bddab5c19c05c234.tar.gz talos-hostboot-d9a2585c80fe37489ea10067bddab5c19c05c234.zip |
Add pmic_update lab tool
Change-Id: Ie3f1770c9be4c5247a23bbb09468dd0d71ca4ed7
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/78931
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: Jennifer A Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/78940
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src')
3 files changed, 49 insertions, 11 deletions
diff --git a/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/utils/pmic_common_utils.H b/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/utils/pmic_common_utils.H index 6516140c7..1cc720992 100644 --- a/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/utils/pmic_common_utils.H +++ b/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/utils/pmic_common_utils.H @@ -42,6 +42,7 @@ #include <pmic_regs_fld.H> #include <lib/utils/pmic_consts.H> #include <mss_pmic_attribute_getters.H> +#include <generic/memory/lib/utils/find.H> namespace mss { @@ -71,12 +72,12 @@ static constexpr uint8_t const VOLT_SETTING_ACTIVE_REGS[] = REGS::R27_SWD_VOLTAGE_SETTING }; -static constexpr uint8_t const VOLT_SETTING_REGS[] = +static constexpr uint8_t const VOLT_SETTING_VENDOR_REGS[] = { - REGS::R21_SWA_VOLTAGE_SETTING, - REGS::R23_SWB_VOLTAGE_SETTING, - REGS::R25_SWC_VOLTAGE_SETTING, - REGS::R27_SWD_VOLTAGE_SETTING + REGS::R45_SWA_VOLTAGE_SETTING, + REGS::R47_SWB_VOLTAGE_SETTING, + REGS::R49_SWC_VOLTAGE_SETTING, + REGS::R4B_SWD_VOLTAGE_SETTING }; static constexpr uint8_t const VOLT_RANGE_FLDS[] = @@ -104,6 +105,34 @@ static constexpr uint32_t const VOLT_RANGE_MAXES[][CONSTS::NUM_RANGES] = }; /// +/// @brief Get the valid pmics for id object +/// +/// @param[in] i_pmic_target +/// @param[in] i_id +/// @param[out] o_pmics vector of PMICS matching +/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS iff success +/// +inline std::vector<fapi2::Target<fapi2::TARGET_TYPE_PMIC>> get_valid_pmics_for_id( + const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_ocmb_target, + const mss::pmic::id i_id) +{ + using CONSTS = mss::pmic::consts<mss::pmic::product::JEDEC_COMPLIANT>; + std::vector<fapi2::Target<fapi2::TARGET_TYPE_PMIC>> l_output_pmics; + + const auto l_pmics = mss::find_targets<fapi2::TARGET_TYPE_PMIC>(i_ocmb_target); + + for (const auto& l_pmic : l_pmics) + { + if (mss::index(l_pmic) % CONSTS::NUM_UNIQUE_PMICS == i_id) + { + l_output_pmics.push_back(l_pmic); + } + } + + return l_output_pmics; +} + +/// /// @brief polls PMIC for PBULK PWR_GOOD status /// /// @param[in] i_pmic_target PMIC target diff --git a/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/utils/pmic_consts.H b/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/utils/pmic_consts.H index e19dea87c..96d7e9932 100644 --- a/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/utils/pmic_consts.H +++ b/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/utils/pmic_consts.H @@ -82,6 +82,9 @@ enum vendor UNKNOWN_VENDOR, TI = 0x9780, IDT = 0xB380, + + TI_SHORT = 0x97, + IDT_SHORT = 0xB3, }; /// @@ -245,6 +248,10 @@ struct consts<mss::pmic::product::JEDEC_COMPLIANT> static constexpr uint8_t VENDOR_PASSWORD_HIGH = 0x94; static constexpr uint8_t UNLOCK_VENDOR_REGION = 0x40; static constexpr uint8_t LOCK_VENDOR_REGION = 0x00; + static constexpr uint8_t BURN_R40_TO_R4F = 0x81; + static constexpr uint8_t BURN_R50_TO_R5F = 0x82; + static constexpr uint8_t BURN_R60_TO_R6F = 0x85; // TI spec says 0x83, is that a deviation or a typo? + static constexpr uint8_t BURN_COMPLETE = 0x5A; static constexpr uint8_t PROGRAMMABLE_MODE = 0x01; static constexpr uint8_t SECURE_MODE = 0x00; diff --git a/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/utils/pmic_enable_utils.H b/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/utils/pmic_enable_utils.H index 835eb907c..0d6f5a692 100644 --- a/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/utils/pmic_enable_utils.H +++ b/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/utils/pmic_enable_utils.H @@ -539,13 +539,14 @@ inline fapi2::ReturnCode bias_with_spd_voltages<mss::pmic::vendor::IDT>( fapi2::PMIC_VOLTAGE_OUT_OF_RANGE() .set_TARGET(i_pmic_target) .set_VOLTAGE_BITMAP(l_volt_buffer) - .set_RAIL(mss::pmic::VOLT_SETTING_REGS[l_rail_index]), + .set_RAIL(mss::pmic::VOLT_SETTING_ACTIVE_REGS[l_rail_index]), "Voltage out of range as determined by SPD voltage +/- offset for %s of %s", PMIC_RAIL_NAMES[l_rail_index], mss::c_str(i_pmic_target) ); l_volt_buffer = l_volt_buffer << CONSTS::SHIFT_VOLTAGE_FOR_REG; - FAPI_TRY(mss::pmic::i2c::reg_write(i_pmic_target, mss::pmic::VOLT_SETTING_REGS[l_rail_index], l_volt_buffer), - "Error writing address 0x%02hhX of PMIC %s", mss::pmic::VOLT_SETTING_REGS[l_rail_index], mss::c_str(i_pmic_target)); + FAPI_TRY(mss::pmic::i2c::reg_write(i_pmic_target, mss::pmic::VOLT_SETTING_ACTIVE_REGS[l_rail_index], l_volt_buffer), + "Error writing address 0x%02hhX of PMIC %s", mss::pmic::VOLT_SETTING_ACTIVE_REGS[l_rail_index], + mss::c_str(i_pmic_target)); } @@ -625,13 +626,14 @@ inline fapi2::ReturnCode bias_with_spd_voltages<mss::pmic::vendor::TI>( fapi2::PMIC_VOLTAGE_OUT_OF_RANGE() .set_TARGET(i_pmic_target) .set_VOLTAGE_BITMAP(l_volt_buffer) - .set_RAIL(mss::pmic::VOLT_SETTING_REGS[l_rail_index]), + .set_RAIL(mss::pmic::VOLT_SETTING_ACTIVE_REGS[l_rail_index]), "Voltage out of range as determined by SPD voltage +/- offset for %s of %s", PMIC_RAIL_NAMES[l_rail_index], mss::c_str(i_pmic_target) ); l_volt_buffer = l_volt_buffer << CONSTS::SHIFT_VOLTAGE_FOR_REG; - FAPI_TRY(mss::pmic::i2c::reg_write(i_pmic_target, mss::pmic::VOLT_SETTING_REGS[l_rail_index], l_volt_buffer), - "Error writing address 0x%02hhX of PMIC %s", mss::pmic::VOLT_SETTING_REGS[l_rail_index], mss::c_str(i_pmic_target)); + FAPI_TRY(mss::pmic::i2c::reg_write(i_pmic_target, mss::pmic::VOLT_SETTING_ACTIVE_REGS[l_rail_index], l_volt_buffer), + "Error writing address 0x%02hhX of PMIC %s", mss::pmic::VOLT_SETTING_ACTIVE_REGS[l_rail_index], + mss::c_str(i_pmic_target)); } |