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authorChristian Geddes <crgeddes@us.ibm.com>2019-01-14 17:30:20 -0600
committerDaniel M. Crowell <dcrowell@us.ibm.com>2019-01-29 13:06:25 -0600
commitd5fe22ba3b370bb199d59d650b97b5484e7042ae (patch)
treeed44dd2b75c97c9eee438cc6d71f1a3b25e45de0 /src
parent573dc45421fe8631fec5f8e02d70c45bfd4f66fa (diff)
downloadtalos-hostboot-d5fe22ba3b370bb199d59d650b97b5484e7042ae.tar.gz
talos-hostboot-d5fe22ba3b370bb199d59d650b97b5484e7042ae.zip
Remove sha512 hash from EECACHE section & init section w/ correct info
When the axone pnor layout was first introduced it mistakenly added a sha-512 hash to the front of the EECACHE section. This will not work because the section gets written to so the hash would not be very helpful. Also because the section is ECC protected it cannot be defaulted to all F's because that break the ECC rules. Instead the pattern needs to be defaulted to have 8 bytes of 0xFF followed by the ECC byte of 0x00. This follows what we did for previous ECC protected sections. Change-Id: I4dac3c097f5a7d959811ea1c1796231adec37cee RTC: 196805 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70472 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src')
-rw-r--r--src/build/buildpnor/pnorLayoutAxone.xml10
-rwxr-xr-xsrc/build/mkrules/hbfw/img/makefile16
2 files changed, 21 insertions, 5 deletions
diff --git a/src/build/buildpnor/pnorLayoutAxone.xml b/src/build/buildpnor/pnorLayoutAxone.xml
index f34256482..22350dc2e 100644
--- a/src/build/buildpnor/pnorLayoutAxone.xml
+++ b/src/build/buildpnor/pnorLayoutAxone.xml
@@ -330,7 +330,15 @@ Layout Description
<physicalOffset>0x3E14000</physicalOffset>
<physicalRegionSize>0x80000</physicalRegionSize>
<side>sideless</side>
- <sha512Version/>
<ecc/>
</section>
+ <section>
+ <description>Ultravisor XSCOM White/Blacklist (64K)</description>
+ <eyeCatch>UVBWLIST</eyeCatch>
+ <physicalOffset>0x3E94000</physicalOffset>
+ <physicalRegionSize>0x10000</physicalRegionSize>
+ <side>sideless</side>
+ <sha512Version/>
+ <readOnly/>
+ </section>
</pnor>
diff --git a/src/build/mkrules/hbfw/img/makefile b/src/build/mkrules/hbfw/img/makefile
index f141efd86..fa063a850 100755
--- a/src/build/mkrules/hbfw/img/makefile
+++ b/src/build/mkrules/hbfw/img/makefile
@@ -119,12 +119,13 @@ SBKT_FINAL_IMG = SBKT.bin
FIRDATA_FINAL_IMG = FIRDATA.bin
MEMD_FINAL_IMG = MEMD.bin
UVBWLIST_FINAL_IMG = UVBWLIST.bin
+EECACHE_FINAL_IMG = EECACHE.bin
FINAL_OUTPUT_IMAGES = ${HBBL_FINAL_IMG} ${HBB_FINAL_IMG} ${HBI_FINAL_IMG} \
${HBRT_FINAL_IMG} ${TEST_FINAL_IMG} ${TESTRO_FINAL_IMG} \
${HBEL_FINAL_IMG} ${GUARD_FINAL_IMG} ${GLOBAL_FINAL_IMG} \
${DJVPD_FINAL_IMG} ${MVPD_FINAL_IMG} ${CVPD_FINAL_IMG} \
${PAYLOAD_FINAL_IMG} ${RINGOVD_FINAL_IMG} ${SBKT_FINAL_IMG} \
- ${FIRDATA_FINAL_IMG} ${MEMD_FINAL_IMG}
+ ${FIRDATA_FINAL_IMG} ${MEMD_FINAL_IMG} ${EECACHE_FINAL_IMG}
# Aggregate
ALL_DEFAULT_IMAGES = ${DEFAULT_INPUT_IMAGES} ${FINAL_OUTPUT_IMAGES}
@@ -209,6 +210,8 @@ BUILD_TYPE_PARAMS = --build-type fspbuild
# Parameters passed into GEN_PNOR_IMAGE_SCRIPT.
.if (${PNOR_LAYOUT_SELECTED} == 1)
GEN_DEFAULT_BIN_FILES = HBBL=${HBBL_IMG},HBB=${HBB_IMG},HBI=${HBI_IMG},HBRT=${HBRT_IMG},TEST=EMPTY,TESTRO=EMPTY,TESTLOAD=EMPTY,HBEL=EMPTY,GUARD=EMPTY,GLOBAL=EMPTY,PAYLOAD=EMPTY,CVPD=EMPTY,MVPD=EMPTY,DJVPD=EMPTY,RINGOVD=EMPTY,SBKT=EMPTY,FIRDATA=EMPTY,MEMD=${${ZZ_MEMD_IMG}:P},UVBWLIST=EMPTY
+ .elif(${PNOR_LAYOUT_SELECTED} == 2)
+ GEN_DEFAULT_BIN_FILES = HBBL=${HBBL_IMG},HBB=${HBB_IMG},HBI=${HBI_IMG},HBRT=${HBRT_IMG},HBEL=EMPTY,GUARD=EMPTY,GLOBAL=EMPTY,CVPD=EMPTY,MVPD=EMPTY,DJVPD=EMPTY,RINGOVD=EMPTY,SBKT=EMPTY,EECACHE=EMPTY,MEMD=${${ZZ_MEMD_IMG}:P},UVBWLIST=EMPTY
.else
GEN_DEFAULT_BIN_FILES = HBBL=${HBBL_IMG},HBB=${HBB_IMG},HBI=${HBI_IMG},HBRT=${HBRT_IMG},HBEL=EMPTY,GUARD=EMPTY,GLOBAL=EMPTY,CVPD=EMPTY,MVPD=EMPTY,DJVPD=EMPTY,RINGOVD=EMPTY,SBKT=EMPTY,MEMD=${${ZZ_MEMD_IMG}:P}
.endif
@@ -482,14 +485,19 @@ gen_system_specific_images: build_sbe_partitions .PMAKE
CUMULUS_SECT = HBD=${CUMULUS_HBD_FINAL_IMG},SBE=${CUMULUS_SBE_FINAL_IMG},HCODE=${CUMULUS_HCODE_FINAL_IMG},OCC=${CUMULUS_OCC_FINAL_IMG},WOFDATA=${ZEPPELIN_WOFDATA_FINAL_IMG},CENHWIMG=${CUMULUS_CENHWIMG_FINAL_IMG},MEMD=${ZEPPELIN_MEMD_FINAL_IMG}
CUMULUS_CDIMM_SECT = HBD=${CUMULUS_CDIMM_HBD_FINAL_IMG},SBE=${CUMULUS_SBE_FINAL_IMG},HCODE=${CUMULUS_HCODE_FINAL_IMG},OCC=${CUMULUS_OCC_FINAL_IMG},WOFDATA=${ZEPPELIN_WOFDATA_FINAL_IMG},CENHWIMG=${CUMULUS_CENHWIMG_FINAL_IMG},MEMD=${MEMD_FINAL_IMG}
# TODO RTC 197497 -- Use Axone MEMD image
- AXONE_SECT = HBD=${AXONE_HBD_FINAL_IMG},SBE=${AXONE_SBE_FINAL_IMG},HCODE=${AXONE_HCODE_FINAL_IMG},OCC=${AXONE_OCC_FINAL_IMG},WOFDATA=${ZZ_WOFDATA_FINAL_IMG},CENHWIMG=${AXONE_CENHWIMG_FINAL_IMG},MEMD=${ZZ_MEMD_FINAL_IMG}
+ AXONE_SECT = HBD=${AXONE_HBD_FINAL_IMG},SBE=${AXONE_SBE_FINAL_IMG},HCODE=${AXONE_HCODE_FINAL_IMG},OCC=${AXONE_OCC_FINAL_IMG},WOFDATA=${ZZ_WOFDATA_FINAL_IMG},CENHWIMG=${AXONE_CENHWIMG_FINAL_IMG},MEMD=${ZZ_MEMD_FINAL_IMG},EECACHE=${EECACHE_FINAL_IMG}
.endif
+
+.if (${PNOR_LAYOUT_SELECTED} == 2)
+PNOR_IMG_INFO = \
+ axone.pnor:${PNOR_LAYOUT}:${AXONE_SECT},${HOSTBOOT_DEFAULT_SECTIONS}
+.else
PNOR_IMG_INFO = \
nimbus.pnor:${PNOR_LAYOUT}:${NIMBUS_SECT},${HOSTBOOT_DEFAULT_SECTIONS} \
cumulus.pnor:${PNOR_LAYOUT}:${CUMULUS_SECT},${HOSTBOOT_DEFAULT_SECTIONS} \
- cumulus_cdimm.pnor:${PNOR_LAYOUT}:${CUMULUS_CDIMM_SECT},${HOSTBOOT_DEFAULT_SECTIONS} \
- axone.pnor:${PNOR_LAYOUT}:${AXONE_SECT},${HOSTBOOT_DEFAULT_SECTIONS} \
+ cumulus_cdimm.pnor:${PNOR_LAYOUT}:${CUMULUS_CDIMM_SECT},${HOSTBOOT_DEFAULT_SECTIONS}\
${FIPS_PNOR_INFO}
+.endif
# To build fake PNOR, set FAKEPNOR to filename of file to build,
# ie, 'export FAKEPNOR=fake8m.pnor'
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