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| author | Zane Shelley <zshelle@us.ibm.com> | 2018-01-04 16:46:17 -0600 |
|---|---|---|
| committer | Zane C. Shelley <zshelle@us.ibm.com> | 2018-01-17 11:16:03 -0500 |
| commit | d1c569251281f56eadd25f1c81d82da1b3c242d9 (patch) | |
| tree | 04c3c74855301d881842a7d7ac7f9ec4262f5b2e /src | |
| parent | df5241f06802858615a8809dbc17096228e36ba9 (diff) | |
| download | talos-hostboot-d1c569251281f56eadd25f1c81d82da1b3c242d9.tar.gz talos-hostboot-d1c569251281f56eadd25f1c81d82da1b3c242d9.zip | |
PRD: fixed no gard when PLL and CS at same time
Change-Id: If5f6f2e1d29e3223c26c525f5ee9b54904e65891
CQ: SW412820
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/51502
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Caleb N. Palmer <cnpalmer@us.ibm.com>
Reviewed-by: Brian J. Stegmiller <bjs@us.ibm.com>
Reviewed-by: Benjamin J. Weisenbeck <bweisenb@us.ibm.com>
Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/51861
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/usr/diag/prdf/common/plat/p9/prdfP9PllDomain.C | 22 |
1 files changed, 21 insertions, 1 deletions
diff --git a/src/usr/diag/prdf/common/plat/p9/prdfP9PllDomain.C b/src/usr/diag/prdf/common/plat/p9/prdfP9PllDomain.C index 2d0dd36f8..b99e77bc8 100644 --- a/src/usr/diag/prdf/common/plat/p9/prdfP9PllDomain.C +++ b/src/usr/diag/prdf/common/plat/p9/prdfP9PllDomain.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2016,2017 */ +/* Contributors Listed Below - COPYRIGHT 2016,2018 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -197,6 +197,26 @@ int32_t PllDomain::Analyze(STEP_CODE_DATA_STRUCT & serviceData, } } + // TODO: RTC 184513 - It is possible to have a PLL unlock, a UE RE, and an + // SUE CS. Isolation should be to the PLL error and then the + // additional FFDC should show there was an SUE CS were the root is + // the UE RE. However, PRD does not know how to handle three + // attentions at the same time. For now this will remain a limitation + // due to time contraits, but there is a proposal in RTC 184513 that + // will be solved later. In the meantime, there is a hole in our + // analysis that needs to be fixed. If the is a SUE CS and no UE RE, + // PRD assumes the UE RE was already predictively called out in a + // previous error log. Therefore, nothing will be garded in this error + // log. In the example stated above, the current PRD code will not see + // the UE RE because of the higher priority PLL unlock. So even though + // there is a UE RE present, nothing gets garded. To circumvent this, + // we will set the UERE flag here even though the PLL error is not the + // true SUE source. + if ( CHECK_STOP == serviceData.service_data->getPrimaryAttnType() ) + { + serviceData.service_data->SetUERE(); + } + // TODO: RTC 155673 - use attributes to callout active clock sources // For Nimbus sys ref and mf ref clock source is the same |
