Enable indirect scom tests

Change-Id: Ibcef25827ab061e4e2836e73569022e28cdb2593
CMVC-Prereq: 989074
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22398
Tested-by: Jenkins Server
Tested-by: FSP CI Jenkins
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

1 files changed, 170 insertions, 143 deletions

diff --git a/src/usr/scom/test/scomtest.H b/src/usr/scom/test/scomtest.H
index fce8c8ac2..80a0063b5 100644
--- a/src/usr/scom/test/scomtest.H
+++ b/src/usr/scom/test/scomtest.H
@@ -384,149 +384,176 @@ public:
    *
    */
 // @TODO RTC 142928 Enable Indirect Scoms in Simics
-//   void _test_IndirectScom(void)
-//   {
-//       TRACFCOMP( g_trac_scom, "ScomTest::test_IndirectScomReadWrite> Start" );
-//
-//       uint64_t fails = 0;
-//       uint64_t total = 0;
-//       errlHndl_t l_err = NULL;
-//
-//       //@VBU workaround - Disable Indirect SCOM test case o
-//       //Test case read/writes to valid addresses and is
-//       //potentially destructive on VBU
-//       if (TARGETING::is_vpo())
-//       {
-//            return;
-//       }
-//
-//       // Setup some targets to use
-//       enum {
-//           myPROC0,
-//           NUM_TARGETS
-//       };
-//       TARGETING::Target* scom_targets[NUM_TARGETS];
-//       for( uint64_t x = 0; x < NUM_TARGETS; x++ )
-//       {
-//           scom_targets[x] = NULL;
-//       }
-//
-//
-//       // Target Proc 9 - the FSI wrap-back connection in simics
-//       TARGETING::EntityPath epath(TARGETING::EntityPath::PATH_PHYSICAL);
-//       epath.addLast(TARGETING::TYPE_SYS,0);
-//       epath.addLast(TARGETING::TYPE_NODE,0);
-//       epath.addLast(TARGETING::TYPE_PROC,0);
-//
-//       scom_targets[myPROC0] = TARGETING::targetService().toTarget(epath);
-//
-//       for( uint64_t x = 0; x < NUM_TARGETS; x++ )
-//       {
-//           //only run if the target exists
-//           if(scom_targets[x] == NULL)
-//           {
-//               TRACDCOMP( g_trac_scom, "ScomTest - TARGET = NULL - 1 x = %d", x);
-//               continue;
-//           }
-//           else if ((scom_targets[x]->getAttr<TARGETING::ATTR_SCOM_SWITCHES>().useXscom == 0) &&
-//                    (scom_targets[x]->getAttr<TARGETING::ATTR_SCOM_SWITCHES>().useFsiScom == 0))
-//           {
-//               // If both FSI and XSCOM are not enabled.. then ignore..
-//               TRACDCOMP(g_trac_scom, "INDIRECT SCOM>> SKIPPING ");
-//               scom_targets[x] = NULL; //remove from our list
-//           }
-//           else if (scom_targets[x]->getAttr<TARGETING::ATTR_HWAS_STATE>().functional != true)
-//           {
-//               TRACDCOMP( g_trac_scom, "ScomTest::test_FSISCOMreadWrite_centaur> Target %d is not functional", x );
-//               scom_targets[x] = NULL; //remove from our list
-//           }
-//
-//
-//       }
-//
-//       // scratch data to use
-//       //@fixme: Need to either fabricate some fake registers to use or save off data before modifying SCOMs to avoid
-//       //   corrupting the HW.
-//
-//       struct {
-//           TARGETING::Target* target;
-//           uint64_t addr;
-//           uint64_t data;
-//       } test_data[] = {
-//           { scom_targets[myPROC0], 0x8000F06002011E3F ,0x1234432112344321},
-//           { scom_targets[myPROC0], 0x8000086002011E3F, 0x123443211234ABAB},
-//       };
-//       const uint64_t NUM_ADDRS = sizeof(test_data)/sizeof(test_data[0]);
-//
-//
-//       size_t op_size = sizeof(uint32_t);
-//
-//       // write all the test registers
-//       for( uint64_t x = 0; x < NUM_ADDRS; x++ )
-//       {
-//           //only run if the target exists
-//           if(test_data[x].target == NULL)
-//           {
-//               continue;
-//           }
-//
-//           op_size = sizeof(uint64_t);
-//
-//           total++;
-//           l_err = deviceWrite( test_data[x].target,
-//                                &(test_data[x].data),
-//                                op_size,
-//                                DEVICE_SCOM_ADDRESS(test_data[x].addr) );
-//           if( l_err )
-//           {
-//               TRACFCOMP(g_trac_scom, "ScomTest::test_IndirectScom_proc> [%d] Write: Error from device : addr=0x%X, RC=%X", x,  test_data[x].addr, l_err->reasonCode() );
-//               TS_FAIL( "ScomTest::test_IndirectScom_proc> ERROR : Unexpected error log from write1" );
-//               fails++;
-//               errlCommit(l_err,SCOM_COMP_ID);
-//           }
-//       }
-//
-//       // allocate space for read data
-//       uint64_t read_data[NUM_ADDRS];
-//
-//       memset(read_data, 0, sizeof read_data);
-//
-//       // read all the test registers
-//       for( uint64_t x = 0; x < NUM_ADDRS; x++ )
-//       {
-//           //only run if the target exists
-//           if(test_data[x].target == NULL)
-//           {
-//               continue;
-//           }
-//
-//           op_size = sizeof(uint64_t);
-//
-//           total++;
-//           l_err = deviceRead( test_data[x].target,
-//                               &(read_data[x]),
-//                               op_size,
-//                               DEVICE_SCOM_ADDRESS(test_data[x].addr) );
-//
-//           if( l_err )
-//           {
-//               TRACFCOMP(g_trac_scom, "ScomTest::test_IndirectScomreadWrite_proc> [%d] Read: Error from device : addr=0x%X, RC=%X", x,  test_data[x].addr, l_err->reasonCode() );
-//               TS_FAIL( "ScomTest::test_IndirectScomreadWrite_proc> ERROR : Unexpected error log from write1" );
-//               fails++;
-//               errlCommit(l_err,SCOM_COMP_ID);
-//           }
-//           else if((read_data[x] & 0x000000000000FFFF) != (test_data[x].data & 0x000000000000FFFF))
-//           {
-//               TRACFCOMP(g_trac_scom, "ScomTest::test_IndirectScomreadWrite_proc> [%d] Read: Data miss-match : addr=0x%X, read_data=0x%llx, write_data=0x%llx", x, test_data[x].addr, read_data[x], test_data[x].data);
-//               TS_FAIL( "ScomTest::test_IndirectScomreadWrite_proc> ERROR : Data miss-match between read and expected data" );
-//               fails++;
-//           }
-//
-//       }
-//
-//       TRACFCOMP( g_trac_scom, "ScomTest::test_IndirectScomreadWrite_proc> %d/%d fails", fails, total );
-//
-//   }
+  void test_IndirectScom(void)
+  {
+      TRACFCOMP( g_trac_scom, "ScomTest::test_IndirectScomReadWrite> Start" );
+
+      uint64_t fails = 0;
+      uint64_t total = 0;
+      errlHndl_t l_err = NULL;
+
+      //@VBU workaround - Disable Indirect SCOM test case o
+      //Test case read/writes to valid addresses and is
+      //potentially destructive on VBU
+      if (TARGETING::is_vpo())
+      {
+           return;
+      }
+
+      // Setup some targets to use
+      enum {
+          myPROC0,
+          NUM_TARGETS
+      };
+      TARGETING::Target* scom_targets[NUM_TARGETS];
+      for( uint64_t x = 0; x < NUM_TARGETS; x++ )
+      {
+          scom_targets[x] = NULL;
+      }
+
+
+      // Target Proc 9 - the FSI wrap-back connection in simics
+      TARGETING::EntityPath epath(TARGETING::EntityPath::PATH_PHYSICAL);
+      epath.addLast(TARGETING::TYPE_SYS,0);
+      epath.addLast(TARGETING::TYPE_NODE,0);
+      epath.addLast(TARGETING::TYPE_PROC,0);
+
+      scom_targets[myPROC0] = TARGETING::targetService().toTarget(epath);
+
+      for( uint64_t x = 0; x < NUM_TARGETS; x++ )
+      {
+          //only run if the target exists
+          if(scom_targets[x] == NULL)
+          {
+              TRACDCOMP( g_trac_scom, "ScomTest - TARGET = NULL - 1 x = %d", x);
+              continue;
+          }
+          else if ((scom_targets[x]->getAttr<TARGETING::ATTR_SCOM_SWITCHES>().useXscom == 0) &&
+                   (scom_targets[x]->getAttr<TARGETING::ATTR_SCOM_SWITCHES>().useFsiScom == 0))
+          {
+              // If both FSI and XSCOM are not enabled.. then ignore..
+              TRACDCOMP(g_trac_scom, "INDIRECT SCOM>> SKIPPING ");
+              scom_targets[x] = NULL; //remove from our list
+          }
+          else if (scom_targets[x]->getAttr<TARGETING::ATTR_HWAS_STATE>().functional != true)
+          {
+              TRACDCOMP( g_trac_scom, "ScomTest::test_FSISCOMreadWrite_centaur> Target %d is not functional", x );
+              scom_targets[x] = NULL; //remove from our list
+          }
+
+
+      }
+
+      // scratch data to use
+
+      struct {
+          TARGETING::Target* target;
+          uint64_t addr;
+          uint64_t data;
+          bool     isFail;
+      } test_data[] = {
+          { scom_targets[myPROC0], 0x80000C010D010C3F ,0x1234432112344321, false},
+          { scom_targets[myPROC0], 0x80000C0107011C3F, 0x123443211234ABAB, false },
+          { scom_targets[myPROC0], 0x8FFFFFFFFFFFFFFF, 0x123443211234ABAB, true },
+      };
+      const uint64_t NUM_ADDRS = sizeof(test_data)/sizeof(test_data[0]);
+
+
+      size_t op_size = sizeof(uint32_t);
+
+      // write all the test registers
+      for( uint64_t x = 0; x < NUM_ADDRS; x++ )
+      {
+          //only run if the target exists
+          if(test_data[x].target == NULL)
+          {
+              continue;
+          }
+
+          op_size = sizeof(uint64_t);
+
+          total++;
+          l_err = deviceWrite( test_data[x].target,
+                               &(test_data[x].data),
+                               op_size,
+                               DEVICE_SCOM_ADDRESS(test_data[x].addr) );
+          if(!test_data[x].isFail && l_err )
+          {
+              TRACFCOMP(g_trac_scom, "ScomTest::test_IndirectScom_proc> [%d] Write: Error from device : addr=0x%X, RC=%X", x,  test_data[x].addr, l_err->reasonCode() );
+              TS_FAIL( "ScomTest::test_IndirectScom_proc> ERROR : Unexpected error log from device write: addr=0x%X, RC=%X ",  test_data[x].addr, l_err->reasonCode() );
+              fails++;
+              errlCommit(l_err,SCOM_COMP_ID);
+              l_err = NULL;
+          }
+          else if(test_data[x].isFail && !l_err )
+          {
+              TRACFCOMP(g_trac_scom, "ScomTest::test_IndirectScom_proc> [%d] Write: Expected an Error from device write: addr=0x%X", x,  test_data[x].addr );
+              TS_FAIL( "ScomTest::test_IndirectScom_proc> ERROR : Expected an error log from device write and did not get one : addr=0x%X",  test_data[x].addr );
+              fails++;
+          }
+          else if(l_err)
+          {
+              //delete expected errors
+              delete l_err;
+          }
+      }
+
+      // allocate space for read data
+      uint64_t read_data[NUM_ADDRS];
+
+      memset(read_data, 0, sizeof read_data);
+
+      // read all the test registers
+      for( uint64_t x = 0; x < NUM_ADDRS; x++ )
+      {
+          //only run if the target exists
+          if(test_data[x].target == NULL)
+          {
+              continue;
+          }
+
+          op_size = sizeof(uint64_t);
+
+          total++;
+          l_err = deviceRead( test_data[x].target,
+                              &(read_data[x]),
+                              op_size,
+                              DEVICE_SCOM_ADDRESS(test_data[x].addr) );
+
+          if(!test_data[x].isFail && l_err )
+          {
+              TRACFCOMP(g_trac_scom, "ScomTest::test_IndirectScomreadWrite_proc> [%d] Read: Error from device : addr=0x%X, RC=%X", x,  test_data[x].addr, l_err->reasonCode() );
+              TS_FAIL( "ScomTest::test_IndirectScomreadWrite_proc> ERROR : Unexpected error log from read device : addr=0x%X, RC=%X", test_data[x].addr, l_err->reasonCode() );
+              fails++;
+              errlCommit(l_err,SCOM_COMP_ID);
+              l_err = NULL;
+          }
+          else if(test_data[x].isFail && !l_err )
+          {
+              TRACFCOMP(g_trac_scom, "ScomTest::test_IndirectScom_proc> [%d] Read: Expected an Error from device read : addr=0x%X", x,  test_data[x].addr );
+              TS_FAIL( "ScomTest::test_IndirectScom_proc> ERROR : Expected an error log from device read and did not get one : addr=0x%X",  test_data[x].addr );
+              fails++;
+          }
+          else if(!test_data[x].isFail &&
+                    ((read_data[x] & 0x000000000000FFFF) !=
+                    (test_data[x].data & 0x000000000000FFFF))
+                )
+          {
+              TRACFCOMP(g_trac_scom, "ScomTest::test_IndirectScomreadWrite_proc> [%d] Read: Data miss-match : addr=0x%X, read_data=0x%llx, write_data=0x%llx", x, test_data[x].addr, read_data[x], test_data[x].data);
+              TS_FAIL( "ScomTest::test_IndirectScomreadWrite_proc> ERROR : Data miss-match between read and expected data  read_data" );
+              fails++;
+          }
+          else if(l_err)
+          {
+              //delete expected errors
+              delete l_err;
+          }
+
+      }
+
+      TRACFCOMP( g_trac_scom, "ScomTest::test_IndirectScomreadWrite_proc> %d/%d fails", fails, total );
+
+  }
 
   void test_P9_ScomTranslations(void)
 {