Fix enum in dimmConsts.H

Reference chips/p9/procedures/hwp/memory/lib/shared/mss_const.H :
    // Uses "_" in the name for INVALID as INVALID is defined as a macro in the
    // FSP code. If we just use INVALID as an enum name, then the preprocessor
    // compile phase changes it to be the macro.
Changed Enum mrs INVALID ==> INVALID_MRS

Change-Id: I002b8e4c13cc4439fb353e42c1d928c7fdc0e67c
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55106
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Dev-Ready: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55169
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

4 files changed, 83 insertions, 82 deletions

diff --git a/src/import/chips/centaur/procedures/hwp/memory/lib/shared/dimmConsts.H b/src/import/chips/centaur/procedures/hwp/memory/lib/shared/dimmConsts.H
index e69b67ae4..baea0109b 100644
--- a/src/import/chips/centaur/procedures/hwp/memory/lib/shared/dimmConsts.H
+++ b/src/import/chips/centaur/procedures/hwp/memory/lib/shared/dimmConsts.H
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2016,2017                        */
+/* Contributors Listed Below - COPYRIGHT 2016,2018                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -123,7 +123,7 @@ enum mrs : size_t
     MRS4_BA = 4,   ///< MRS4 Bank Address
     MRS5_BA = 5,   ///< MRS5 Bank Address
     MRS6_BA = 6,   ///< MRS6 Bank Address
-    INVALID = 255, ///< INVALID
+    INVALID_RANK = 255, ///< INVALID
 };
 
 enum dimm_types : size_t
diff --git a/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_draminit.C b/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_draminit.C
index 7cf2dca98..48b288435 100755
--- a/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_draminit.C
+++ b/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_draminit.C
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2016,2017                        */
+/* Contributors Listed Below - COPYRIGHT 2016,2018                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -363,7 +363,8 @@ extern "C" {
             for ( l_rank_pair_group = 0; l_rank_pair_group < MAX_RANKS_PER_DIMM; l_rank_pair_group++)
             {
                 //Check if rank group exists
-                if((l_primary_ranks_array[l_rank_pair_group][0] != INVALID) || (l_primary_ranks_array[l_rank_pair_group][1] != INVALID))
+                if((l_primary_ranks_array[l_rank_pair_group][0] != INVALID_RANK) ||
+                   (l_primary_ranks_array[l_rank_pair_group][1] != INVALID_RANK))
                 {
                     print_shadow_reg(i_target, l_port_number, l_rank_pair_group);
                 }
diff --git a/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_draminit_training.C b/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_draminit_training.C
index c7b5dcfb9..0ab04a964 100755
--- a/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_draminit_training.C
+++ b/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_draminit_training.C
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2016,2017                        */
+/* Contributors Listed Below - COPYRIGHT 2016,2018                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -237,7 +237,7 @@ extern "C" {
             for(l_group = 0; l_group < MAX_RANKS_PER_DIMM; l_group ++)
             {
                 //Check if rank group exists
-                if(l_primary_ranks_array[l_group][l_port] != INVALID)
+                if(l_primary_ranks_array[l_group][l_port] != INVALID_RANK)
                 {
                     //Set up for Init Cal - Done per port pair
                     FAPI_TRY(l_test_buffer_4.setBit(0, 2)); //Init Cal test = 11XX
diff --git a/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_eff_config_rank_group.C b/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_eff_config_rank_group.C
index ffcbe28f7..e755fa55f 100644
--- a/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_eff_config_rank_group.C
+++ b/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_eff_config_rank_group.C
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2016,2017                        */
+/* Contributors Listed Below - COPYRIGHT 2016,2018                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -96,7 +96,7 @@ extern "C" {
                 }
                 else
                 {
-                    primary_rank_group1_u8array[cur_port] = INVALID;
+                    primary_rank_group1_u8array[cur_port] = INVALID_RANK;
                 }
 
                 if (num_ranks_per_dimm_u8array[cur_port][0] > 2)
@@ -106,14 +106,14 @@ extern "C" {
                 }
                 else
                 {
-                    primary_rank_group2_u8array[cur_port] = INVALID;
-                    primary_rank_group3_u8array[cur_port] = INVALID;
+                    primary_rank_group2_u8array[cur_port] = INVALID_RANK;
+                    primary_rank_group3_u8array[cur_port] = INVALID_RANK;
                 }
 
-                secondary_rank_group0_u8array[cur_port] = INVALID;
-                secondary_rank_group1_u8array[cur_port] = INVALID;
-                secondary_rank_group2_u8array[cur_port] = INVALID;
-                secondary_rank_group3_u8array[cur_port] = INVALID;
+                secondary_rank_group0_u8array[cur_port] = INVALID_RANK;
+                secondary_rank_group1_u8array[cur_port] = INVALID_RANK;
+                secondary_rank_group2_u8array[cur_port] = INVALID_RANK;
+                secondary_rank_group3_u8array[cur_port] = INVALID_RANK;
 
                 //Preet Add 3TSV /2H  Type - Single Drop Case
                 //ATTR_EFF_STACK_TYPE <enum>NONE = 0, DDP_QDP = 1, STACK_3DS = 2</enum>
@@ -125,20 +125,20 @@ extern "C" {
                     {
                         primary_rank_group0_u8array[cur_port] = 0;
                         primary_rank_group1_u8array[cur_port] = 1;
-                        primary_rank_group2_u8array[cur_port] = INVALID;
-                        primary_rank_group3_u8array[cur_port] = INVALID;
-                        secondary_rank_group0_u8array[cur_port] = INVALID;
-                        secondary_rank_group1_u8array[cur_port] = INVALID;
-                        secondary_rank_group2_u8array[cur_port] = INVALID;
-                        secondary_rank_group3_u8array[cur_port] = INVALID;
-                        tertiary_rank_group0_u8array[cur_port] = INVALID;
-                        tertiary_rank_group1_u8array[cur_port] = INVALID;
-                        tertiary_rank_group2_u8array[cur_port] = INVALID;
-                        tertiary_rank_group3_u8array[cur_port] = INVALID;
-                        quanternary_rank_group0_u8array[cur_port] = INVALID;
-                        quanternary_rank_group1_u8array[cur_port] = INVALID;
-                        quanternary_rank_group2_u8array[cur_port] = INVALID;
-                        quanternary_rank_group3_u8array[cur_port] = INVALID;
+                        primary_rank_group2_u8array[cur_port] = INVALID_RANK;
+                        primary_rank_group3_u8array[cur_port] = INVALID_RANK;
+                        secondary_rank_group0_u8array[cur_port] = INVALID_RANK;
+                        secondary_rank_group1_u8array[cur_port] = INVALID_RANK;
+                        secondary_rank_group2_u8array[cur_port] = INVALID_RANK;
+                        secondary_rank_group3_u8array[cur_port] = INVALID_RANK;
+                        tertiary_rank_group0_u8array[cur_port] = INVALID_RANK;
+                        tertiary_rank_group1_u8array[cur_port] = INVALID_RANK;
+                        tertiary_rank_group2_u8array[cur_port] = INVALID_RANK;
+                        tertiary_rank_group3_u8array[cur_port] = INVALID_RANK;
+                        quanternary_rank_group0_u8array[cur_port] = INVALID_RANK;
+                        quanternary_rank_group1_u8array[cur_port] = INVALID_RANK;
+                        quanternary_rank_group2_u8array[cur_port] = INVALID_RANK;
+                        quanternary_rank_group3_u8array[cur_port] = INVALID_RANK;
                     }
 
                     //if 4H
@@ -148,18 +148,18 @@ extern "C" {
                         primary_rank_group1_u8array[cur_port] = 1;
                         primary_rank_group2_u8array[cur_port] = 2;
                         primary_rank_group3_u8array[cur_port] = 3;
-                        secondary_rank_group0_u8array[cur_port] = INVALID;
-                        secondary_rank_group1_u8array[cur_port] = INVALID;
-                        secondary_rank_group2_u8array[cur_port] = INVALID;
-                        secondary_rank_group3_u8array[cur_port] = INVALID;
-                        tertiary_rank_group0_u8array[cur_port] = INVALID;
-                        tertiary_rank_group1_u8array[cur_port] = INVALID;
-                        tertiary_rank_group2_u8array[cur_port] = INVALID;
-                        tertiary_rank_group3_u8array[cur_port] = INVALID;
-                        quanternary_rank_group0_u8array[cur_port] = INVALID;
-                        quanternary_rank_group1_u8array[cur_port] = INVALID;
-                        quanternary_rank_group2_u8array[cur_port] = INVALID;
-                        quanternary_rank_group3_u8array[cur_port] = INVALID;
+                        secondary_rank_group0_u8array[cur_port] = INVALID_RANK;
+                        secondary_rank_group1_u8array[cur_port] = INVALID_RANK;
+                        secondary_rank_group2_u8array[cur_port] = INVALID_RANK;
+                        secondary_rank_group3_u8array[cur_port] = INVALID_RANK;
+                        tertiary_rank_group0_u8array[cur_port] = INVALID_RANK;
+                        tertiary_rank_group1_u8array[cur_port] = INVALID_RANK;
+                        tertiary_rank_group2_u8array[cur_port] = INVALID_RANK;
+                        tertiary_rank_group3_u8array[cur_port] = INVALID_RANK;
+                        quanternary_rank_group0_u8array[cur_port] = INVALID_RANK;
+                        quanternary_rank_group1_u8array[cur_port] = INVALID_RANK;
+                        quanternary_rank_group2_u8array[cur_port] = INVALID_RANK;
+                        quanternary_rank_group3_u8array[cur_port] = INVALID_RANK;
                     }
 
                     //if 8H   <Add Later if Required>
@@ -178,12 +178,12 @@ extern "C" {
 
                 primary_rank_group0_u8array[cur_port] = 0;
                 primary_rank_group1_u8array[cur_port] = 4;
-                primary_rank_group2_u8array[cur_port] = INVALID;
-                primary_rank_group3_u8array[cur_port] = INVALID;
-                secondary_rank_group0_u8array[cur_port] = INVALID;
-                secondary_rank_group1_u8array[cur_port] = INVALID;
-                secondary_rank_group2_u8array[cur_port] = INVALID;
-                secondary_rank_group3_u8array[cur_port] = INVALID;
+                primary_rank_group2_u8array[cur_port] = INVALID_RANK;
+                primary_rank_group3_u8array[cur_port] = INVALID_RANK;
+                secondary_rank_group0_u8array[cur_port] = INVALID_RANK;
+                secondary_rank_group1_u8array[cur_port] = INVALID_RANK;
+                secondary_rank_group2_u8array[cur_port] = INVALID_RANK;
+                secondary_rank_group3_u8array[cur_port] = INVALID_RANK;
 
                 if (num_ranks_per_dimm_u8array[cur_port][0] == 2)
                 {
@@ -217,32 +217,32 @@ extern "C" {
                     {
                         primary_rank_group0_u8array[cur_port] = 0;
                         primary_rank_group1_u8array[cur_port] = 4;
-                        primary_rank_group2_u8array[cur_port] = INVALID;
-                        primary_rank_group3_u8array[cur_port] = INVALID;
-                        secondary_rank_group0_u8array[cur_port] = INVALID;
-                        secondary_rank_group1_u8array[cur_port] = INVALID;
-                        secondary_rank_group2_u8array[cur_port] = INVALID;
-                        secondary_rank_group3_u8array[cur_port] = INVALID;
+                        primary_rank_group2_u8array[cur_port] = INVALID_RANK;
+                        primary_rank_group3_u8array[cur_port] = INVALID_RANK;
+                        secondary_rank_group0_u8array[cur_port] = INVALID_RANK;
+                        secondary_rank_group1_u8array[cur_port] = INVALID_RANK;
+                        secondary_rank_group2_u8array[cur_port] = INVALID_RANK;
+                        secondary_rank_group3_u8array[cur_port] = INVALID_RANK;
                     }
                     //if 4H
                     else if(num_ranks_per_dimm_u8array[cur_port][0] == 4)
                     {
                         primary_rank_group0_u8array[cur_port] = 0;
                         primary_rank_group1_u8array[cur_port] = 4;
-                        primary_rank_group2_u8array[cur_port] = INVALID;
-                        primary_rank_group3_u8array[cur_port] = INVALID;
-                        secondary_rank_group0_u8array[cur_port] = INVALID;
-                        secondary_rank_group1_u8array[cur_port] = INVALID;
-                        secondary_rank_group2_u8array[cur_port] = INVALID;
-                        secondary_rank_group3_u8array[cur_port] = INVALID;
-                        tertiary_rank_group0_u8array[cur_port] = INVALID;
-                        tertiary_rank_group1_u8array[cur_port] = INVALID;
-                        tertiary_rank_group2_u8array[cur_port] = INVALID;
-                        tertiary_rank_group3_u8array[cur_port] = INVALID;
-                        quanternary_rank_group0_u8array[cur_port] = INVALID;
-                        quanternary_rank_group1_u8array[cur_port] = INVALID;
-                        quanternary_rank_group2_u8array[cur_port] = INVALID;
-                        quanternary_rank_group3_u8array[cur_port] = INVALID;
+                        primary_rank_group2_u8array[cur_port] = INVALID_RANK;
+                        primary_rank_group3_u8array[cur_port] = INVALID_RANK;
+                        secondary_rank_group0_u8array[cur_port] = INVALID_RANK;
+                        secondary_rank_group1_u8array[cur_port] = INVALID_RANK;
+                        secondary_rank_group2_u8array[cur_port] = INVALID_RANK;
+                        secondary_rank_group3_u8array[cur_port] = INVALID_RANK;
+                        tertiary_rank_group0_u8array[cur_port] = INVALID_RANK;
+                        tertiary_rank_group1_u8array[cur_port] = INVALID_RANK;
+                        tertiary_rank_group2_u8array[cur_port] = INVALID_RANK;
+                        tertiary_rank_group3_u8array[cur_port] = INVALID_RANK;
+                        quanternary_rank_group0_u8array[cur_port] = INVALID_RANK;
+                        quanternary_rank_group1_u8array[cur_port] = INVALID_RANK;
+                        quanternary_rank_group2_u8array[cur_port] = INVALID_RANK;
+                        quanternary_rank_group3_u8array[cur_port] = INVALID_RANK;
                     }
 
                     //if 8H   <Add Later if Required>
@@ -250,14 +250,14 @@ extern "C" {
             }
             else if ((num_ranks_per_dimm_u8array[cur_port][0] == 0) && (num_ranks_per_dimm_u8array[cur_port][1] == 0))
             {
-                primary_rank_group0_u8array[cur_port] = INVALID;
-                primary_rank_group1_u8array[cur_port] = INVALID;
-                primary_rank_group2_u8array[cur_port] = INVALID;
-                primary_rank_group3_u8array[cur_port] = INVALID;
-                secondary_rank_group0_u8array[cur_port] = INVALID;
-                secondary_rank_group1_u8array[cur_port] = INVALID;
-                secondary_rank_group2_u8array[cur_port] = INVALID;
-                secondary_rank_group3_u8array[cur_port] = INVALID;
+                primary_rank_group0_u8array[cur_port] = INVALID_RANK;
+                primary_rank_group1_u8array[cur_port] = INVALID_RANK;
+                primary_rank_group2_u8array[cur_port] = INVALID_RANK;
+                primary_rank_group3_u8array[cur_port] = INVALID_RANK;
+                secondary_rank_group0_u8array[cur_port] = INVALID_RANK;
+                secondary_rank_group1_u8array[cur_port] = INVALID_RANK;
+                secondary_rank_group2_u8array[cur_port] = INVALID_RANK;
+                secondary_rank_group3_u8array[cur_port] = INVALID_RANK;
             }
             else
             {
@@ -269,14 +269,14 @@ extern "C" {
 
             }
 
-            tertiary_rank_group0_u8array[cur_port] = INVALID;
-            tertiary_rank_group1_u8array[cur_port] = INVALID;
-            tertiary_rank_group2_u8array[cur_port] = INVALID;
-            tertiary_rank_group3_u8array[cur_port] = INVALID;
-            quanternary_rank_group0_u8array[cur_port] = INVALID;
-            quanternary_rank_group1_u8array[cur_port] = INVALID;
-            quanternary_rank_group2_u8array[cur_port] = INVALID;
-            quanternary_rank_group3_u8array[cur_port] = INVALID;
+            tertiary_rank_group0_u8array[cur_port] = INVALID_RANK;
+            tertiary_rank_group1_u8array[cur_port] = INVALID_RANK;
+            tertiary_rank_group2_u8array[cur_port] = INVALID_RANK;
+            tertiary_rank_group3_u8array[cur_port] = INVALID_RANK;
+            quanternary_rank_group0_u8array[cur_port] = INVALID_RANK;
+            quanternary_rank_group1_u8array[cur_port] = INVALID_RANK;
+            quanternary_rank_group2_u8array[cur_port] = INVALID_RANK;
+            quanternary_rank_group3_u8array[cur_port] = INVALID_RANK;
 
             FAPI_INF("P[%02d][%02d][%02d][%02d],S[%02d][%02d][%02d][%02d],T[%02d][%02d][%02d][%02d],Q[%02d][%02d][%02d][%02d] on %s PORT%d.",
                      primary_rank_group0_u8array[cur_port], primary_rank_group1_u8array[cur_port], primary_rank_group2_u8array[cur_port],