diff options
| author | Joachim Fenkes <fenkes@de.ibm.com> | 2017-06-16 13:46:45 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-06-23 17:59:27 -0400 |
| commit | b504bd65d5daf2ffd92f63ac79ad4f3eddd0e676 (patch) | |
| tree | 61c58d9559f91c411d32dd02213d3c2b4fcb1d6e /src | |
| parent | 17f308c46d0d5453324248046331036c6d0ac0e7 (diff) | |
| download | talos-hostboot-b504bd65d5daf2ffd92f63ac79ad4f3eddd0e676.tar.gz talos-hostboot-b504bd65d5daf2ffd92f63ac79ad4f3eddd0e676.zip | |
Propagate "fused_core" IPL option into PU chip
Set the "force fused core mode" bit in PERV_CTRL0 based on the IPL
option in p9_set_fsi_gp_shadow.
Also check in p9_sbe_select_ex that blown fuses did not prevent the
override.
Change-Id: I8bafa8f571db6f8b0b776e124cc480b99722718e
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41990
Dev-Ready: Joseph J. McGill <jmcgill@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41992
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/perv/p9_set_fsi_gp_shadow.C | 18 |
1 files changed, 17 insertions, 1 deletions
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_set_fsi_gp_shadow.C b/src/import/chips/p9/procedures/hwp/perv/p9_set_fsi_gp_shadow.C index b89568f69..99fc48ab8 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_set_fsi_gp_shadow.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_set_fsi_gp_shadow.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* Contributors Listed Below - COPYRIGHT 2015,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -42,6 +42,7 @@ #include "p9_const_common.H" #include <p9_perv_scom_addresses.H> +#include <p9n2_perv_scom_addresses_fld.H> fapi2::ReturnCode p9_set_fsi_gp_shadow(const @@ -125,6 +126,21 @@ fapi2::ReturnCode p9_set_fsi_gp_shadow(const p9SetFsiGpShadow::PERV_CTRL1_FLUSHVALUE)); } + /* Write the value of FUSED_CORE_MODE into PERV_CTRL0(23) regardless of chip EC; the bit is nonfunctional on Nimbus DD1 */ + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_FUSED_CORE_MODE, fapi2::Target<fapi2::TARGET_TYPE_SYSTEM>(), l_read_attr)); + FAPI_TRY(fapi2::getCfamRegister(i_target_chip, PERV_PERV_CTRL0_COPY_FSI, l_cfam_data)); + + if (l_read_attr) + { + l_cfam_data.setBit<P9N2_PERV_PERV_CTRL0_TP_OTP_SCOM_FUSED_CORE_MODE>(); + } + else + { + l_cfam_data.clearBit<P9N2_PERV_PERV_CTRL0_TP_OTP_SCOM_FUSED_CORE_MODE>(); + } + + FAPI_TRY(fapi2::putCfamRegister(i_target_chip, PERV_PERV_CTRL0_COPY_FSI, l_cfam_data)); + FAPI_INF("p9_set_fsi_gp_shadow: Exiting ..."); fapi_try_exit: |
