summaryrefslogtreecommitdiffstats
path: root/src
diff options
context:
space:
mode:
authorJoe McGill <jmcgill@us.ibm.com>2018-07-25 12:28:23 -0500
committerDaniel M. Crowell <dcrowell@us.ibm.com>2018-07-26 12:28:08 -0500
commitb255bf6cc5d82153e42cc8f6b20d899f3f0b2797 (patch)
tree3c27449e318863a0d8ef62f5df9b9be445869d6c /src
parent23126e788fcf5b5ed05bf563a8eb4585679fdc36 (diff)
downloadtalos-hostboot-b255bf6cc5d82153e42cc8f6b20d899f3f0b2797.tar.gz
talos-hostboot-b255bf6cc5d82153e42cc8f6b20d899f3f0b2797.zip
p9_obus_fir_utils -- create header for OBUS FIR settings
Change-Id: I841359c94ea1b2f9381c4f6bef3649bf9fc87716 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/63293 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/63313 Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src')
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_obus_fir_utils.H80
1 files changed, 80 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_obus_fir_utils.H b/src/import/chips/p9/procedures/hwp/nest/p9_obus_fir_utils.H
new file mode 100644
index 000000000..7da328386
--- /dev/null
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_obus_fir_utils.H
@@ -0,0 +1,80 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/import/chips/p9/procedures/hwp/nest/p9_obus_fir_utils.H $ */
+/* */
+/* OpenPOWER HostBoot Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2018 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
+///
+/// @file p9_obus_fir_utils.H
+/// @brief Shared functions to program OBUS FIRs (FAPI2)
+///
+/// @author Joe McGill <jmcgill@us.ibm.com>
+///
+
+//
+// *HWP HWP Owner : Joe McGill <jmcgill@us.ibm.com>
+// *HWP FW Owner : Thi N. Tran <thi@us.ibm.com>
+// *HWP Team : Nest
+// *HWP Level : 3
+// *HWP Consumed by : SBE,HB,FSP
+//
+
+#ifndef _P9_OBUS_FIR_UTILS_H_
+#define _P9_OBUS_FIR_UTILS_H_
+
+//------------------------------------------------------------------------------
+// Includes
+//------------------------------------------------------------------------------
+#include <fapi2.H>
+
+//------------------------------------------------------------------------------
+// Constant definitions
+//------------------------------------------------------------------------------
+
+// FBC TL FIR constants
+// one register per chip (encompassing all links), in N3 chiplet
+const uint64_t FBC_IOO_TL_FIR_ACTION0 = 0x0000000000000000ULL;
+const uint64_t FBC_IOO_TL_FIR_ACTION1 = 0x0049200000000000ULL;
+const uint64_t FBC_IOO_TL_FIR_MASK = 0xFF2490000FFFF00FULL;
+
+// in TDM mode, mask framer & parser attention
+const uint64_t FBC_IOO0_TL_FIR_MASK_TDM_EVEN = 0x0000080800000000ULL;
+
+// FBC DL FIR constants
+// one register per link, in OBUS chiplet
+const uint64_t FBC_IOO_DL_FIR_ACTION0 = 0x0000000000000000ULL;
+const uint64_t FBC_IOO_DL_FIR_ACTION1 = 0x0303C000033FFFFCULL;
+const uint64_t FBC_IOO_DL_FIR_MASK = 0xFCFC3FFFFCC00003ULL;
+
+// in TDM mode, mask all link specific bits
+const uint64_t FBC_IOO_DL_FIR_MASK_TDM_EVEN = 0xAAAAAAAAAAAA8AA8ULL;
+const uint64_t FBC_IOO_DL_FIR_MASK_TDM_ODD = 0x5555555555554554ULL;
+
+// link 0,1 internal errors are a simulation artifact in dd1 so they need to be masked
+const uint64_t FBC_IOO_DL_FIR_MASK_SIM = 0xFCFC3FFFFCFF00FFULL;
+
+// OBUS PHY FIR constants
+// one register per link, in OBUS chiplet
+const uint64_t OBUS_PHY_FIR_ACTION0 = 0x0000000000000000ULL;
+const uint64_t OBUS_PHY_FIR_ACTION1 = 0x2000000000000000ULL;
+const uint64_t OBUS_PHY_FIR_MASK = 0xDFFFFFFFFFFFC000ULL;
+
+#endif
OpenPOWER on IntegriCloud