diff options
| author | Mark Wenning <wenning@us.ibm.com> | 2012-09-18 13:42:55 -0500 |
|---|---|---|
| committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2012-11-07 12:08:57 -0600 |
| commit | b23d4daee35dfc8761aecc86ade077be1bcac548 (patch) | |
| tree | af9d0bae4e63f21b6d098492e73f9b7b8d09be6b /src | |
| parent | 899d62da619d299b0869c8e2b8c7b416985243af (diff) | |
| download | talos-hostboot-b23d4daee35dfc8761aecc86ade077be1bcac548.tar.gz talos-hostboot-b23d4daee35dfc8761aecc86ade077be1bcac548.zip | |
pore_gen_cpureg
Change-Id: Ic5cb0817118bf0de7d706124708e5b8551ba4258
RTC: 41425
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1899
Tested-by: Jenkins Server
Reviewed-by: Van H. Lee <vanlee@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src')
55 files changed, 3833 insertions, 3143 deletions
diff --git a/src/build/debug/vpo-debug-framework.pl b/src/build/debug/vpo-debug-framework.pl index 0985bd6b4..c828fce25 100755 --- a/src/build/debug/vpo-debug-framework.pl +++ b/src/build/debug/vpo-debug-framework.pl @@ -63,6 +63,7 @@ my %optionInfo = ( "-s#" => ["The slot to act on."], "-p#" => ["The chip position to act on."], "-c#" => ["The core/chipUnit to act on."], + "--realmem" => ["read from real memory instead of L3"], ); #-------------------------------------------------------------------------------- @@ -86,6 +87,7 @@ my @ecmdOpt = ("-cft"); my @threadState = (); my $l2Flushed = 0; my $fh; +my $opt_realmem = 0; # Use HB_VBUTOOLS env if specified my $outDir = getcwd(); @@ -130,6 +132,7 @@ if ($self) "out-path:s" => \$outPath, "debug" => \$debug, "mute" => \$mute, + "realmem" => \$opt_realmem, "no-save-states" => \$nosavestates, "help" => \$cfgHelp, "toolhelp" => \$toolHelp, @@ -159,6 +162,7 @@ else "out-path:s" => \$outPath, "debug" => \$debug, "mute" => \$mute, + "realmem" => \$opt_realmem, "no-save-states" => \$nosavestates, "help" => \$cfgHelp, "man" => \$cfgMan, @@ -324,15 +328,34 @@ sub readData #Read the cache lines from L3 and save to temp file my (undef, $fname) = tempfile("tmpXXXXX", DIR => "$outDir"); - my $command = sprintf ("$vbuToolDir/p8_dump_l3 %x $numCacheLines -f $fname -b @ecmdOpt", - $addr); + my $command = ""; + if ( $opt_realmem ) + { + ## after winkle, cache-contained is disabled, and the buffers are in + ## real memory at the same address. + ## use --realmem to read them. + ## + ## @todo RTC 50233 need to modify all these routines to sense + ## cache-contained mode and do the switch automatically + $command = sprintf ("getmemdma %x %d -fb $fname -quiet", + $addr, + $size ); + ## not using cachelines, no need to seek to offset. + $offset = 0; + } + else + { + $command = sprintf ("$vbuToolDir/p8_dump_l3 %x $numCacheLines -f $fname -b @ecmdOpt", + $addr); + } if ($debug) { print "addr $addr, size $size, offset $offset\n"; print "$command\n"; } - die "ERROR: cannot read L3" if (system("$command") != 0); + + die "ERROR: cannot read memory: $command " if (system("$command") != 0); #Extract just the data requested from the cache lines read open FILE, $fname or die "ERROR: $fname not found : $!"; diff --git a/src/include/kernel/cpumgr.H b/src/include/kernel/cpumgr.H index e5015feef..3d9fd2e02 100644 --- a/src/include/kernel/cpumgr.H +++ b/src/include/kernel/cpumgr.H @@ -149,17 +149,19 @@ class CpuManager * * bit 0 - 64 bit mode. * bit 3 - Hypervisor mode. + * bit 51 - Machine-check enable */ - static const uint64_t WAKEUP_MSR_VALUE = 0x9000000000000000; + static const uint64_t WAKEUP_MSR_VALUE = 0x9000000000001000; /** Desired value for LPCR after wakeup. * * bit 49 - Wake-up from external interrupt. * bit 50 - Wake-up from decrementer. * bit 51 - Wake-up from machine check. - * bit 60, 61 - LPES(0,1) = 1 (see ISA). + * bit 60 - LPES(0) = 1 (see ISA). + * bit 61 - LPES(1) = 0 (P8 RFC02204 forces to 0) */ - static const uint64_t WAKEUP_LPCR_VALUE = 0x000000000000700C; + static const uint64_t WAKEUP_LPCR_VALUE = 0x0000000000007008; protected: CpuManager(); diff --git a/src/include/usr/hwpf/istepreasoncodes.H b/src/include/usr/hwpf/istepreasoncodes.H index 72e852827..6ff163c6a 100644 --- a/src/include/usr/hwpf/istepreasoncodes.H +++ b/src/include/usr/hwpf/istepreasoncodes.H @@ -94,6 +94,7 @@ enum istepModuleId ISTEP_PROC_FAB_IOVALID_EROR = 0x2d, ISTEP_LOAD_PORE_IMAGE = 0x2e, ISTEP_APPLY_PORE_GEN_CPU_REGS = 0x2f, + ISTEP_PROC_PORESLW_INIT = 0x30, }; /** @@ -126,6 +127,8 @@ enum istepReasonCode ISTEP_STEP_NINETEEN = ISTEP_COMP_ID | 0x13, ISTEP_LOAD_PAYLOAD_FAILED = ISTEP_COMP_ID | 0x14, ISTEP_START_PAYLOAD_FAILED = ISTEP_COMP_ID | 0x15, + ISTEP_RESET_PORE_BARS_FAILED = ISTEP_COMP_ID | 0x16, + ISTEP_P8_PORESLW_INIT_FAILED = ISTEP_COMP_ID | 0x17, }; // end ISTEP } diff --git a/src/include/usr/isteps/istep15list.H b/src/include/usr/isteps/istep15list.H index d50e48cec..a64579dbc 100644 --- a/src/include/usr/isteps/istep15list.H +++ b/src/include/usr/isteps/istep15list.H @@ -34,6 +34,8 @@ * : Build runtime winkle images * 15.2 proc_set_pore_bar * : Tell SLW Eng where winkle image is + * 15.3 proc_poreslw_init + * : Initialize the PORE-SLW engine * * ***************************************************************** * THIS FILE WAS GENERATED ON 2012-04-12:1228 @@ -83,6 +85,14 @@ namespace INITSERVICE } }, + { + ISTEPNAME(15,03,"proc_poreslw_init"), + BUILD_WINKLE_IMAGES::call_proc_poreslw_init, + { + START_FN, + EXT_IMAGE, + } + }, // END OF LIST! }; diff --git a/src/kernel/cpumgr.C b/src/kernel/cpumgr.C index 2667d5b02..162b49f41 100644 --- a/src/kernel/cpumgr.C +++ b/src/kernel/cpumgr.C @@ -270,6 +270,7 @@ void CpuManager::activateCPU(cpu_t * i_cpu) // Verify / set SPRs. uint64_t msr = getMSR(); + msr |= 0x1000; // TODO: RTC: 51148 - Simics workaround for SW170137. kassert(WAKEUP_MSR_VALUE == msr); setLPCR(WAKEUP_LPCR_VALUE); } diff --git a/src/kernel/misc.C b/src/kernel/misc.C index 9b2872f04..beddbbb81 100644 --- a/src/kernel/misc.C +++ b/src/kernel/misc.C @@ -161,7 +161,7 @@ namespace KernelMisc // Create kernel save area and store ptr in bottom of kernel stack. task_t* saveArea = new task_t; memset(saveArea, '\0', sizeof(task_t)); - saveArea->context.msr_mask = 0xC030; // EE, PR, IR, DR. + saveArea->context.msr_mask = 0xD030; // EE, ME, PR, IR, DR. *(reinterpret_cast<task_t**>(cpu->kernel_stack_bottom)) = saveArea; // Execute winkle. diff --git a/src/kernel/start.S b/src/kernel/start.S index 2cd97d816..55cf7f193 100644 --- a/src/kernel/start.S +++ b/src/kernel/start.S @@ -30,11 +30,11 @@ _start: ;// Set thread priority high. or 2,2,2 - ;// Clear MSR[TA] (bit 1) and MSR[ME] (bit 51). + ;// Clear MSR[TA] (bit 1) and enable MSR[ME] (bit 51). mfmsr r2 - rldicl r2,r2,1,1 ;// Clear bit 1 - result [1-63,0] - rldicl r2,r2,50,1 ;// Clear bit 51 - result [51-63,0-50] - rldicl r2,r2,13,0 ;// Rotate around back to [0-63] + rldicl r2,r2,1,1 ;// Clear bit 1 - result [1-63,0] + rotrdi r2,r2,1 ;// Rotate right 1 - result [0,63] + ori r2,r2,4096 ;// Set bit 51 ;// Set up SRR0 / SRR1 to enable new MSR. mtsrr1 r2 li r2, _start_postmsr@l @@ -448,7 +448,7 @@ kernel_dispatch_task: stdcx. r0, TASK_CPUPTR, r1 ;// the CPU pointer in the task. mfmsr r2 ;// Get current MSR - ori r2,r2, 0xC030 ;// Enable MSR[EE,PR,IR,DR]. + ori r2,r2, 0xD030 ;// Enable MSR[EE,ME,PR,IR,DR]. rldicl r2,r2,50,1 ;// Clear ... rotldi r2,r2,14 ;// MSR[FP] ld r3, TASK_MSR_MASK(r1) ;// Load MSR mask. @@ -628,6 +628,7 @@ intvect_system_reset_inactive: beq+ _start ;// Now we are a winkled processor that is awoken. + ld r1, CPU_KERNEL_STACK_BOTTOM(r2) ld r1, 0(r1) mtsprg3 r1 diff --git a/src/usr/hwpf/hwp/build_winkle_images/build_winkle_images.C b/src/usr/hwpf/hwp/build_winkle_images/build_winkle_images.C index 56f245beb..a3b4e45c7 100644 --- a/src/usr/hwpf/hwp/build_winkle_images/build_winkle_images.C +++ b/src/usr/hwpf/hwp/build_winkle_images/build_winkle_images.C @@ -62,11 +62,15 @@ #include <mvpd/mvpdenums.H> #include <mvpd/mvpdreasoncodes.H> +#include <hwpf/istepreasoncodes.H> + #include "build_winkle_images.H" -// Uncomment these files as they become available: -#include "proc_slw_build/proc_slw_build.H" +#include "p8_slw_build/p8_slw_build.H" +#include "p8_slw_build/p8_pore_table_gen_api.H" #include "p8_set_pore_bar/p8_set_pore_bar.H" +#include "p8_pm.H" // PM_INIT +#include "p8_set_pore_bar/p8_poreslw_init.H" namespace BUILD_WINKLE_IMAGES { @@ -161,18 +165,17 @@ errlHndl_t loadPoreImage( const TARGETING::Target *i_CpuTarget, } + /** * @brief apply cpu reg information to the SLW image using * p8_pore_gen_cpureg() . * + * @param i_cpuTarget - proc target * @param io_image - pointer to the SLW image * @param i_sizeImage - size of the SLW image * * @return errorlog if error, NULL otherwise. * - * @todo $$ pore_gen_cpu_reg not supported this sprint (???), leave main code - * commented out for now. - * @todo $$ l_regname is defined as "unswizzled spr value" ???? */ errlHndl_t applyPoreGenCpuRegs( TARGETING::Target *i_cpuTarget, void *io_image, @@ -184,116 +187,132 @@ errlHndl_t applyPoreGenCpuRegs( TARGETING::Target *i_cpuTarget, getChildChiplets( l_coreIds, i_cpuTarget, TYPE_CORE, - true ); + false ); TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "applyPoreGenCpuRegs: Process cores=0x%x, threads=0x%x", l_coreIds.size(), cpu_thread_count() ); -#if 1 - TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, - "applyPoreGenCpuRegs: DISABLED until pore_gen_cpureg integration" ); - - // $$ this will be turned on when we integrate pore_gen_cpureg - // $$ @todo RTC 41425 -#else - size_t l_threadid = 0; - size_t l_coreid = 0; + size_t l_threadId = 0; + size_t l_coreId = 0; uint32_t l_rc = 0; - uint64_t l_msrcVal = cpu_spr_value(CPU_SPR_MSRC) ; - uint64_t l_lpcrVal = cpu_spr_value(CPU_SPR_LPCR) ; + uint64_t l_msrVal = cpu_spr_value(CPU_SPR_MSR) ; + + + uint64_t l_lpcrVal = cpu_spr_value( CPU_SPR_LPCR); + // Per Greg Still, + // Decrementer exceptions (bit 50) should be disabled when the system + // comes out of winkle. + // See LPCR def, PECE "reg" in Power ISA AS Version: Power8 June 27, 2012 + // and 23.7.3.5 - 6 in Murano Book 4 + l_lpcrVal &= ~(0x0000000000002000) ; + uint64_t l_hrmorVal = cpu_spr_value(CPU_SPR_HRMOR); - for ( l_coreid=0; l_coreid < l_coreIds.size(); l_coreid++ ) + for ( uint8_t i=0; i < l_coreIds.size(); i++ ) { - for ( l_threadid=0; l_threadid < cpu_thread_count(); l_threadid++ ) + + // dump path to the core we are writing to + EntityPath l_path; + l_path = l_coreIds[i]->getAttr<ATTR_PHYS_PATH>(); + l_path.dump(); + + l_coreId = l_coreIds[i]->getAttr<ATTR_CHIP_UNIT>(); + + // msr and hrmor are common across all threads, only set for thread 0 + // on each core + l_threadId = 0; + l_rc = p8_pore_gen_cpureg( io_image, + i_sizeImage, + P8_MSR_MSR, + l_msrVal, + l_coreId, + l_threadId); + if ( l_rc ) + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "ERROR: MSR: core=0x%x,thread=0x%x,l_rc=0x%x", + l_coreId, + l_threadId, + l_rc ); + break; + } + + l_rc = p8_pore_gen_cpureg( io_image, + i_sizeImage, + P8_SPR_HRMOR, + l_hrmorVal, + l_coreId, + l_threadId); + if ( l_rc ){ + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "ERROR: HRMOR: core=0x%x,thread=0x%x,l_rc=0x%x", + l_coreId, + l_threadId, + l_rc ); + break; + } + + // fill in lpcr for each thread + for ( l_threadId=0; l_threadId < cpu_thread_count(); l_threadId++ ) { TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, - "core=0x%x,thread=0x%x: ", - l_coreid, - l_threadid ); + "applyPoreGenCpuRegs: core=0x%x,thread=0x%x: ", + l_coreId, + l_threadId ); TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, - "msrc=0x%x,lpcr=0x%x,hrmor=0x%x", - l_msrcVal, + "applyPoreGenCpuRegs: msrc=0x%x,lpcr=0x%x,hrmor=0x%x", + l_msrVal, l_lpcrVal, l_hrmorVal ); - do { - l_rc = p8_pore_gen_cpureg( io_image, - i_sizeImage, - l_regName, - l_msrcVal, - l_coreid, - l_threadid); - if ( l_rc ) - { - TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, - "p8_pore_gen_cpu_reg ERROR: MSRC: core=0x%x,thread=0x%x,l_rc=0x%x", - l_coreId, - l_threadId, - l_rc ); - break; - } l_rc = p8_pore_gen_cpureg( io_image, i_sizeImage, - l_regName, + P8_SPR_LPCR, l_lpcrVal, - l_coreid, - l_threadid); + l_coreId, + l_threadId); if ( l_rc ) { TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, - "p8_pore_gen_cpu_reg ERROR: LPCR: core=0x%x,thread=0x%x,l_rc=0x%x", + "ERROR: LPCR: core=0x%x,thread=0x%x,l_rc=0x%x", l_coreId, l_threadId, l_rc ); break; } - - l_rc = p8_pore_gen_cpureg( io_image, - i_sizeImage, - l_regName, - l_hrmorVal, - l_coreid, - l_threadid); - if ( l_rc ){ - TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, - "p8_pore_gen_cpu_reg ERROR: HRMOR: core=0x%x,thread=0x%x,l_rc=0x%x", - l_coreId, - l_threadId, - l_rc ); - break; - } - - - } while (0); - - if ( l_rc ){ - TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, - "p8_pore_gen_cpu_reg ERROR: core=0x%x, thread=0x%x, l_rc=0x%x", - l_coreId, - l_threadId, - l_rc ); - /*@ - * @errortype - * @reasoncode ISTEP_BAD_RC - * @severity ERRORLOG::ERRL_SEV_UNRECOVERABLE - * @moduleid ISTEP_BUILD_WINKLE_IMAGES - * @userdata1 return code from p8_pore_gen_cpureg - * - * @devdesc p8_pore_gen_cpureg returned an error when - * attempting to change a reg value in the PORE image. - */ - l_errl = - new ERRORLOG::ErrlEntry(ERRORLOG::ERRL_SEV_UNRECOVERABLE, - ISTEP_BUILD_WINKLE_IMAGES, - ISTEP_BAD_RC, - l_rc ); - } } // end for l_threadId + + // if error writing thread break out of l_coreId loop + if ( l_rc ) + { + break; + } } // end for l_coreId -#endif + + if ( l_rc ){ + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "ERROR: core=0x%x, thread=0x%x, l_rc=0x%x", + l_coreId, + l_threadId, + l_rc ); + /*@ + * @errortype + * @reasoncode ISTEP_BAD_RC + * @severity ERRORLOG::ERRL_SEV_UNRECOVERABLE + * @moduleid ISTEP_BUILD_WINKLE_IMAGES + * @userdata1 return code from p8_pore_gen_cpureg + * + * @devdesc p8_pore_gen_cpureg returned an error when + * attempting to change a reg value in the PORE image. + */ + l_errl = + new ERRORLOG::ErrlEntry(ERRORLOG::ERRL_SEV_UNRECOVERABLE, + ISTEP::ISTEP_BUILD_WINKLE_IMAGES, + ISTEP::ISTEP_BAD_RC, + l_rc ); + } return l_errl; } @@ -378,7 +397,7 @@ void* call_host_build_winkle( void *io_pArgs ) // call the HWP with each fapi::Target FAPI_INVOKE_HWP( l_errl, - proc_slw_build, + p8_slw_build, l_fapi_cpu_target, reinterpret_cast<const void*>(l_pPoreImage), static_cast<uint32_t>(l_poreSize), @@ -428,6 +447,11 @@ void* call_host_build_winkle( void *io_pArgs ) // drop out if we hit an error and quit. break; } + else + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "applyPoreGenCpuRegs SUCCESS " ); + } } while (0); // end do block @@ -465,7 +489,7 @@ void* call_host_build_winkle( void *io_pArgs ) // // Wrapper function to call 15.2 : -// proc_set_pore_bar +// p8_set_pore_bar // void* call_proc_set_pore_bar( void *io_pArgs ) { @@ -478,6 +502,7 @@ void* call_proc_set_pore_bar( void *io_pArgs ) // @@@@@ CUSTOM BLOCK: @@@@@ + const TARGETING::Target* l_masterCore = TARGETING::getMasterCore( ); assert( l_masterCore != NULL ); @@ -491,6 +516,13 @@ void* call_proc_set_pore_bar( void *io_pArgs ) do { + // cast OUR type of target to a FAPI type of target. + const fapi::Target l_fapi_cpu_target( + TARGET_TYPE_PROC_CHIP, + reinterpret_cast<void *> + (const_cast<TARGETING::Target*> + (l_cpu_target)) ); + // fetch image location and size, written by host_build_winkle above // Note that the "i_mem_bar" input to p8_set_pore_bar is the physical @@ -502,7 +534,7 @@ void* call_proc_set_pore_bar( void *io_pArgs ) // to handle this, or there may one already??? // uint64_t l_imageAddr = - l_cpu_target->getAttr<TARGETING::ATTR_SLW_IMAGE_ADDR>(); + l_cpu_target->getAttr<TARGETING::ATTR_SLW_IMAGE_ADDR>(); // Size in Meg of the image, this is rounded up to the nearest power @@ -512,12 +544,6 @@ void* call_proc_set_pore_bar( void *io_pArgs ) // defined in p8_set_pore_bar.H uint32_t l_mem_type = SLW_L3 ; - // cast OUR type of target to a FAPI type of target. - const fapi::Target l_fapi_cpu_target( - TARGET_TYPE_PROC_CHIP, - reinterpret_cast<void *> - (const_cast<TARGETING::Target*> - (l_cpu_target)) ); // call the HWP with each fapi::Target TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, @@ -558,7 +584,6 @@ void* call_proc_set_pore_bar( void *io_pArgs ) l_errl ); errlCommit( l_errl, HWPF_COMP_ID ); - } else { @@ -579,4 +604,88 @@ void* call_proc_set_pore_bar( void *io_pArgs ) } +// +// Wrapper function to call 15.3 : +// proc_poreslw_init +// +void* call_proc_poreslw_init( void *io_pArgs ) +{ + errlHndl_t l_errl = NULL; + + ISTEP_ERROR::IStepError l_stepError; + + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "call_proc_poreslw_init entry" ); + + // @@@@@ CUSTOM BLOCK: @@@@@ + + + const TARGETING::Target* l_masterCore = TARGETING::getMasterCore( ); + assert( l_masterCore != NULL ); + + TARGETING::Target* l_cpu_target = const_cast<TARGETING::Target *> + ( getParentChip( l_masterCore ) ); + + // dump physical path to target + EntityPath l_path; + l_path = l_cpu_target->getAttr<ATTR_PHYS_PATH>(); + l_path.dump(); + + do { + + // cast OUR type of target to a FAPI type of target. + const fapi::Target l_fapi_cpu_target( + TARGET_TYPE_PROC_CHIP, + reinterpret_cast<void *> + (const_cast<TARGETING::Target*> + (l_cpu_target)) ); + + // + // Configure the SLW PORE and related functions to enable idle + // operations + // + FAPI_INVOKE_HWP( l_errl, + p8_poreslw_init, + l_fapi_cpu_target, + PM_INIT ); + if ( l_errl ) + { + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, + "ERROR : p8_poreslw_init, PLID=0x%x", + l_errl->plid() ); + + /*@ + * @errortype + * @reasoncode ISTEP_P8_PORESLW_INIT_FAILED + * @severity ERRORLOG::ERRL_SEV_UNRECOVERABLE + * @moduleid ISTEP_PROC_PORESLW_INIT + * @devdesc call to proc_set_porebar has failed, see + * error log identified by the plid in user + * data section. + */ + l_stepError.addErrorDetails(ISTEP_P8_PORESLW_INIT_FAILED, + ISTEP_PROC_PORESLW_INIT, + l_errl ); + + errlCommit( l_errl, HWPF_COMP_ID ); + } + else + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "SUCCESS : p8_poreslw_init " ); + } + + } while ( 0 ); // end do block + + // @@@@@ END CUSTOM BLOCK: @@@@@ + + + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "call_proc_poreslw_init exit" ); + + // end task, returning any errorlogs to IStepDisp + return l_stepError.getErrorHandle(); +} + + }; // end namespace diff --git a/src/usr/hwpf/hwp/build_winkle_images/build_winkle_images.H b/src/usr/hwpf/hwp/build_winkle_images/build_winkle_images.H index a9145733f..077021be1 100644 --- a/src/usr/hwpf/hwp/build_winkle_images/build_winkle_images.H +++ b/src/usr/hwpf/hwp/build_winkle_images/build_winkle_images.H @@ -58,6 +58,12 @@ * @substepdesc : Tell SLW Eng where winkle image is * @target_sched serial * @} + * @{ + * @substepnum 3 + * @substepname proc_poreslw_init + * @substepdesc : Initialize the PORE-SLW engine + * @target_sched serial + * @} * */ @@ -99,6 +105,19 @@ void* call_host_build_winkle( void *io_pArgs ); void* call_proc_set_pore_bar( void *io_pArgs ); +/** + * @brief proc_poreslw_init + * + * 15.3 : : Initialize the PORE-SLW engine + * + * param[in,out] - pointer to any arguments, usually NULL + * + * return any error logs to istep + * + */ +void* call_proc_poreslw_init( void *io_pArgs ); + + }; // end namespace #endif diff --git a/src/usr/hwpf/hwp/build_winkle_images/makefile b/src/usr/hwpf/hwp/build_winkle_images/makefile index 177b426f3..c91201bd0 100644 --- a/src/usr/hwpf/hwp/build_winkle_images/makefile +++ b/src/usr/hwpf/hwp/build_winkle_images/makefile @@ -40,10 +40,8 @@ EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/build_winkle_images ## NOTE: add a new EXTRAINCDIR when you add a new HWP ## EXAMPLE: ## EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/build_winkle_images/<HWP_dir> -EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/build_winkle_images/proc_slw_build +EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar -EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/build_winkle_images/p8_pba_bar_config -EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/build_winkle_images/proc_gen_cpureg CUSTOMFLAGS+= -D __FAPI @@ -51,24 +49,25 @@ CUSTOMFLAGS+= -D __FAPI ## NOTE: add new object files when you add a new HWP OBJS = build_winkle_images.o \ p8_image_help.o \ - p8_pore_static_data.o \ p8_scan_compression.o \ pore_inline_assembler.o \ - proc_slw_build.o \ + p8_pba_bar_config.o \ sbe_xip_image.o \ + p8_pore_table_static_data.o \ + p8_pore_table_gen_api.o \ + p8_pmc_deconfig_setup.o \ + p8_poreslw_init.o \ p8_set_pore_bar.o \ - p8_pba_bar_config.o + p8_slw_build.o ## NOTE: add a new directory onto the vpaths when you add a new HWP ## EXAMPLE: # VPATH += ${ROOTPATH}/src/usr/hwpf/hwp/build_winkle_images/<HWP_dir> -VPATH += ${ROOTPATH}/src/usr/hwpf/hwp/build_winkle_images/proc_slw_build +VPATH += ${ROOTPATH}/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build VPATH += ${ROOTPATH}/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar -VPATH += ${ROOTPATH}/src/usr/hwpf/hwp/build_winkle_images/p8_pba_bar_config -VPATH += ${ROOTPATH}/src/usr/hwpf/hwp/build_winkle_images/proc_gen_cpureg ## Point to the PORE image in PNOR -BINARY_FILES = $(IMGDIR)/procpore.dat:72cc5bef88f4d55dd9bbc9ad096e7dacff7d46e4 +BINARY_FILES = $(IMGDIR)/procpore.dat:d177d9a2a28f80fc282f09b145d790fa56719ba2 include ${ROOTPATH}/config.mk diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_pba_bar_config/p8_pba_bar_config.C b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pba_bar_config.C index de42e5e61..08b078fe0 100644 --- a/src/usr/hwpf/hwp/build_winkle_images/p8_pba_bar_config/p8_pba_bar_config.C +++ b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pba_bar_config.C @@ -1,7 +1,7 @@ /* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ -/* $Source: src/usr/hwpf/hwp/build_winkle_images/p8_pba_bar_config/p8_pba_bar_config.C $ */ +/* $Source: src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pba_bar_config.C $ */ /* */ /* IBM CONFIDENTIAL */ /* */ diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_pba_bar_config/p8_pba_bar_config.H b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pba_bar_config.H index 69999c759..13d4e5b7a 100644 --- a/src/usr/hwpf/hwp/build_winkle_images/p8_pba_bar_config/p8_pba_bar_config.H +++ b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pba_bar_config.H @@ -1,7 +1,7 @@ /* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ -/* $Source: src/usr/hwpf/hwp/build_winkle_images/p8_pba_bar_config/p8_pba_bar_config.H $ */ +/* $Source: src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pba_bar_config.H $ */ /* */ /* IBM CONFIDENTIAL */ /* */ diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pmc_deconfig_setup.C b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pmc_deconfig_setup.C new file mode 100755 index 000000000..0a9c1fd7f --- /dev/null +++ b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pmc_deconfig_setup.C @@ -0,0 +1,218 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pmc_deconfig_setup.C $ */ +/* */ +/* IBM CONFIDENTIAL */ +/* */ +/* COPYRIGHT International Business Machines Corp. 2012 */ +/* */ +/* p1 */ +/* */ +/* Object Code Only (OCO) source materials */ +/* Licensed Internal Code Source Materials */ +/* IBM HostBoot Licensed Internal Code */ +/* */ +/* The source code for this program is not published or otherwise */ +/* divested of its trade secrets, irrespective of what has been */ +/* deposited with the U.S. Copyright Office. */ +/* */ +/* Origin: 30 */ +/* */ +/* IBM_PROLOG_END_TAG */ +// $Id: p8_pmc_deconfig_setup.C,v 1.4 2012/09/20 12:22:42 stillgs Exp $ +// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_pmc_deconfig_setup.C,v $ +//------------------------------------------------------------------------------ +// *! (C) Copyright International Business Machines Corp. 2011 +// *! All Rights Reserved -- Property of IBM +// *! *** IBM Confidential *** +//------------------------------------------------------------------------------ +// *! OWNER NAME: Greg Still Email: stillgs@us.ibm.com +// *! +/// \file p8_pmc_deconfig_setup.C +/// \brief Setup PMC Deconfig based on EX chiplet enable bit (GP0(0)) +/// +/// +/// High-level procedure flow: +/// \verbatim +/// +/// Loop over Functional EX chiplets +/// { +/// Read GP0(0) +/// if ( clear ) // disabled +/// { +/// Set the respective core bit in PMC_CORE_DECONFIGURATION_REG +/// // Cores are held in 0:15 +/// } +/// } +/// +/// Procedure Prereq: +/// - System clocks are running +/// \endverbatim +/// +//------------------------------------------------------------------------------ + + +// ---------------------------------------------------------------------- +// Includes +// ---------------------------------------------------------------------- +#include <fapi.H> +#include "p8_scom_addresses.H" +#include "p8_pmc_deconfig_setup.H" + +#ifdef FAPIECMD +extern "C" { +#endif + + +using namespace fapi; + +// ---------------------------------------------------------------------- +// Constant definitions +// ---------------------------------------------------------------------- + + +// ---------------------------------------------------------------------- +// Global variables +// ---------------------------------------------------------------------- + + +// ---------------------------------------------------------------------- +// Function prototypes +// ---------------------------------------------------------------------- + + +// ---------------------------------------------------------------------- +// Function definitions +// ---------------------------------------------------------------------- + + +/// \param[in] i_target Chip target + +/// \retval RC_PROCPM_PMC_DECONFIG_NO_CORESPM_PORE if no functional cores +/// are found +ReturnCode +p8_pmc_deconfig_setup(const Target& i_target) +{ + + fapi::ReturnCode l_rc; + uint32_t e_rc = 0; + ecmdDataBufferBase data(64); + ecmdDataBufferBase config_data(64); + std::vector<fapi::Target> l_exChiplets; +// std::vector<Target>::iterator l_itr; + uint8_t l_functional = 0; + uint8_t l_ex_number = 0; + bool core_flag = false; + + + FAPI_INF("Executing p8_pmc_deconfig_setup..."); + + l_rc = fapiGetChildChiplets (i_target, TARGET_TYPE_EX_CHIPLET, l_exChiplets, TARGET_STATE_PRESENT); + if (l_rc) + { + FAPI_ERR("Error from fapiGetChildChiplets!"); + return l_rc; + } + + FAPI_DBG("\tChiplet vector size => %u ", l_exChiplets.size()); + + // Set the buffer to assume that all chiplets are deconfigured. Validly configured + // chiplets will then turn off this deconfiguration. + FAPI_INF("\tAssuming all cores are non-functional"); + e_rc |= config_data.flushTo0(); + e_rc |= config_data.setBit(0, 16); + if (e_rc) + { + FAPI_ERR("Error (0x%x) flushing ecmdDataBufferBase", e_rc); + l_rc.setEcmdError(e_rc); + return l_rc; + } + + // Iterate through the returned chiplets + for (uint8_t j=0; j < l_exChiplets.size(); j++) + { + + // Determine if it's functional + l_rc = FAPI_ATTR_GET(ATTR_FUNCTIONAL, &l_exChiplets[j], l_functional); + if (l_rc) + { + FAPI_ERR("fapiGetAttribute of ATTR_FUNCTIONAL error"); + break; + } + else + { + if ( l_functional ) + { + // Get the core number + l_rc = FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS, &l_exChiplets[j], l_ex_number); + if (l_rc) + { + FAPI_ERR("fapiGetAttribute of ATTR_CHIP_UNIT_POS error"); + break; + } + + l_rc=fapiGetScom(i_target, (EX_GP3_0x100F0012+(l_ex_number*0x01000000)), data); + if(l_rc) + { + FAPI_ERR("GetScom error"); + break; + } + + FAPI_DBG("\tGP0(0) from core %x (@ %08llx) => 0x%16llx", + l_ex_number, + (EX_GP3_0x100F0012+(l_ex_number*0x01000000)), + data.getDoubleWord(0)); + + // Check if chiplet enable bit is set (configured); If so, + // clear the chiplet bit in PMC Core Deconfig Register (0:15) + // indexed by ex number + if ( data.isBitSet(0) ) + { + FAPI_INF("\tSetting Core %X as functional", l_ex_number); + e_rc |= config_data.clearBit(l_ex_number); + if (e_rc) + { + FAPI_ERR("Error (0x%x) setting bit in ecmdDataBufferBase", e_rc); + l_rc.setEcmdError(e_rc); + break; + } + } + core_flag = true; + } + else // Not Functional so skip it + { + // Do nothing + } + } + } + + // If no errors, write the deconfig register + if (!l_rc) + { + if ( core_flag ) + { + l_rc=fapiPutScom(i_target, PMC_CORE_DECONFIG_REG_0x0006200D , config_data); + if(l_rc) + { + FAPI_ERR("PutScom error"); + } + else + { + FAPI_INF("\tWriting PMC Core Deconfig Register with 0x%16llx", config_data.getDoubleWord(0)); + } + } + else + { + FAPI_ERR("No configured cores were detected!"); + FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_PMC_DECONFIG_NO_CORES); + } + } + return l_rc; +} + + + +#ifdef FAPIECMD +} //end extern C +#endif diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pmc_deconfig_setup.H b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pmc_deconfig_setup.H new file mode 100644 index 000000000..652f5772b --- /dev/null +++ b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pmc_deconfig_setup.H @@ -0,0 +1,75 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pmc_deconfig_setup.H $ */ +/* */ +/* IBM CONFIDENTIAL */ +/* */ +/* COPYRIGHT International Business Machines Corp. 2012 */ +/* */ +/* p1 */ +/* */ +/* Object Code Only (OCO) source materials */ +/* Licensed Internal Code Source Materials */ +/* IBM HostBoot Licensed Internal Code */ +/* */ +/* The source code for this program is not published or otherwise */ +/* divested of its trade secrets, irrespective of what has been */ +/* deposited with the U.S. Copyright Office. */ +/* */ +/* Origin: 30 */ +/* */ +/* IBM_PROLOG_END_TAG */ +// $Id: p8_pmc_deconfig_setup.H,v 1.1 2012/09/19 11:43:46 stillgs Exp $ +// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_pmc_deconfig_setup.H,v $ +//------------------------------------------------------------------------------ +// *| +// *! (C) Copyright International Business Machines Corp. 2011 +// *! All Rights Reserved -- Property of IBM +// *! *** IBM Confidential *** +// *| +// *| \file p8_pmc_deconfig_setup.C +// *| \brief Setup PMC Deconfig based on EX chiplet enable bit (GP0(0)) +// *! +// *! OWNER NAME : Greg Still Email: stillgs@us.ibm.com +// *! BACKUP NAME : Pradeep CN Email: pradeepcn@in.ibm.com +// *! +//------------------------------------------------------------------------------ + +#ifndef _PROC_PMCDECONFIG_H_ +#define _PROC_PMCDECONFIG_H_ + +//------------------------------------------------------------------------------ +// Includes +//------------------------------------------------------------------------------ + +// function pointer typedef definition for HWP call support +typedef fapi::ReturnCode (*p8_pmc_deconfig_setup_FP_t) (const fapi::Target&); + +extern "C" { + + +//------------------------------------------------------------------------------ +// Constant definitions +//------------------------------------------------------------------------------ + + +//------------------------------------------------------------------------------ +// Parameter structure definitions +//------------------------------------------------------------------------------ + + +//------------------------------------------------------------------------------ +// Function prototype +//------------------------------------------------------------------------------ +/// \param[in] i_target Chip target + +/// \retval ECMD_SUCCESS if something good happens, +/// \retval BAD_RETURN_CODE otherwise +fapi::ReturnCode +p8_pmc_deconfig_setup(const fapi::Target& i_target); + + +} // extern "C" + +#endif // _PROC_PMCDECONFIG_H_ diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pmc_deconfig_setup_errors.xml b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pmc_deconfig_setup_errors.xml new file mode 100644 index 000000000..669cf8297 --- /dev/null +++ b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pmc_deconfig_setup_errors.xml @@ -0,0 +1,32 @@ +<!-- IBM_PROLOG_BEGIN_TAG --> +<!-- This is an automatically generated prolog. --> +<!-- --> +<!-- $Source: src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pmc_deconfig_setup_errors.xml $ --> +<!-- --> +<!-- IBM CONFIDENTIAL --> +<!-- --> +<!-- COPYRIGHT International Business Machines Corp. 2012 --> +<!-- --> +<!-- p1 --> +<!-- --> +<!-- Object Code Only (OCO) source materials --> +<!-- Licensed Internal Code Source Materials --> +<!-- IBM HostBoot Licensed Internal Code --> +<!-- --> +<!-- The source code for this program is not published or otherwise --> +<!-- divested of its trade secrets, irrespective of what has been --> +<!-- deposited with the U.S. Copyright Office. --> +<!-- --> +<!-- Origin: 30 --> +<!-- --> +<!-- IBM_PROLOG_END_TAG --> +<!-- Error definitions for p8_pmc_deconfig_setup procedure --> +<hwpErrors> + <!-- *********************************************************************** --> + <hwpError> + <rc>RC_PROCPM_PMC_DECONFIG_NO_CORES</rc> + <description>p8_pmc_deconfig_setup did not find any configured core.</description> + </hwpError> + <!-- *********************************************************************** --> + +</hwpErrors> diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_poreslw_errors.xml b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_poreslw_errors.xml new file mode 100644 index 000000000..524927016 --- /dev/null +++ b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_poreslw_errors.xml @@ -0,0 +1,40 @@ +<!-- IBM_PROLOG_BEGIN_TAG --> +<!-- This is an automatically generated prolog. --> +<!-- --> +<!-- $Source: src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_poreslw_errors.xml $ --> +<!-- --> +<!-- IBM CONFIDENTIAL --> +<!-- --> +<!-- COPYRIGHT International Business Machines Corp. 2012 --> +<!-- --> +<!-- p1 --> +<!-- --> +<!-- Object Code Only (OCO) source materials --> +<!-- Licensed Internal Code Source Materials --> +<!-- IBM HostBoot Licensed Internal Code --> +<!-- --> +<!-- The source code for this program is not published or otherwise --> +<!-- divested of its trade secrets, irrespective of what has been --> +<!-- deposited with the U.S. Copyright Office. --> +<!-- --> +<!-- Origin: 30 --> +<!-- --> +<!-- IBM_PROLOG_END_TAG --> +<!-- Error definitions for p8_poreslw procedure --> +<hwpErrors> + <!-- *********************************************************************** --> + <hwpError> + <rc>RC_PROCPM_PORESLW_CODE_BAD_TBA</rc> + <description>Invalid Table Base Address value passed to p8_poreslw_init.</description> + </hwpError> + <!-- *********************************************************************** --> + <hwpError> + <rc>RC_PROCPM_SLW_RESET_TIMEOUT</rc> + <description>SLW reset failed in p8_poreslw_init.</description> + </hwpError> + <!-- *********************************************************************** --> + <hwpError> + <rc>RC_PROCPM_PORESLW_CODE_BAD_MODE</rc> + <description>Unknown mode passed to p8_poreslw_init.</description> + </hwpError> +</hwpErrors> diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_poreslw_init.C b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_poreslw_init.C new file mode 100644 index 000000000..3c9a4f267 --- /dev/null +++ b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_poreslw_init.C @@ -0,0 +1,673 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_poreslw_init.C $ */ +/* */ +/* IBM CONFIDENTIAL */ +/* */ +/* COPYRIGHT International Business Machines Corp. 2012 */ +/* */ +/* p1 */ +/* */ +/* Object Code Only (OCO) source materials */ +/* Licensed Internal Code Source Materials */ +/* IBM HostBoot Licensed Internal Code */ +/* */ +/* The source code for this program is not published or otherwise */ +/* divested of its trade secrets, irrespective of what has been */ +/* deposited with the U.S. Copyright Office. */ +/* */ +/* Origin: 30 */ +/* */ +/* IBM_PROLOG_END_TAG */ +// $Id: p8_poreslw_init.C,v 1.5 2012/10/24 02:32:07 stillgs Exp $ +// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_poreslw_init.C,v $ +//------------------------------------------------------------------------------ +// *! (C) Copyright International Business Machines Corp. 2011 +// *! All Rights Reserved -- Property of IBM +// *! *** IBM Confidential *** +//------------------------------------------------------------------------------ +// *! OWNER NAME: Greg Still Email: stillgs@us.ibm.com +// *! +/// \file p8_poreslw_init.C +/// \brief Configure or reset the SLW PORE and related functions to enable idle +/// operations +/// +/// High-level procedure flow: +/// \verbatim +/// +/// Check for valid parameters +/// if PM_CONFIG { +/// None (see p8_set_pore_bars.C) +/// else if PM_INIT { +/// Synchronize the PMC Deconfiguration Register +/// Activate the PMC Idle seequencer +/// For each functional EX chiplet +/// Clear the OHA Idle State Override +/// Activate the PCBS-PM macro to enable idle operations +/// Clear the OCC Special Wake-up bit that is blocking idles until +/// the SLW image is installed +/// } else if PM_RESET { +/// Set and then reset bit 0 in the SLW_RESET_REGISTER +/// +/// } +/// +/// Procedure Prereq: +/// - System clocks are running +/// \endverbatim +/// +//------------------------------------------------------------------------------ + + +// ---------------------------------------------------------------------- +// Includes +// ---------------------------------------------------------------------- +#include "p8_pm.H" +#include "p8_poreslw_init.H" +#include "p8_pmc_deconfig_setup.H" + +//#ifdef FAPIECMD +extern "C" { +//#endif + + +using namespace fapi; + +// ---------------------------------------------------------------------- +// Constant definitions +// ---------------------------------------------------------------------- + +// ---------------------------------------------------------------------- +// Global variables +// ---------------------------------------------------------------------- + +// ---------------------------------------------------------------------- +// Function prototypes +// ---------------------------------------------------------------------- + +fapi::ReturnCode poreslw_init(const Target& i_target); +fapi::ReturnCode poreslw_reset(const Target& i_target); +fapi::ReturnCode poreslw_ex_setup(const Target& i_target); + +// ---------------------------------------------------------------------- +// Function definitions +// ---------------------------------------------------------------------- + + +/// \param[in] i_target Chip target +/// \param[in] mode Control mode for the procedure +/// (PM_CONFIG, PM_INIT, PM_RESET) + +/// \retval FAPI_RC_SUCCESS +/// \retval ERROR defined in xml + +fapi::ReturnCode +p8_poreslw_init(const Target& i_target, uint32_t mode) +{ + fapi::ReturnCode l_rc; + + FAPI_INF("Executing p8_poreslw_init in mode %x ....", mode); + + /// ------------------------------- + /// Configuration: perform translation of any Platform Attributes + /// into Feature Attributes that are applied during Initalization + if (mode == PM_CONFIG) + { + FAPI_INF("PORE-SLW configuration..."); + FAPI_INF("---> None is defined..."); + } + + /// ------------------------------- + /// Initialization: perform order or dynamic operations to initialize + /// the SLW using necessary Platform or Feature attributes. + else if (mode == PM_INIT) + { + l_rc = poreslw_init(i_target); + } + + /// ------------------------------- + /// Reset: perform reset of SLW engine so that it can reconfigured and + /// reinitialized + else if (mode == PM_RESET) + { + l_rc = poreslw_reset(i_target); + } + + /// ------------------------------- + /// Unsupported Mode + else { + + FAPI_ERR("Unknown mode passed to p8_poreslw_init. Mode %x ....", mode); + FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_PORESLW_CODE_BAD_MODE); + + } + + return l_rc; +} + +//------------------------------------------------------------------------------ +// PORE SLW Initialization Function +//------------------------------------------------------------------------------ +fapi::ReturnCode +poreslw_init(const Target& i_target) +{ + fapi::ReturnCode l_rc; + uint32_t e_rc = 0; + ecmdDataBufferBase data(64); + + FAPI_INF("PORE-SLW initialization..."); + + do + { + // Synchronize the PMC Deconfiguration Register with the currently + // enabled EX chiplets. + FAPI_EXEC_HWP(l_rc, p8_pmc_deconfig_setup, i_target); + if(l_rc) + { + FAPI_ERR("PMC Deconfig Setup error"); + break; + } + + // Activate the PMC Idle seequencer by making sure the Halt bit is clear + const uint32_t HALT_IDLE_STATE_MASTER_FSM = 14; + l_rc = fapiGetScom(i_target, PMC_MODE_REG_0x00062000, data); + if(!l_rc.ok()) + { + FAPI_ERR("Scom error reading PMC_MODE"); + break; + } + + e_rc |= data.clearBit(HALT_IDLE_STATE_MASTER_FSM); + if (e_rc) + { + FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", e_rc); + l_rc.setEcmdError(e_rc); + break; + } + + l_rc = fapiPutScom(i_target, PMC_MODE_REG_0x00062000, data); + if(!l_rc.ok()) + { + FAPI_ERR("Scom error writing PMC_MODE"); + break; + } + + // Setup up each of the EX chiplets + l_rc = poreslw_ex_setup(i_target); + if(!l_rc.ok()) + { + FAPI_ERR("Error from poreslw_ex_setup n"); + break; + } + + } while(0); + + return l_rc; +} + +//------------------------------------------------------------------------------ +// PORE SLW Reset Function +//------------------------------------------------------------------------------ +fapi::ReturnCode +poreslw_reset(const Target& i_target) +{ + fapi::ReturnCode l_rc; + uint32_t e_rc = 0; + ecmdDataBufferBase data(64); + ecmdDataBufferBase polldata(64); + const uint32_t max_polls = 8; + uint32_t poll_count; + bool wait_state_detected; + bool poll_loop_error = false; + + FAPI_INF("PORE-SLW reset..."); + + do + { + // Reset the SLWs using the Reset Register bit 0. + // Note: Resets ALL registers (including debug registers) with the + // exception of Error Maskbuild_node_slw + + // set PORE run bit to stop + l_rc = fapiGetScom(i_target, PORE_SLW_CONTROL_0x00068001, data); + if(!l_rc.ok()) + { + FAPI_ERR("Scom error reading PORE_SLW_CONTROL"); + break; + } + + e_rc |= data.setBit(0); + if (e_rc) + { + FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", e_rc); + l_rc.setEcmdError(e_rc); + break; + } + + l_rc = fapiPutScom(i_target, PORE_SLW_CONTROL_0x00068001, data); + if(!l_rc.ok()) + { + FAPI_ERR("Scom error writing PORE_SLW_CONTROL"); + break; + } + + // Reset PORE (state machines and PIBMS_DBG registers) and PIB2OCI + // interface write Reset_Register(0:1) with 0b11 to trigger the reset. + e_rc |= data.flushTo0(); + e_rc |= data.setBit(0, 2); + if (e_rc) + { + FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", e_rc); + l_rc.setEcmdError(e_rc); + break; + } + + FAPI_DBG("PORE-SLW Reset value: 0x%16llX", data.getDoubleWord(0)); + + l_rc = fapiPutScom(i_target, PORE_SLW_RESET_0x00068002, data); + if(!l_rc.ok()) + { + FAPI_ERR("Scom error writing PORE_SLW_RESET"); + break; + } + + // poll until PORE has returned to WAIT state 3:6=0b0001 + wait_state_detected = false; + for (poll_count=0; poll_count<max_polls; poll_count++) + { + l_rc = fapiGetScom(i_target, PORE_SLW_STATUS_0x00068000, polldata); + if(!l_rc.ok()) + { + FAPI_ERR("Scom error reading PORE_SLW_STATUS"); + poll_loop_error = true; + break; + } + + if(polldata.isBitClear(3, 3) && polldata.isBitSet(6)) + { + wait_state_detected = true; + break; + } + else + { + fapiDelay(1000, 10); + } + } + + // Break if a FAPI error occured in the polling loop + if (poll_loop_error) + { + break; + } + + if(!wait_state_detected) + { + FAPI_ERR("PORE SLW reset failed "); + FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_SLW_RESET_TIMEOUT); + } + + } while (0); + + return l_rc; +} + +//------------------------------------------------------------------------------ +// EX Idle Setup Function +// Note: PMGP0 and OCC Special Wakeup actions could be done with multicast in +// the future. +//------------------------------------------------------------------------------ +fapi::ReturnCode +poreslw_ex_setup(const Target& i_target) +{ + fapi::ReturnCode l_rc; + uint32_t e_rc = 0; + ecmdDataBufferBase data(64); + ecmdDataBufferBase config_data(64); + ecmdDataBufferBase set_data(64); + ecmdDataBufferBase clear_data(64); + std::vector<fapi::Target> l_exChiplets; + uint8_t l_functional = 0; + uint8_t l_ex_number = 0; + bool core_flag = false; + bool error_flag = false; + + uint8_t pm_sleep_type; + uint8_t pm_sleep_entry ; + uint8_t pm_sleep_exit ; + uint8_t pm_winkle_type ; + uint8_t pm_winkle_entry ; + uint8_t pm_winkle_exit ; + + // Give relevant bits a name + // PMGP1 bits + const uint32_t PM_SLEEP_POWER_DOWN_EN_BIT = 0; + const uint32_t PM_SLEEP_POWER_UP_EN_BIT = 1; + const uint32_t PM_SLEEP_POWER_OFF_SEL_BIT = 2; + const uint32_t PM_WINKLE_POWER_DOWN_EN_BIT = 3; + const uint32_t PM_WINKLE_POWER_UP_EN_BIT = 4; + const uint32_t PM_WINKLE_POWER_OFF_SEL_BIT = 5; + + const uint32_t IDLE_STATE_OVERRIDE_EN = 6; + const uint32_t PM_DISABLE = 0; + + do + { + + FAPI_INF("Executing poreslw_ex_setup..."); + + l_rc = fapiGetChildChiplets (i_target, TARGET_TYPE_EX_CHIPLET, l_exChiplets, TARGET_STATE_PRESENT); + if (l_rc) + { + FAPI_ERR("Error from fapiGetChildChiplets!"); + error_flag = true; + break; + } + + FAPI_DBG("\tChiplet vector size => %u ", l_exChiplets.size()); + + + // Iterate through the returned chiplets + for (uint8_t j=0; j < l_exChiplets.size(); j++) + { + + // Determine if it's functional + l_rc = FAPI_ATTR_GET(ATTR_FUNCTIONAL, &l_exChiplets[j], l_functional); + if (l_rc) + { + FAPI_ERR("fapiGetAttribute of ATTR_FUNCTIONAL error"); + break; + } + else + { + if ( l_functional ) + { + + // Get the core number + l_rc = FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS, &l_exChiplets[j], l_ex_number); + if(!l_rc.ok()) + { + FAPI_ERR("fapiGetAttribute of ATTR_CHIP_UNIT_POS error"); + break; + } + + l_rc=fapiGetScom(i_target, (EX_GP3_0x100F0012+(l_ex_number*0x01000000)), data); + if(l_rc) + { + FAPI_ERR("GetScom error"); + break; + } + + // Check if chiplet enable bit is set (configured). If so, process + if ( data.isBitSet(0) ) + { + FAPI_INF("\tSetting up Core %X ", l_ex_number); + + // -------------------------------------- + // Based on Attributes, set the idle handling controls + + // e_rc = FAPI_ATTR_GET(ATTR_PM_SLEEP_TYPE, &i_target, pm_sleep_type); + // if (e_rc) + // { + // FAPI_ERR("fapiGetAttribute of ATTR_PM_SLEEP_TYPE with e_rc = 0x%x", (uint32_t)e_rc); + // break; + // } + // + // e_rc = FAPI_ATTR_GET(ATTR_PM_SLEEP_ENTRY, &i_target, pm_sleep_entry); + // if (e_rc) + // { + // FAPI_ERR("fapiGetAttribute of ATTR_PM_SLEEP_ENTRY with e_rc = 0x%x", (uint32_t)e_rc); + // break; + // } + // + // e_rc = FAPI_ATTR_GET(ATTR_PM_SLEEP_EXIT, &i_target, pm_sleep_exit); + // if (e_rc) + // { + // FAPI_ERR("fapiGetAttribute of ATTR_PM_SLEEP_EXIT with e_rc = 0x%x", (uint32_t)e_rc); + // break; + // } + // + // e_rc = FAPI_ATTR_GET(ATTR_PM_WINKLE_TYPE, &i_target, pm_winkle_type); + // if (e_rc) + // { + // FAPI_ERR("fapiGetAttribute of ATTR_PM_WINKLE_TYPE with e_rc = 0x%x", (uint32_t)e_rc); + // break; + // } + // \todo missing attributes + // e_rc = FAPI_ATTR_GET("ATTR_PM_WINKLE_ENTRY", &i_target,(unit8_t) pm_winkle_entry); + // if (e_rc) + // { + // FAPI_ERR("fapiGetAttribute of ATTR_PM_WINKLE_ENTRY with e_rc = 0x%x", (uint32_t)e_rc); + // break; + // } + // + // e_rc = FAPI_ATTR_GET("ATTR_PM_WINKLE_EXIT", &i_target,(unit8_t) pm_winkle_exit); + // if (e_rc) + // { + // FAPI_ERR("fapiGetAttribute of ATTR_PM_WINKLE_EXIT with e_rc = 0x%x", (uint32_t)e_rc); + // break; + // } + + // \todo Hardcoded values until platform control of attributes is in place. + FAPI_INF("\tWARNING: !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!"); + FAPI_INF("\tWARNING: Hardcoded idle config values set until platform support of attributes available"); + FAPI_INF("\tWARNING: !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!"); + + + pm_sleep_entry = 1; // 0=HW, 1=assisted + pm_sleep_exit = 1; // 0=HW, 1=assisted + pm_sleep_type = 1; // 0=fast, 1=deep + + pm_winkle_entry = 1; // 0=HW, 1=assisted + pm_winkle_exit = 1; // 0=HW, 1=assisted + pm_winkle_type = 1; // 0=fast, 1=deep + + + // ****************************************************************** + // Set PMGP1_REG + // ****************************************************************** + + FAPI_DBG("\t-----------------------------------------------------"); + FAPI_DBG("\tPMGP1_REG Configuration "); + FAPI_DBG("\t-----------------------------------------------------"); + FAPI_DBG("\t pm_sleep_entry => %d ", pm_sleep_entry ); + FAPI_DBG("\t pm_sleep_exit => %d ", pm_sleep_exit ); + FAPI_DBG("\t pm_sleep_type => %d ", pm_sleep_type ); + FAPI_DBG("\t pm_winkle_entry => %d ", pm_winkle_entry ); + FAPI_DBG("\t pm_winkle_exit => %d ", pm_winkle_exit ); + FAPI_DBG("\t pm_winkle_type => %d ", pm_winkle_type ); + FAPI_DBG("\t-----------------------------------------------------"); + + + FAPI_DBG("\t*************************************"); + FAPI_INF("\tSetup PMGP1_REG for EX %x", l_ex_number); + FAPI_DBG("\t*************************************"); + + // rc = fapiGetScom(i_target, EX_PMGP1_REG_0_RWXx100F0103 + (l_ex_number * 0x01000000) , data); + // if (l_rc) + // break; + // FAPI_DBG(" Pre write content of EX_PMGP1_REG_0_RWXx1*0F0103 , Loop: %d : %016llX", c, data.getDoubleWord(0) ); + + // Initialize the set and clear vectors + e_rc |= clear_data.flushTo1(); // Set to 1s to be used for WAND + e_rc |= set_data.flushTo0(); // Set to 0s to be used for WOR + + // If sleep entry = 1 (assisted), sleep power down enable = 0 + // else sleep entry = 0 (hardware), sleep power down enable = 1 + if (pm_sleep_entry) + { + e_rc |= clear_data.clearBit(PM_SLEEP_POWER_DOWN_EN_BIT); + + } + else + { + e_rc |= set_data.setBit(PM_SLEEP_POWER_DOWN_EN_BIT); + } + + // If sleep exit = 1 (assisted), sleep power up enable = 0 + // else sleep exit = 0 (hardware), sleep power up enable = 1 + if (pm_sleep_exit) + { + e_rc |= clear_data.clearBit(PM_SLEEP_POWER_UP_EN_BIT); + + } + else + { + e_rc |= set_data.setBit(PM_SLEEP_POWER_UP_EN_BIT); + } + + // If sleep type = 1 (deep), sleep power up sel = 1 + // else sleep type = 0 (fast), sleep power up sel = 0 + if (pm_sleep_type) + { + e_rc |= set_data.setBit(PM_SLEEP_POWER_OFF_SEL_BIT); + + } + else + { + e_rc |= clear_data.clearBit(PM_SLEEP_POWER_OFF_SEL_BIT); + } + + // If winkle entry = 1 (assisted), winkle power down enable = 0 + // else winkle entry = 0 (hardware), winkle power down enable = 1 + if (pm_winkle_entry) + { + e_rc |= clear_data.clearBit(PM_WINKLE_POWER_DOWN_EN_BIT); + + } + else + { + e_rc |= set_data.setBit(PM_WINKLE_POWER_DOWN_EN_BIT); + } + + // If winkle exit = 1 (assisted), winkle power up enable = 0 + // else winkle exit = 0 (hardware), winkle power up enable = 1 + if (pm_winkle_exit) + { + e_rc |= clear_data.clearBit(PM_WINKLE_POWER_UP_EN_BIT); + + } + else + { + e_rc |= set_data.setBit(PM_WINKLE_POWER_UP_EN_BIT); + } + + // If winkle type = 1 (deep), winkle power up sel = 1 + // else winkle type = 0 (fast), winkle power up sel = 0 + if (pm_winkle_type) + { + e_rc |= set_data.setBit(PM_WINKLE_POWER_OFF_SEL_BIT); + + } + else + { + e_rc |= clear_data.clearBit(PM_WINKLE_POWER_OFF_SEL_BIT); + } + + // Check for any errors from set/clear ops into the buffers + if (e_rc) + { + FAPI_ERR("eCmdDataBuffer operation failed. rc = 0x%x", (uint32_t)e_rc); + l_rc.setEcmdError(e_rc); + break; + } + + // The set and clear vectors are built. Write them to + // the respective addresses. + FAPI_DBG("\tEX_PMGP1_WOR 0x%16llx" , set_data.getDoubleWord(0)); + l_rc = fapiPutScom(i_target, EX_PMGP1_REG_0_WORx100F0105+ (l_ex_number * 0x01000000), set_data); + if (l_rc) + { + FAPI_ERR("fapiPutScom(EX_PMGP1_REG_0_WORx100F0105) failed. l_rc = 0x%x", (uint32_t)l_rc); + break; + } + + FAPI_DBG("\tEX_PMGP1_WAND 0x%16llx" , clear_data.getDoubleWord(0)); + l_rc = fapiPutScom(i_target, EX_PMGP1_REG_0_WANDx100F0104 + (l_ex_number * 0x01000000) , clear_data); + if (l_rc) + { + FAPI_ERR("fapiPutScom(EX_PMGP1_REG_0_WORx100F0105) failed. l_rc = 0x%x", (uint32_t)l_rc); + break; + } + + // -------------------------------------- + // Clear the OHA Idle State Override + FAPI_INF("\tClear the OHA Idle State Override for EX %x", l_ex_number); + + l_rc = fapiGetScom(l_exChiplets[j], EX_OHA_MODE_REG_RWx1002000D, data); + if(!l_rc.ok()) + { + FAPI_ERR("Scom error reading OHA_MODE"); + break; + } + + e_rc |= data.clearBit(IDLE_STATE_OVERRIDE_EN); + if (e_rc) + { + FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", e_rc); + l_rc.setEcmdError(e_rc); + break; + } + + l_rc = fapiPutScom(l_exChiplets[j], EX_OHA_MODE_REG_RWx1002000D, data); + if(!l_rc.ok()) + { + FAPI_ERR("Scom error writing OHA_MODE"); + break; + } + + // -------------------------------------- + // Activate the PCBS-PM macro by clearing the PM_DISABLE bit + FAPI_INF("\tActivate the PCBS-PM for EX %x", l_ex_number); + + e_rc |= data.flushTo1(); + e_rc |= data.clearBit(PM_DISABLE); + if (e_rc) + { + FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", e_rc); + l_rc.setEcmdError(e_rc); + break; + } + + l_rc = fapiPutScom(i_target, EX_PMGP0_AND_0x100F0101+(l_ex_number*0x01000000), data); + if(!l_rc.ok()) + { + FAPI_ERR("Scom error writing EX_PMGP0_OR"); + break; + } + + // -------------------------------------- + // Clear OCC Special Wake-up bit - only 1 bit in the register + FAPI_INF("\tClear OCC Special Wake-up for EX %x", l_ex_number); + e_rc |= data.flushTo0(); + if (e_rc) + { + FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", e_rc); + l_rc.setEcmdError(e_rc); + break; + } + + l_rc = fapiPutScom(i_target, EX_PMSpcWkupOCC_REG_0x100F010C+(l_ex_number*0x01000000), data); + if(!l_rc.ok()) + { + FAPI_ERR("Scom error clearing EX_OCC_SPWKUP"); + break; + } + + core_flag = true; + } // Chiplet Enabled + } + else // Not Functional so skip it + { + // Do nothing + } + } + } // chiplet loop + + } while(0); + + return l_rc; +} + + +} //end extern + diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_poreslw_init.H b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_poreslw_init.H new file mode 100644 index 000000000..ab0e7ed4a --- /dev/null +++ b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_poreslw_init.H @@ -0,0 +1,78 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_poreslw_init.H $ */ +/* */ +/* IBM CONFIDENTIAL */ +/* */ +/* COPYRIGHT International Business Machines Corp. 2012 */ +/* */ +/* p1 */ +/* */ +/* Object Code Only (OCO) source materials */ +/* Licensed Internal Code Source Materials */ +/* IBM HostBoot Licensed Internal Code */ +/* */ +/* The source code for this program is not published or otherwise */ +/* divested of its trade secrets, irrespective of what has been */ +/* deposited with the U.S. Copyright Office. */ +/* */ +/* Origin: 30 */ +/* */ +/* IBM_PROLOG_END_TAG */ +// $Id: p8_poreslw_init.H,v 1.1 2012/08/23 04:58:51 stillgs Exp $ +// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_poreslw_init.H,v $ +//------------------------------------------------------------------------------ +// *| +// *! (C) Copyright International Business Machines Corp. 2011 +// *! All Rights Reserved -- Property of IBM +// *! *** IBM Confidential *** +// *| +// *! TITLE : p8_poreslw_init.H +// *! DESCRIPTION : Initialize the PORE SLW Engines in the OCC +// *! +// *! OWNER NAME : Greg Still Email: stillgs@us.ibm.com +// *! BACKUP NAME : Jim Yacynych Email: jimyac@us.ibm.com +// *! +//------------------------------------------------------------------------------ + +#ifndef _P8_PORESLW_H_ +#define _P8_PORESLW_H_ + +//------------------------------------------------------------------------------ +// Includes +//------------------------------------------------------------------------------ + + +// function pointer typedef definition for HWP call support +typedef fapi::ReturnCode (*p8_poreslw_init_FP_t) (const fapi::Target&, uint32_t); + +extern "C" { + + +//------------------------------------------------------------------------------ +// Constant definitions +//------------------------------------------------------------------------------ + + +//------------------------------------------------------------------------------ +// Parameter structure definitions +//------------------------------------------------------------------------------ + + + +//------------------------------------------------------------------------------ +// Function prototype +//------------------------------------------------------------------------------ +/// \param[in] i_target Chip target +/// \param[in] mode Control mode for the procedure (PM_CONFIG, PM_INIT, PM_RESET) + +/// \retval ECMD_SUCCESS if something good happens, +/// \retval BAD_RETURN_CODE otherwise +fapi::ReturnCode +p8_poreslw_init(const fapi::Target& i_target, uint32_t mode); + + +} // extern "C" + +#endif // _P8_PORESLW_H_ diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_set_pore_bar.C b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_set_pore_bar.C index 03b6e795a..fabf56d25 100644 --- a/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_set_pore_bar.C +++ b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_set_pore_bar.C @@ -37,8 +37,8 @@ /// \verbatim /// /// Address and size of SLW image for the target (chip) is passed based on -/// where the caller has placed the image for this target in the platform -/// memory. +/// where the caller has placed the image for this target in the platform +/// memory. /// /// The Base Address (BAR) and a mask for the region in which the SLW /// image is placed is passed. This is used to establish the PBA BAR and @@ -120,8 +120,8 @@ fapi::ReturnCode pba_slave_reset( const fapi::Target& i_target, /// located /// \param[in] i_mem_bar Base address of the region where image is located /// \param[in] i_mem_size Size (in MB) of the region where image is located -/// if not a power of two value, the value will be -/// rounded up to the next power of 2 for setting the +/// if not a power of two value, the value will be +/// rounded up to the next power of 2 for setting the /// hardware mask /// \param[in] i_mem_type Defines where the SLW image was loaded. See /// p8_set_pore_bar.H enum for valid values. @@ -153,7 +153,7 @@ p8_set_pore_bar( const fapi::Target& i_target, // uint64_t computed_last_image_address; uint64_t slw_branch_table_address; - + pba_slvctln_t ps; // PBA Slave // Hardcoded use of PBA BAR and Slave @@ -230,8 +230,8 @@ p8_set_pore_bar( const fapi::Target& i_target, return rc; } FAPI_INF("SLW PORE Table Base Address set to 0x%16llx", data.getDoubleWord(0)); - - + + // Setup the memory relocation register // @@ -315,16 +315,16 @@ p8_set_pore_bar( const fapi::Target& i_target, } FAPI_DBG("SLW PORE Memory Relocation Register after MEM 0x%16llx", data.getDoubleWord(0)); - + // Check that the bar address passed is 1MB aligned (eg bits 44:63 are zero) // region_masked_address = i_mem_bar & 0x00000000000FFFFF; - if (region_masked_address != 0 ) - { - FAPI_ERR("SLW BAR address is not 1MB aligned: 0x%16llx", i_mem_bar ); - FAPI_SET_HWP_ERROR(rc, RC_PROCPM_POREBAR_PBABAR_ERROR); - return rc; - } + if (region_masked_address != 0 ) + { + FAPI_ERR("SLW BAR address is not 1MB aligned: 0x%16llx", i_mem_bar ); + FAPI_SET_HWP_ERROR(rc, RC_PROCPM_POREBAR_PBABAR_ERROR); + return rc; + } // The PBA Mask indicates which bits from 23:43 (1MB grandularity) are @@ -397,7 +397,7 @@ p8_set_pore_bar( const fapi::Target& i_target, FAPI_SET_HWP_ERROR(rc, RC_PROCPM_POREBAR_LOC_ERROR); return rc; } - + FAPI_INF("SLW PORE Memory Relocation Register set to 0x%16llx", data.getDoubleWord(0)); rc = fapiPutScom(i_target, PORE_SLW_MEMORY_RELOC_0x00068016, data); if (rc) @@ -405,7 +405,7 @@ p8_set_pore_bar( const fapi::Target& i_target, FAPI_ERR("Put SCOM error for Memory Relocation Address"); return rc; } - + FAPI_DBG("Calling pba_bar_config to BAR %x Addr: 0x%16llX Size: 0x%16llX", pba_bar, i_mem_bar, i_mem_size); @@ -449,7 +449,7 @@ p8_set_pore_bar( const fapi::Target& i_target, l_ecmdRc |= data.setBit(5,3); // Allocate read buffer l_ecmdRc |= data.setBit(5,3); // Care mask-only PORE-SLW */ - + // Slave 2 (PORE-SLW). This is a read/write slave. Write gathering is // allowed, but with the shortest possible timeout. The slave is set up // to allow normal reads and writes at initialization. The 24x7 code may @@ -464,7 +464,7 @@ p8_set_pore_bar( const fapi::Target& i_target, return rc; } - + ps.value = 0; ps.fields.enable = 1; ps.fields.mid_match_value = OCI_MASTER_ID_PORE_SLW; @@ -477,7 +477,7 @@ p8_set_pore_bar( const fapi::Target& i_target, ps.fields.buf_alloc_b = 1; ps.fields.buf_alloc_c = 1; ps.fields.buf_alloc_w = 1; - + l_ecmdRc |= data.setDoubleWord(0, ps.value); if(l_ecmdRc) { @@ -497,7 +497,7 @@ p8_set_pore_bar( const fapi::Target& i_target, return rc; } -/// Reset a PBA slave with explicit timeout. +/// Reset a PBA slave with explicit timeout. /// /// \param id A PBA slave id in the range 0..3 /// @@ -515,23 +515,23 @@ p8_set_pore_bar( const fapi::Target& i_target, fapi::ReturnCode pba_slave_reset(const fapi::Target& i_target, uint32_t id) { - + uint32_t poll_count = 0; pba_slvrst_t psr; fapi::ReturnCode rc; uint32_t l_ecmdRc = 0; ecmdDataBufferBase data(64); - + // Tell PBA to reset the slave, then poll for completion with timeout. // The PBA is always polled at least twice to guarantee that we always // poll once after a timeout. psr.value = 0; psr.fields.set = PBA_SLVRST_SET(id); - + FAPI_DBG(" PBA_SLVRST%x: 0x%16llx", id, psr.value); - + l_ecmdRc |= data.setDoubleWord(0, psr.value); if(l_ecmdRc) { @@ -539,15 +539,15 @@ pba_slave_reset(const fapi::Target& i_target, uint32_t id) rc.setEcmdError(l_ecmdRc); return rc; } - + rc = fapiPutScom(i_target, PBA_SLVRST_0x00064001, data); if (rc) { FAPI_ERR("Put SCOM error for PBA Slave Reset"); return rc; } - - do + + do { rc = fapiGetScom(i_target, PBA_SLVRST_0x00064001, data); if (rc) @@ -563,20 +563,20 @@ pba_slave_reset(const fapi::Target& i_target, uint32_t id) rc.setEcmdError(l_ecmdRc); return rc; } - - - if (!(psr.fields.in_prog & PBA_SLVRST_IN_PROG(id))) + + + if (!(psr.fields.in_prog & PBA_SLVRST_IN_PROG(id))) { break; } - + poll_count++; - if (poll_count == PBA_SLAVE_RESET_TIMEOUT) + if (poll_count == PBA_SLAVE_RESET_TIMEOUT) { FAPI_SET_HWP_ERROR(rc, RC_PROCPM_PBA_SLVRST_TIMED_OUT); break; } - + } while (1); return rc; diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/sbe_xip_image.h b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/sbe_xip_image.h deleted file mode 100644 index 7a83c2aea..000000000 --- a/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/sbe_xip_image.h +++ /dev/null @@ -1,1751 +0,0 @@ -/* IBM_PROLOG_BEGIN_TAG - * This is an automatically generated prolog. - * - * $Source: src/usr/hwpf/hwp/build_winkle_images/proc_set_pore_bar/sbe_xip_image.h $ - * - * IBM CONFIDENTIAL - * - * COPYRIGHT International Business Machines Corp. 2012 - * - * p1 - * - * Object Code Only (OCO) source materials - * Licensed Internal Code Source Materials - * IBM HostBoot Licensed Internal Code - * - * The source code for this program is not published or other- - * wise divested of its trade secrets, irrespective of what has - * been deposited with the U.S. Copyright Office. - * - * Origin: 30 - * - * IBM_PROLOG_END_TAG - */ -#ifndef __SBE_XIP_IMAGE_H -#define __SBE_XIP_IMAGE_H - -// $Id: sbe_xip_image.h,v 1.18 2012/07/06 20:03:09 bcbrock Exp $ -// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/sbe/sbe_xip_image.h,v $ -//----------------------------------------------------------------------------- -// *! (C) Copyright International Business Machines Corp. 2011 -// *! All Rights Reserved -- Property of IBM -// *! *** IBM Confidential *** -//----------------------------------------------------------------------------- -// *! OWNER NAME: Bishop Brock Email: bcbrock@us.ibm.com -//------------------------------------------------------------------------------ - -/// \file sbe_xip_image.h -/// \brief Everything related to creating and manipulating SBE-XIP binary -/// images. - -#include "fapi_sbe_common.H" - -/// Current version (fields, layout, sections) of the SBE_XIP header -/// -/// If any changes are made to this file or to sbe_xip_header.H, please update -/// the header version and follow-up on all of the error messages. - -#define SBE_XIP_HEADER_VERSION 8 - -/// \defgroup sbe_xip_magic_numbers SBE-XIP magic numbers -/// -/// An SBE-XIP magic number is a 64-bit constant. The 4 high-order bytes -/// contain the ASCII characters "XIP " and identify the image as an SBE-XIP -/// image, while the 4 low-order bytes identify the type of the image. -/// -/// @{ - -#define SBE_XIP_MAGIC 0x58495020 // "XIP " -#define SBE_BASE_MAGIC ULL(0x5849502042415345) // "XIP BASE" -#define SBE_SEEPROM_MAGIC ULL(0x584950205345504d) // "XIP SEPM" -#define SBE_CENTAUR_MAGIC ULL(0x58495020434e5452) // "XIP CNTR" - -/// @} - - -/// \defgroup sbe_xip_sections SBE-XIP Image Section Indexes -/// -/// These constants define the order that the SbeXipSection structures appear -/// in the header, which is not necessarily the order the sections appear in -/// the binary image. Given that SBE-XIP image contents are tightly -/// controlled, we use this simple indexing scheme for the allowed sections -/// rather than a more general approach, e.g., allowing arbitrary sections -/// identified by their names. -/// -/// @{ - -// -*- DO NOT REORDER OR EDIT THIS SET OF CONSTANTS WITHOUT ALSO EDITING -*- -// -*- THE ASSEMBLER LAYOUT IN sbe_xip_header.S. -*- - -#define SBE_XIP_SECTION_HEADER 0 -#define SBE_XIP_SECTION_FIXED 1 -#define SBE_XIP_SECTION_FIXED_TOC 2 -#define SBE_XIP_SECTION_IPL_TEXT 3 -#define SBE_XIP_SECTION_IPL_DATA 4 -#define SBE_XIP_SECTION_TEXT 5 -#define SBE_XIP_SECTION_DATA 6 -#define SBE_XIP_SECTION_TOC 7 -#define SBE_XIP_SECTION_STRINGS 8 -#define SBE_XIP_SECTION_HALT 9 -#define SBE_XIP_SECTION_PIBMEM0 10 -#define SBE_XIP_SECTION_PIBMEM1 11 -#define SBE_XIP_SECTION_RINGS 12 -#define SBE_XIP_SECTION_SLW 13 -#define SBE_XIP_SECTION_RESERVED_1 14 -#define SBE_XIP_SECTION_RESERVED_0 15 - -#define SBE_XIP_SECTIONS 16 - -/// @} - -#ifndef __ASSEMBLER__ - -/// Applications can expand this macro to create an array of section names. -#define SBE_XIP_SECTION_NAMES(var) \ - const char* var[] = { \ - ".header", \ - ".fixed", \ - ".fixed_toc", \ - ".ipl_text", \ - ".ipl_data", \ - ".text", \ - ".data", \ - ".toc", \ - ".strings", \ - ".halt", \ - ".pibmem0", \ - ".pibmem1", \ - ".rings", \ - ".slw", \ - ".reserved_1", \ - ".reserved_0" \ - } - -/// Applications can use this macro to safely index the array of section -/// names. -#define SBE_XIP_SECTION_NAME(var, n) \ - ((((n) < 0) || ((n) > (int)(sizeof(var) / sizeof(char*)))) ? \ - "Bug : Invalid SBE-XIP section name" : var[n]) - - -#endif /* __ASSEMBLER__ */ - - -/// Maximum section alignment for SBE-XIP sections -#define SBE_XIP_MAX_SECTION_ALIGNMENT 128 - -/// \defgroup sbe_xip_toc_types SBE-XIP Table of Contents data types -/// -/// These are the data types stored in the \a iv_type field of the SbeXipToc -/// objects. These must be defined as manifest constants because they are -/// required to be recognized as manifest constants in C (as opposed to C++) -/// code. -/// -/// NB: The 0x0 code is purposefully left undefined to catch bugs. -/// -/// @{ - -/// Data is a single unsigned byte -#define SBE_XIP_UINT8 0x01 - -/// Data is a 32-bit unsigned integer -#define SBE_XIP_UINT32 0x02 - -/// Data is a 64-bit unsigned integer -#define SBE_XIP_UINT64 0x03 - -/// Data is a 0-byte terminated ASCII string -#define SBE_XIP_STRING 0x04 - -/// Data is an address -#define SBE_XIP_ADDRESS 0x05 - -/// The maximum type number -#define SBE_XIP_MAX_TYPE_INDEX 0x05 - -/// Applications can expand this macro to get access to string forms of the -/// SBE-XIP data types if desired. -#define SBE_XIP_TYPE_STRINGS(var) \ - const char* var[] = { \ - "Illegal 0 Code", \ - "SBE_XIP_UINT8", \ - "SBE_XIP_UINT32", \ - "SBE_XIP_UINT64", \ - "SBE_XIP_STRING", \ - "SBE_XIP_ADDRESS", \ - } - -/// Applications can expand this macro to get access to abbreviated string -/// forms of the SBE-XIP data types if desired. -#define SBE_XIP_TYPE_ABBREVS(var) \ - const char* var[] = { \ - "Illegal 0 Code", \ - "u8 ", \ - "u32", \ - "u64", \ - "str", \ - "adr", \ - } - -/// Applications can use this macro to safely index either array of SBE-XIP -/// type strings. -#define SBE_XIP_TYPE_STRING(var, n) \ - (((n) > (sizeof(var) / sizeof(char*))) ? \ - "Invalid SBE-XIP type specification" : var[n]) - -/// @} - - -/// Final alignment constraint for SBE-XIP images. -/// -/// PORE images are required to be multiples of 8 bytes in length, to -/// gaurantee that the PoreVe will be able to complete any 8-byte load/store. -#define SBE_XIP_FINAL_ALIGNMENT 8 - - -//////////////////////////////////////////////////////////////////////////// -// C Definitions -//////////////////////////////////////////////////////////////////////////// - -#ifndef __ASSEMBLER__ - -#include <stdint.h> - -#ifdef __cplusplus -extern "C" { -#endif -#if 0 -} /* So __cplusplus doesn't mess w/auto-indent */ -#endif - -/// SBE-XIP Section information -/// -/// This structure defines the data layout of section table entries in the -/// SBE-XIP image header. - -// -*- DO NOT REORDER OR EDIT THIS STRUCTURE DEFINITION WITHOUT ALSO -*- -// -*- EDITING THE ASSEMBLER LAYOUT IN sbe_xip_header.H -*- - -typedef struct { - - /// The offset (in bytes) of the section from the beginning of the image - /// - /// In normalized images the section offset will always be 0 if the - /// section size is also 0. - uint32_t iv_offset; - - /// The size of the section in bytes, exclusive of alignment padding - /// - /// This is the size of the program-significant data in the section, - /// exclusive of any alignment padding or reserved or extra space. The - /// alignment padding (reserved space) is not represented explicitly, but - /// is only implied by the offset of any subsequent non-empty section, or - /// in the case of the final section in the image, the image size. - /// - /// Regardless of the \a iv_offset, if the \a iv_size of a section is 0 it - /// should be considered "not present" in the image. In normalized images - /// the section offset will always be 0 if the section size is also 0. - uint32_t iv_size; - - /// The required initial alignment for the section offset - /// - /// The PORE and the applications using SBE-XIP images have strict - /// alignment/padding requirements. The PORE does not handle any type of - /// unaligned instruction or data fetches. Some sections and subsections - /// must also be POWER cache-line aligned. The \a iv_alignment applies to - /// the first byte of the section. PORE images are also required to be - /// multiples of 8 bytes in length, to gaurantee that the PoreVe will be - /// able to complete any 8-byte load/store. These constraints are checked - /// by sbe_xip_validate() and enforced by sbe_xip_append(). The alignment - /// constraints may force a section to be padded, which may create "holes" - /// in the image as explained in the comments for the \a iv_size field. - /// - /// Note that alignment constraints are always checked relative to the - /// first byte of the image for in-memory images, not relative to the host - /// address. Alignment specifications are required to be a power-of-2. - uint8_t iv_alignment; - - /// Reserved structure alignment padding; Pad to 12 bytes - uint8_t iv_reserved8[3]; - -} SbeXipSection; - -/// The SbeXipSection structure is created by assembler code and is expected -/// to have the same size in C code. This constraint is checked in -/// sbe_xip_validate(). -#define SIZE_OF_SBE_XIP_SECTION 12 - - -/// SBE-XIP binary image header -/// -/// This header occupies the initial bytes of an SBE-XIP binary image. -/// The header contents are documented here, however the structure is actually -/// defined in the file sbe_xip_header.S, and these two definitions must be -/// kept consistent. -/// -/// The header is a fixed-format representation of the most critical -/// information about the image. The large majority of information about the -/// image and its contents are available through the searchable table of -/// contents. PORE code itself normally accesses the data directly through -/// global symbols. -/// -/// The header only contains information 1) required by OTPROM code (e.g., the -/// entry point); 2) required by search and updating APIs (e.g., the -/// locations and sizes of all of the sections.); a few pieces of critical -/// meta-data (e.g., information about the image build process). -/// -/// Any entries that are accessed by PORE code are required to be 64 bits, and -/// will appear at the beginning of the header. -/// -/// The header also contains bytewise offsets and sizes of all of the sections -/// that are assembled to complete the image. The offsets are relative to the -/// start of the image (where the header is loaded). The sizes include any -/// padding inserted by the link editor to guarantee section alignment. -/// -/// Every field of the header is also accesssible through the searchable table -/// of contents as documented in sbe_xip_header.S. - -// -*- DO NOT REORDER OR EDIT THIS STRUCTURE DEFINITION WITHOUT ALSO -*- -// -*- EDITING THE ASSEMBLER LAYOUT IN sbe_xip_header.S, AND WITHOUT -*- -// -*- UPDATING THE sbe_xip_translate_header() API IN sbe_xip_image.c. -*- - -typedef struct { - - ////////////////////////////////////////////////////////////////////// - // Identification - 8-byte aligned; 8 entries - ////////////////////////////////////////////////////////////////////// - - /// Contains SBE_XIP_MAGIC to identify an SBE-XIP image - uint64_t iv_magic; - - /// The offset of the SBE-XIP entry point from the start of the image - uint64_t iv_entryOffset; - - /// The base address used to link the image, as a full relocatable PORE - /// address - uint64_t iv_linkAddress; - - /// Reserved for future expansion - uint64_t iv_reserved64[5]; - - ////////////////////////////////////////////////////////////////////// - // Section Table - 4-byte aligned; 16 entries - ////////////////////////////////////////////////////////////////////// - - SbeXipSection iv_section[SBE_XIP_SECTIONS]; - - ////////////////////////////////////////////////////////////////////// - // Other information - 4-byte aligned; 8 entries - ////////////////////////////////////////////////////////////////////// - - /// The size of the image (including padding) in bytes - uint32_t iv_imageSize; - - /// Build date generated by `date +%Y%m%d`, e.g., 20110630 - uint32_t iv_buildDate; - - /// Build time generated by `date +%H%M`, e.g., 0756 - uint32_t iv_buildTime; - - /// Reserved for future expansion - uint32_t iv_reserved32[5]; - - ////////////////////////////////////////////////////////////////////// - // Other Information - 1-byte aligned; 8 entries - ////////////////////////////////////////////////////////////////////// - - /// Header format version number - uint8_t iv_headerVersion; - - /// Indicates whether the image has been normalized (0/1) - uint8_t iv_normalized; - - /// Indicates whether the TOC has been sorted to speed searching (0/1) - uint8_t iv_tocSorted; - - /// Reserved for future expansion - uint8_t iv_reserved8[5]; - - ////////////////////////////////////////////////////////////////////// - // Strings; 64 characters allocated - ////////////////////////////////////////////////////////////////////// - - /// Build user, generated by `id -un` - char iv_buildUser[16]; - - /// Build host, generated by `hostname` - char iv_buildHost[24]; - - /// Reserved for future expansion - char iv_reservedChar[24]; - -} SbeXipHeader; - - -/// A C-structure form of the SBE-XIP Table of Contents (TOC) entries -/// -/// The .toc section consists entirely of an array of these structures. -/// TOC entries are never accessed by PORE code. -/// -/// These structures store indexing information for global data required to be -/// manipulated by external tools. The actual data is usually allocated in a -/// data section and manipulated by the SBE code using global or local symbol -/// names. Each TOC entry contains a pointer to a keyword string naming the -/// data, the address of the data (or the data itself), the data type, -/// meta-information about the data, and for vectors the vector size. - -// -*- DO NOT REORDER OR EDIT THIS STRUCTURE DEFINITION WITHOUT ALSO -*- -// -*- EDITING THE ASSEMBLER MACROS (BELOW) THAT CREATE THE TABLE OF -*- -// -*- CONTENTS ENTRIES. -*- - -typedef struct { - - /// A pointer to a 0-byte terminated ASCII string identifying the data. - /// - /// When allocated by the .xip_toc macro this is a pointer to the string - /// form of the symbol name for the global or local symbol associated with - /// the data which is allocated in the .strings section. This pointer is - /// not aligned. - /// - /// When the image is normalized this pointer is replaced by the offset of - /// the string in the .strings section. - uint32_t iv_id; - - /// A 32-bit pointer locating the data - /// - /// This field is initially populated by the link editor. For scalar, - /// vector and string types this is the final relocated address of the - /// first byte of the data. For address types, this is the relocated - /// address. When the image is normalized, these addresses are converted - /// into the equivalent offsets from the beginning of the section holding - /// the data. - uint32_t iv_data; - - /// The type of the data; See \ref sbe_xip_toc_types. - uint8_t iv_type; - - /// The section containing the data; See \ref sbe_xip_sections. - uint8_t iv_section; - - /// The number of elements for vector types, otherwise 1 for scalar types - /// and addresses. - /// - /// Vectors are naturally limited in size, e.g. to the number of cores, - /// chips in a node, DD-levels etc. If \a iv_elements is 0 then no bounds - /// checking is done on get/set accesses of the data. - uint8_t iv_elements; - - /// Structure alignment padding; Pad to 12 bytes - uint8_t iv_pad; - -} SbeXipToc; - -/// The SbeXipToc structure is created by assembler code and is expected -/// to have the same size in C code. This constraint is checked in -/// sbe_xip_validate(). -#define SIZE_OF_SBE_XIP_TOC 12 - - -/// A C-structure form of hashed SBE-XIP Table of Contents (TOC) entries -/// -/// This structure was introduced in order to allow a small TOC for the .fixed -/// section to support minimum-sized SEEPROM images in which the global TOC -/// and all strings have been stripped out. In this structure the index -/// string has been replaced by a 32-bit hash, and there is no longer a record -/// of the original data name other then the hash. The section of the data is -/// assumed to be .fixed, with a maximum 16-bit offset. -/// -/// These structures are created when entries are made in the .fixed section. -/// They are created empty, then filled in during image normalization. -/// -/// This structure allows the sbe_xip_get*() and sbe_xip_set*() APIs to work -/// even on highly-stripped SEEPROM images. - -typedef struct { - - /// A 32-bit hash (FNV-1a) of the Id string. - uint32_t iv_hash; - - /// The offset in bytes from the start of the (implied) section of the data - uint16_t iv_offset; - - /// The type of the data; See \ref sbe_xip_toc_types. - uint8_t iv_type; - - /// The number of elements for vector types, otherwise 1 for scalar types - /// and addresses. - /// - /// Vectors are naturally limited in size, e.g. to the number of cores, - /// chips in a node, DD-levels etc. If \a iv_elements is 0 then no bounds - /// checking is done on get/set accesses of the data. - uint8_t iv_elements; - -} SbeXipHashedToc; - -/// The SbeXipHashedToc structure is created by assembler code and is expected -/// to have the same size in C code. This constraint is checked in -/// sbe_xip_validate(). -#define SIZE_OF_SBE_XIP_HASHED_TOC 8 - - -/// A decoded TOC entry for use by applications -/// -/// This structure is a decoded form of a normalized TOC entry, filled in by -/// the sbe_xip_decode_toc() and sbe_xip_find() APIs. This structure is -/// always returned with data elements in host-endian format. -/// -/// In the event that the TOC has been removed from the image, this structure -/// will also be returned by sbe_xip_find() with information populated from -/// the .fixed_toc section if possible. In this case the field \a iv_partial -/// will be set and only the fields \a iv_address, \a iv_imageData, \a iv_type -/// and \a iv_elements will be populated (all other fields will be set to 0). -/// -/// \note Only special-purpose applications will ever need to use this -/// structure given that the higher-level APIs sbe_xip_get_*() and -/// sbe_xip_set_*() are provided and should be used if possible, especially -/// given that the information may be truncated as described above. - -typedef struct { - - /// A pointer to the associated TOC entry as it exists in the image - /// - /// If \a iv_partial is set this field is returned as 0. - SbeXipToc* iv_toc; - - /// The full relocatable PORE address - /// - /// All relocatable addresses are computed from the \a iv_linkAddress - /// stored in the header. For scalar and string data, this is the - /// relocatable address of the data. For address-only entries, this is - /// the indexed address itself. - uint64_t iv_address; - - /// A host pointer to the first byte of text or data within the image - /// - /// For scalar or string types this is a host pointer to the first byte of - /// the data. For code pointers (addresses) this is host pointer to the - /// first byte of code. Note that any use of this field requires the - /// caller to handle conversion of the data to host endian-ness if - /// required. Only 8-bit and string data can be used directly on all - /// hosts. - void* iv_imageData; - - /// The item name - /// - /// This is a pointer in host memory to a string that names the TOC entry - /// requested. This field is set to a pointer to the ID string of the TOC - /// entry inside the image. If \a iv_partial is set this field is returned - /// as 0. - char* iv_id; - - /// The data type, one of the SBE_XIP_* constants - uint8_t iv_type; - - /// The number of elements in a vector - /// - /// This field is set from the TOC entry when the TOC entry is - /// decoded. This value is stored as 1 for scalar declarations, and may be - /// set to 0 for vectors with large or undeclared sizes. Otherwise it is - /// used to bounds check indexed accesses. - uint8_t iv_elements; - - /// Is this record only partially populated? - /// - /// This field is set to 0 normally, and only set to 1 if a lookup is made - /// in an image that only has the fixed TOC and the requested Id hashes to - /// the fixed TOC. - uint8_t iv_partial; - -} SbeXipItem; - - -/// Prototype entry in the .halt section -/// -/// The .halt section is generated by the 'reqhalt' macro. This structure -/// associates the address of each halt with the string form of the FAPI -/// return code associated with the halt. The string form is used because the -/// FAPI error return code is not constant. The .halt section is 4-byte -/// aligned, and each address/string entry is always padded to a multiple of 4 -/// bytes. -/// -/// In the .halt section the \a iv_string may be any length, thus the size of -/// each actual record is variable (although guaranteed to always be a -/// multiple of 4 bytes). Although the C compiler might natuarlly align -/// instances of this structure on a 64-bit boundary, the APIs that allow -/// access to the .halt section assume that the underlying machine can do -/// non-aligned loads from a pointer to this structure. - -typedef struct { - - /// The 64-bit relocatable address of the halt - /// - /// This is the address found in the PC (Status Register bits 16:63) when - /// the PORE halts. The full 64-bit form is used rather than the simple - /// 32-bit offset to support merging SEEPROM and PIBMEM .halt sections in - /// the SEEPROM IPL images. - uint64_t iv_address; - - /// A C-prototype for a variable-length 0-terminated ASCII string - /// - /// This is a prototype only to simplify C programming. The actual string - /// may be any length. - char iv_string[4]; - -} SbeXipHalt; - - -/// Validate an SBE-XIP image -/// -/// \param[in] i_image A pointer to an SBE-XIP image in host memory. -/// -/// \param[in] i_size The putative size of the image -/// -/// This API should be called first by all applications that manipulate -/// SBE-XIP images in host memory. The magic number is validated, and -/// the image is checked for consistency of the section table and table of -/// contents. The \a iv_imageSize field of the header must also match the -/// provided \a i_size parameter. Validation does not modify the image. -/// -/// \retval 0 Success -/// -/// \retval non-0 See \ref sbe_xip_image_errors -int -sbe_xip_validate(void* i_image, const uint32_t i_size); - - -/// Normalize the SBE-XIP image -/// -/// \param[in] io_image A pointer to an SBE-XIP image in host memory. The -/// image is assumed to be consistent with the information contained in the -/// header regarding the presence of and sizes of all sections. -/// -/// SBE-XIP images must be normalized before any other APIs are allowed to -/// operate on the image. Since normalization modifies the image, an explicit -/// call to normalize the image is required. Briefly, normalization modifies -/// the TOC entries created by the final link to simplify search, updates, -/// modification and relocation of the image. Normalization is explained in -/// the written documentation of the SBE-XIP binary format. Normalization does -/// not modify the size of the image. -/// -/// \retval 0 Success -/// -/// \retval non-0 See \ref sbe_xip_image_errors -int -sbe_xip_normalize(void* io_image); - - -/// Return the size of an SBE-XIP image from the image header -/// -/// \param[in] i_image A pointer to an SBE-XIP image in host memory. The -/// image is assumed to be consistent with the information contained in the -/// header regarding the presence of and sizes of all sections. -/// -/// \param[out] o_size A pointer to a variable returned as the size of the -/// image in bytes, as recorded in the image header. -/// -/// \retval 0 Success -/// -/// \retval non-0 See \ref sbe_xip_image_errors -int -sbe_xip_image_size(void* i_image, uint32_t* o_size); - - -/// Locate a section table entry and translate into host format -/// -/// \param[in] i_image A pointer to an SBE-XIP image in host memory. -/// -/// \param[in] i_sectionId Identifies the section to be queried. See \ref -/// sbe_xip_sections. -/// -/// \param[out] o_hostSection Updated to contain the section table entry -/// translated to host byte order. -/// -/// \retval 0 Success -/// -/// \retval non-0 See \ref sbe_xip_image_errors -int -sbe_xip_get_section(const void* i_image, - const int i_sectionId, - SbeXipSection* o_hostSection); - - -/// Endian translation of an SbeXipHeader object -/// -/// \param[out] o_hostHeader The destination object. -/// -/// \param[in] i_imageHeader The source object. -/// -/// Translation of a SbeXipHeader includes translation of all data members -/// including traslation of the embedded section table. This translation -/// works even if \a o_src == \a o_dest, i.e., in the destructive case. -void -sbe_xip_translate_header(SbeXipHeader* o_hostHeader, - const SbeXipHeader* i_imageHeader); - - -/// Get scalar data from an SBE-XIP image -/// -/// \param[in] i_image A pointer to an SBE-XIP image in host memory. The -/// image is assumed to be consistent with the information contained in the -/// header regarding the presence of and sizes of all sections. The image is -/// also required to have been normalized. -/// -/// \param[in] i_id A pointer to a 0-terminated ASCII string naming the item -/// requested. -/// -/// \param[out] o_data A pointer to an 8-byte integer to receive the scalar -/// data. Assuming the item is located this variable is assigned by the call. -/// In the event of an error the final state of \a o_data is not specified. -/// -/// This API searches the SBE-XIP Table of Contents (TOC) for the item named -/// \a i_id, assigning \a o_data from the image if the item is found and is a -/// scalar value. Scalar values include 8- 32- and 64-bit integers and PORE -/// addresses. Image data smaller than 64 bits are extracted as unsigned -/// types, and it is the caller's responsibility to cast or convert the -/// returned data as appropriate. -/// -/// \retval 0 Success -/// -/// \retval non-0 See \ref sbe_xip_image_errors -int -sbe_xip_get_scalar(void *i_image, const char* i_id, uint64_t* o_data); - - -/// Get an integral element from a vector held in an SBE-XIP image -/// -/// \param[in] i_image A pointer to an SBE-XIP image in host memory. The -/// image is assumed to be consistent with the information contained in the -/// header regarding the presence of and sizes of all sections. The image is -/// also required to have been normalized. -/// -/// \param[in] i_id A pointer to a 0-terminated ASCII string naming the item -/// requested. -/// -/// \param[in] i_index The index of the vector element to return. -/// -/// \param[out] o_data A pointer to an 8-byte integer to receive the -/// data. Assuming the item is located this variable is assigned by the call. -/// In the event of an error the final state of \a o_data is not specified. -/// -/// This API searches the SBE-XIP Table of Contents (TOC) for the \a i_index -/// element of the item named \a i_id, assigning \a o_data from the image if -/// the item is found, is a vector of an integral type, and the \a i_index is -/// in bounds. Vector elements smaller than 64 bits are extracted as unsigned -/// types, and it is the caller's responsibility to cast or convert the -/// returned data as appropriate. -/// -/// \retval 0 Success -/// -/// \retval non-0 See \ref sbe_xip_image_errors -int -sbe_xip_get_element(void *i_image, - const char* i_id, - const uint32_t i_index, - uint64_t* o_data); - - -/// Get string data from an SBE-XIP image -/// -/// \param[in] i_image A pointer to an SBE-XIP image in host memory. The -/// image is assumed to be consistent with the information contained in the -/// header regarding the presence of and sizes of all sections. The image is -/// also required to have been normalized. -/// -/// \param[in] i_id A pointer to a 0-terminated ASCII string naming the item -/// requested. -/// -/// \param[out] o_data A pointer to a character pointer. Assuming the -/// item is located this variable is assigned by the call to point to the -/// string as it exists in the \a i_image. In the event of an error the final -/// state of \a o_data is not specified. -/// -/// This API searches the SBE-XIP Table of Contents (TOC) for the item named -/// \a i_id, assigning \a o_data if the item is found and is a string. It is -/// the caller's responsibility to copy the string from the \a i_image memory -/// space if necessary. -/// -/// \retval 0 Success -/// -/// \retval non-0 See \ref sbe_xip_image_errors -int -sbe_xip_get_string(void *i_image, const char* i_id, char** o_data); - - -/// Directly read 64-bit data from the image based on a PORE address -/// -/// \param[in] i_image A pointer to an SBE-XIP image in host memory. The -/// image is assumed to be consistent with the information contained in the -/// header regarding the presence of and sizes of all sections. -/// -/// \param[in] i_poreAddress A relocatable PORE address contained in the -/// image, presumably of an 8-byte data area. The \a i_poreAddress is -/// required to be 8-byte aligned, otherwise the SBE_XIP_ALIGNMENT_ERROR code -/// is returned. -/// -/// \param[out] o_data The 64 bit data in host format that was found at \a -/// i_poreAddress. -/// -/// This API is provided for applications that need to manipulate SBE-XIP -/// images in terms of their relocatable PORE addresses. The API checks that -/// the \a i_poreAddress is properly aligned and contained in the image, then -/// reads the contents of \a i_poreAddress into \a o_data, performing -/// image-to-host endianess conversion if required. -/// -/// \retval 0 Success -/// -/// \retval non-0 See \ref sbe_xip_image_errors -int -sbe_xip_read_uint64(const void *i_image, - const uint64_t i_poreAddress, - uint64_t* o_data); - - -/// Set scalar data in an SBE-XIP image -/// -/// \param[in,out] io_image A pointer to an SBE-XIP image in host memory. -/// The image is assumed to be consistent with the information contained in -/// the header regarding the presence of and sizes of all sections. The image -/// is also required to have been normalized. -/// -/// \param[in] i_id A pointer to a 0-terminated ASCII string naming the item -/// to be modified. -/// -/// \param[in] i_data The new scalar data. -/// -/// This API searches the SBE-XIP Table of Contents (TOC) for the item named -/// by \a i_id, updating the image from \a i_data if the item is found, has -/// a scalar type and can be modified. For this API the scalar types include -/// 8- 32- and 64-bit integers. Although PORE addresses are considered a -/// scalar type for sbe_xip_get_scalar(), PORE addresses can not be modified -/// by this API. The caller is responsible for ensuring that the \a i_data is -/// of the correct size for the underlying data element in the image. -/// -/// \retval 0 Success -/// -/// \retval non-0 See \ref sbe_xip_image_errors -int -sbe_xip_set_scalar(void* io_image, const char* i_id, const uint64_t i_data); - - -/// Set an integral element in a vector held in an SBE-XIP image -/// -/// \param[in] i_image A pointer to an SBE-XIP image in host memory. The -/// image is assumed to be consistent with the information contained in the -/// header regarding the presence of and sizes of all sections. The image is -/// also required to have been normalized. -/// -/// \param[in] i_id A pointer to a 0-terminated ASCII string naming the item -/// to be updated. -/// -/// \param[in] i_index The index of the vector element to update. -/// -/// \param[out] i_data The new vector element. -/// -/// This API searches the SBE-XIP Table of Contents (TOC) for the \a i_index -/// element of the item named \a i_id, update the image from \a i_data if the -/// item is found, is a vector of an integral type, and the \a i_index is in -/// bounds. The caller is responsible for ensuring that the \a i_data is of -/// the correct size for the underlying data element in the image. -/// -/// \retval 0 Success -/// -/// \retval non-0 See \ref sbe_xip_image_errors -int -sbe_xip_set_element(void *i_image, - const char* i_id, - const uint32_t i_index, - const uint64_t i_data); - - -/// Set string data in an SBE-XIP image -/// -/// \param[in,out] io_image A pointer to an SBE-XIP image in host memory. The -/// image is assumed to be consistent with the information contained in the -/// header regarding the presence of and sizes of all sections. The image is -/// also required to have been normalized. -/// -/// \param[in] i_id A pointer to a 0-terminated ASCII string naming the item -/// to be modified. -/// -/// \param[in] i_data A pointer to the new string data. -/// -/// This API searches the SBE-XIP Table of Contents (TOC) for the item named -/// \a i_id, which must be a string variable. If found, then the string data -/// in the image is overwritten with \a i_data. Strings are held 0-terminated -/// in the image, and the SBE-XIP format does not maintain a record of the -/// amount of memory allocated for an individual string. If a string is -/// overwritten by a shorter string then the 'excess' storage is effectively -/// lost. If the length of \a i_data is longer that the current strlen() of -/// the string data then \a i_data is silently truncated to the first -/// strlen(old_string) characters. -/// -/// \retval 0 Success -/// -/// \retval non-0 See \ref sbe_xip_image_errors -int -sbe_xip_set_string(void *io_image, const char* i_id, const char* i_data); - - -/// Directly write 64-bit data into the image based on a PORE address -/// -/// \param[in, out] io_image A pointer to an SBE-XIP image in host memory. The -/// image is assumed to be consistent with the information contained in the -/// header regarding the presence of and sizes of all sections. -/// -/// \param[in] i_poreAddress A relocatable PORE address contained in the -/// image, presumably of an 8-byte data area. The \a i_poreAddress is -/// required to be 8-byte aligned, otherwise the SBE_XIP_ALIGNMENT_ERROR code -/// is returned. -/// -/// \param[in] i_data The 64 bit data in host format to be written to \a -/// i_poreAddress. -/// -/// This API is provided for applications that need to manipulate SBE-XIP -/// images in terms of their relocatable PORE addresses. The API checks that -/// the \a i_poreAddress is properly aligned and contained in the image, then -/// updates the contents of \a i_poreAddress with \a i_data, performing -/// host-to-image endianess conversion if required. -/// -/// \retval 0 Success -/// -/// \retval non-0 See \ref sbe_xip_image_errors -int -sbe_xip_write_uint64(void *io_image, - const uint64_t i_poreAddress, - const uint64_t i_data); - - -/// Map over an SBE-XIP image Table of Contents -/// -/// \param[in,out] io_image A pointer to an SBE-XIP image in host memory. The -/// image is assumed to be consistent with the information contained in the -/// header regarding the presence of and sizes of all sections. The image is -/// also required to have been normalized. -/// -/// \param[in] i_fn A pointer to a function to call on each TOC entry. The -/// function has the prototype: -/// -/// \code -/// int (*i_fn)(void* io_image, -/// const SbeXipItem* i_item, -/// void* io_arg) -/// \endcode -/// -/// \param[in,out] io_arg The private argument of \a i_fn. -/// -/// This API iterates over each entry of the TOC, calling \a i_fn with -/// pointers to the image, an SbeXipItem* pointer, and a private argument. The -/// iteration terminates either when all TOC entries have been mapped, or \a -/// i_fn returns a non-zero code. -/// -/// \retval 0 Success; All TOC entries were mapped, including the case that -/// the .toc section is empty. -/// -/// \retval non-0 May be either one of the SBE-XIP image error codes (see \ref -/// sbe_xip_image_errors), or a non-zero code from \a i_fn. Since the standard -/// SBE_XIP return codes are > 0, application-defined codes should be < 0. -int -sbe_xip_map_toc(void* io_image, - int (*i_fn)(void* io_image, - const SbeXipItem* i_item, - void* io_arg), - void* io_arg); - - -/// Find an SBE-XIP TOC entry -/// -/// \param[in] i_image A pointer to an SBE-XIP image in host memory. The -/// image is assumed to be consistent with the information contained in the -/// header regarding the presence of and sizes of all sections. The image is -/// also required to have been normalized. -/// -/// \param[in] i_id A 0-byte terminated ASCII string naming the item to be -/// searched for. -/// -/// \param[out] o_item If the search is successful, then the object -/// pointed to by \a o_item is filled in with the decoded form of the -/// TOC entry for \a i_id. If the API returns a non-0 error code then the -/// final state of the storage at \a o_item is undefined. This parameter may -/// be suppied as 0, in which case sbe_xip_find() serves as a simple predicate -/// on whether an item is indexded in the TOC. -/// -/// This API searches the TOC of a normalized SBE-XIP image for the item named -/// \a i_id, and if found, fills in the structure pointed to by \a -/// o_item with a decoded form of the TOC entry. If the item is not found, -/// the following two return codes may be considered non-error codes: -/// -/// - SBE_XIP_ITEM_NOT_FOUND : No TOC record for \a i_id was found. -/// -/// - SBE_XIP_DATA_NOT_PRESENT : The item appears in the TOC, however the -/// section containing the data is no longer present in the image. -/// -/// If the TOC section has been deleted from the image, then the search is -/// restricted to the abbreviated TOC that indexes data in the .fixed section. -/// In this case the \a o_item structure is marked with a 1 in the \a -/// iv_partial field since the abbreviated TOC can not populate the entire -/// SbeXipItem structure. -/// -/// \note This API should typically only be used as a predicate, not as a way -/// to access the image via the returned SbeXipItem structure. To obtain data -/// from the image or update data in the image use the sbe_xip_get_*() and -/// sbe_xip_set_*() APIs respectively. -/// -/// \retval 0 Success -/// -/// \retval non-0 See \ref sbe_xip_image_errors -int -sbe_xip_find(void* i_image, - const char* i_id, - SbeXipItem* o_item); - - -/// Map over an SBE-XIP image .halt section -/// -/// \param[in,out] io_image A pointer to an SBE-XIP image in host memory. The -/// image is assumed to be consistent with the information contained in the -/// header regarding the presence of and sizes of all sections. -/// -/// \param[in] i_fn A pointer to a function to call on each entry in .halt. -/// The function has the prototype: -/// -/// \code -/// int (*i_fn)(void* io_image, -/// const uint64_t i_poreAddress, -/// const char* i_rcString, -/// void* io_arg) -/// -/// \endcode -/// -/// \param[in,out] io_arg The private argument of \a i_fn. -/// -/// This API iterates over each entry of the .halt section, calling \a i_fn -/// with each HALT address, the string form of the return code associated with -/// that HALT address, and a private argument. The iteration terminates either -/// when all .halt entries have been mapped, or \a i_fn returns a non-zero -/// code. The \a i_poreAddddress passed to \a i_fn is the full 48-bit -/// relocatable PORE address. -/// -/// \retval 0 Success, including the case that the image has no .halt section. -/// -/// \retval non-0 May be either one of the SBE-XIP image error codes (see \ref -/// sbe_xip_image_errors), or any non-zero code from \a i_fn. Since the -/// standard SBE_XIP return codes are \> 0, application-defined codes should -/// be \< 0. -int -sbe_xip_map_halt(void* io_image, - int (*i_fn)(void* io_image, - const uint64_t i_poreAddress, - const char* i_rcString, - void* io_arg), - void* io_arg); - - -/// Get the string from of a HALT code from an SBE-XIP image .halt section -/// -/// \param[in,out] io_image A pointer to an SBE-XIP image in host memory. The -/// image is assumed to be consistent with the information contained in the -/// header regarding the presence of and sizes of all sections. -/// -/// \param[in] i_poreAddress This is the 48-bit address found in the PC when -/// the PORE halts. This address is actually 4 bytes beyond the actual HALT -/// instruction, however for simplicity this is the address used to index the -/// HALT. -/// -/// \param[out] o_rcString The caller provides the address of a string-pointer -/// variable which is updated with a pointer to the string form of the halt -/// code associated with \a i_poreAddress (assuming a successful completion). -/// -/// \retval 0 Success -/// -/// \revtal SBE_XIP_ITEM_NOT_FOUND The \a i_poreAddress is not associated -/// with a halt code in .halt. -/// -/// \revtal Other See \ref sbe_xip_image_errors -int -sbe_xip_get_halt(void* io_image, - const uint64_t i_poreAddress, - const char** o_rcString); - - -/// Delete a section from an SBE-XIP image in host memory -/// -/// \param[in,out] io_image A pointer to an SBE-XIP image in host memory. The -/// image is assumed to be consistent with the information contained in the -/// header regarding the presence of and sizes of all sections. The image is -/// also required to have been normalized. -/// -/// \param[in] i_sectionId Identifies the section to be deleted. See \ref -/// sbe_xip_sections. -/// -/// This API effectively deletes a section from an SBE-XIP image held in host -/// memory. Unless the requested section \a i_section is already empty, only -/// the final (highest address offset) section of the image may be deleted. -/// Deleting the final section of the image means that the section size is set -/// to 0, and the size of the image recorded in the header is reduced by the -/// section size. This API does not check for or warn if other sections in -/// the image reference the deleted section. -/// -/// \retval 0 Success -/// -/// \retval non-0 See \ref sbe_xip_image_errors -int -sbe_xip_delete_section(void* io_image, const int i_sectionId); - - -/// Duplicate a section from an SBE-XIP image in host memory -/// -/// \param[in,out] i_image A pointer to an SBE-XIP image in host memory. The -/// image is assumed to be consistent with the information contained in the -/// header regarding the presence of and sizes of all sections. -/// -/// \param[in] i_sectionId Identifies the section to be duplicated. See \ref -/// sbe_xip_sections. -/// -/// \param[out] o_duplicate At exit, points to the newly allocated and -/// initialized duplicate of the given section. The caller is responsible for -/// free()-ing this memory when no longer required. -/// -/// \param[out] o_size At exit, contains the size (in bytes) of the duplicated -/// section. -/// -/// This API creates a bytewise duplicate of a non-empty section into newly -/// malloc()-ed memory. At exit \a o_duplicate points to the duplicate, and \a -/// o_size is set the the size of the duplicated section. The caller is -/// responsible for free()-ing the memory when no longer required. The -/// pointer at \a o_duplicate is set to NULL (0) and the \a o_size is set to 0 -/// in the event of any failure. -/// -/// \retval 0 Success -/// -/// \retval non-0 See \ref sbe_xip_image_errors -int -sbe_xip_duplicate_section(const void* i_image, - const int i_sectionId, - void** o_duplicate, - uint32_t* o_size); - - -/// Append binary data to an SBE-XIP image held in host memory -/// -/// \param[in,out] io_image A pointer to an SBE-XIP image in host memory. The -/// image is assumed to be consistent with the information contained in the -/// header regarding the presence of and sizes of all sections. The image is -/// also required to have been normalized. -/// -/// \param[in] i_sectionId Identifies the section to contain the new data. -/// -/// \param[in] i_data A pointer to the data to be appended to the image. If -/// this pointer is NULL (0), then the effect is as if \a i_data were a -/// pointer to an \a i_size array of 0 bytes. -/// -/// \param[in] i_size The size of the data to be appended in bytes. If \a -/// i_data is 0, then this is the number of bytes to clear. -/// -/// \param[in] i_allocation The size of the memory region containing the -/// image, measured from the first byte of the image. The call will fail if -/// appending the new data plus any alignment padding would overflow the -/// allocated memory. -/// -/// \param[out] o_sectionOffset If non-0 at entry, then the API updates the -/// location pointed to by \a o_sectionOffset with the offset of the first -/// byte of the appended data within the indicated section. -/// -/// This API copies data from \a i_data to the end of the indicated \a -/// i_section. The section \a i_section must either be empty, or must be the -/// final (highest address) section in the image. If the section is initially -/// empty and \a i_size is non-0 then the section is created at the end of the -/// image. The size of \a i_section and the size of the image are always -/// adjusted to reflect the newly added data. This is a simple binary copy -/// without any interpretation (e.g., endian-translation) of the copied data. -/// The caller is responsible for insuring that the host memory area -/// containing the SBE-XIP image is large enough to hold the newly appended -/// data without causing addressing errors or buffer overrun errors. -/// -/// The final parameter \a o_sectionOffset is optional, and may be passed as -/// NULL (0) if the application does not require the information. This return -/// value is provided to simplify typical use cases of this API: -/// -/// - A scan program is appended to the image, or a run-time data area is -/// allocated and cleared at the end of the image. -/// -/// - Pointer variables in the image are updated with PORE addresses obtained -/// via sbe_xip_section2pore(), or -/// other procedure code initializes a newly allocated and cleared data area -/// via host addresses obtained from sbe_xip_section2host(). -/// -/// Regarding alignment, note that the SBE-XIP format requires that sections -/// maintain an initial alignment that varies by section, and the API will -/// enforce these alignment constraints for all sections created by the API. -/// All alignment is relative to the first byte of the image (\a io_image) - -/// \e not to the current in-memory address of the image. By specification -/// SBE-XIP images must be loaded at a 4K alignment in order for PORE hardware -/// relocation to work, however the APIs don't require this 4K alignment for -/// in-memory manipulation of images. Images to be executed on PoreVe will -/// normally require at least 8-byte final aligment in order to guarantee that -/// the PoreVe can execute an 8-byte fetch or load/store of the final -/// doubleword. -/// -/// \note If the TOC section is modified then the image is marked as having an -/// unsorted TOC. -/// -/// \retval 0 Success -/// -/// \retval non-0 See \ref sbe_xip_image_errors -int -sbe_xip_append(void* io_image, - const int i_sectionId, - const void* i_data, - const uint32_t i_size, - const uint32_t i_allocation, - uint32_t* o_sectionOffset); - - -/// Convert an SBE-XIP section offset to a relocatable PORE address -/// -/// \param[in] i_image A pointer to an SBE-XIP image in host memory -/// -/// \param[in] i_sectionId A valid SBE-XIP section identifier; The section -/// must be non-empty. -/// -/// \param[in] i_offset An offset (in bytes) within the section. At least one -/// byte at \a i_offset must be currently allocated in the section. -/// -/// \param[in] o_poreAddress The equivalent relocatable PORE address is -/// returned via this pointer. Since valid PORE addresses are always either -/// 4-byte (code) or 8-byte (data) aligned, this API checks the aligment of -/// the translated address and returns SBE_XIP_ALIGNMENT_ERROR if the PORE -/// address is not at least 4-byte aligned. Note that the translated address -/// is still returned even if incorrectly aligned. -/// -/// This API is typically used to translate section offsets returned from -/// sbe_xip_append() into relocatable PORE addresses. -/// -/// \retval 0 Success -/// -/// \retval non-0 See \ref sbe_xip_image_errors -int -sbe_xip_section2pore(const void* i_image, - const int i_sectionId, - const uint32_t i_offset, - uint64_t* o_poreAddress); - - -/// Convert an SBE-XIP relocatable PORE address to a host memory address -/// -/// \param[in] i_image A pointer to an SBE-XIP image in host memory. -/// -/// \param[in] i_poreAddress A relocatable PORE address putatively addressing -/// relocatable memory contained in the image. -/// -/// \param[out] o_hostAddress The API updates the location pointed to by \a -/// o_hostAddress with the host address of the memory addressed by \a -/// i_poreAddress. In the event of an error (non-0 return code) the final -/// content of \a o_hostAddress is undefined. -/// -/// This API is typically used to translate relocatable PORE addresses stored -/// in the SBE-XIP image into the equivalent host address of the in-memory -/// image, allowing host-code to manipulate arbitrary data structures in the -/// image. If the \a i_poreAddress does not refer to memory within the image -/// (as determined by the link address and image size) then the -/// SBE_XIP_INVALID_ARGUMENT error code is returned. -/// -/// \retval 0 Success -/// -/// \retval non-0 See \ref sbe_xip_image_errors -int -sbe_xip_pore2host(const void* i_image, - const uint64_t i_poreAddress, - void** o_hostAddress); - - -/// Convert an SBE-XIP relocatable PORE address to section Id and offset -/// -/// \param[in] i_image A pointer to an SBE-XIP image in host memory. -/// -/// \param[in] i_poreAddress A relocatable PORE address putatively addressing -/// relocatable memory contained in the image. -/// -/// \param[out] o_section The API updates the location pointed to by \a -/// o_section with the section Id of the memory addressed by \a -/// i_poreAddress. In the event of an error (non-0 return code) the final -/// content of \a o_section is undefined. -/// -/// \param[out] o_offset The API updates the location pointed to by \a -/// o_offset with the byte offset of the memory addressed by \a i_poreAddress -/// within \a o_section. In the event of an error (non-0 return code) the -/// final content of \a o_offset is undefined. -/// -/// This API is typically used to translate relocatable PORE addresses stored -/// in the SBE-XIP image into the equivalent section + offset form, allowing -/// host-code to manipulate arbitrary data structures in the image. If the \a -/// i_poreAddress does not refer to memory within the image (as determined by -/// the link address and image size) then the SBE_XIP_INVALID_ARGUMENT error -/// code is returned. -/// -/// \retval 0 Success -/// -/// \retval non-0 See \ref sbe_xip_image_errors -int -sbe_xip_pore2section(const void* i_image, - const uint64_t i_poreAddress, - int* o_section, - uint32_t* o_offset); - - -/// Convert an in-memory SBE-XIP host address to a relocatable PORE address -/// -/// \param[in] i_image A pointer to an SBE-XIP image in host memory -/// -/// \param[in] i_hostAddress A host address addressing data within the image. -/// -/// \param[out] o_poreAddress The API updates the location pointed to by \a -/// o_poreAddress with the equivelent relocatable PORE address of the memory -/// addressed by i_hostAddress. Since valid PORE addresses are always either -/// 4-byte (code) or 8-byte (data) aligned, this API checks the aligment of -/// the translated address and returns SBE_XIP_ALIGNMENT_ERROR if the PORE -/// address is not at least 4-byte aligned. Note that the translated address -/// is still returned evn if incorrectly aligned. -/// -/// This API is provided as a convenient way to convert host memory addresses -/// for an in-memory SBE-XIP image into PORE addresses correctly relocated for -/// the image, for example to update pointer variables in the image. If the -/// \a i_hostAddress does not refer to memory within the image (as determined -/// by the image address and image size) then the SBE_XIP_INVALID_ARGUMENT -/// error code is returned. -/// -/// \retval 0 Success -/// -/// \retval non-0 See \ref sbe_xip_image_errors -int -sbe_xip_host2pore(const void* i_image, - void* i_hostAddress, - uint64_t* o_poreAddress); - - -/// \defgroup sbe_xip_image_errors Error codes from SBE-XIP image APIs -/// -/// @{ - -/// A putative SBE-XIP image does not have the correct magic number, or -/// contains some other major inconsistency. -#define SBE_XIP_IMAGE_ERROR 1 - -/// The TOC may be missing, partially present or may have an alignment problem. -#define SBE_XIP_TOC_ERROR 2 - -/// A named item was not found in the SBE-XIP TOC, or a putative HALT address -/// is not associated with a halt code in .halt. -#define SBE_XIP_ITEM_NOT_FOUND 3 - -/// A named item appears in the SBE-XIP TOC, but the data is not present in -/// the image. This error can occur if sections have been deleted from the -/// image. -#define SBE_XIP_DATA_NOT_PRESENT 4 - -/// A named item appears in the SBE-XIP TOC, but the data can not be -/// modified. This error will occur if an attempt is made to modify an -/// address-only entry. -#define SBE_XIP_CANT_MODIFY 5 - -/// A direct or implied argument is invalid, e.g. an illegal data type or -/// section identifier, or an address not contained within the image. -#define SBE_XIP_INVALID_ARGUMENT 6 - -/// A data type mismatch or an illegal type was specified or implied for an -/// operation. -#define SBE_XIP_TYPE_ERROR 7 - -/// A bug in an SBE-XIP image API -#define SBE_XIP_BUG 8 - -/// The image must first be normalized with sbe_xip_normalize(). -#define SBE_XIP_NOT_NORMALIZED 9 - -/// Attempt to delete a non-empty section that is not the final section of the -/// image, or an attempt to append data to a non-empty section that is not the -/// final section of the image, or an attempt to operate on an empty section -/// for those APIs that prohibit this. -#define SBE_XIP_SECTION_ERROR 10 - -/// An address translation API returned a PORE address that was not at least -/// 4-byte aligned, or alignment violations were observed by -/// sbe_xip_validate() or sbe_xip_append(). -#define SBE_XIP_ALIGNMENT_ERROR 11 - -/// An API that performs dynamic memory allocation was unable to allocate -/// memory. -#define SBE_XIP_NO_MEMORY 12 - -/// Attempt to get or set a vector element with an index that is outside of -/// the declared bounds of the vector. -#define SBE_XIP_BOUNDS_ERROR 13 - -/// Attempt to grow the image past its defined memory allocation -#define SBE_XIP_WOULD_OVERFLOW 14 - -/// Error associated with the disassembler occured. -#define SBE_XIP_DISASSEMBLER_ERROR 15 - -/// hash collision creating the .fixed_toc section -#define SBE_XIP_HASH_COLLISION 16 - -/// Applications can expand this macro to declare an array of string forms of -/// the error codes if desired. -#define SBE_XIP_ERROR_STRINGS(var) \ - const char* var[] = { \ - "Success", \ - "SBE_XIP_IMAGE_ERROR", \ - "SBE_XIP_TOC_ERROR", \ - "SBE_XIP_ITEM_NOT_FOUND", \ - "SBE_XIP_DATA_NOT_PRESENT", \ - "SBE_XIP_CANT_MODIFY", \ - "SBE_XIP_INVALID_ARGUMENT", \ - "SBE_XIP_TYPE_ERROR", \ - "SBE_XIP_BUG", \ - "SBE_XIP_NOT_NORMALIZED", \ - "SBE_XIP_SECTION_ERROR", \ - "SBE_XIP_ALIGNMENT_ERROR", \ - "SBE_XIP_NO_MEMORY", \ - "SBE_XIP_BOUNDS_ERROR", \ - "SBE_XIP_WOULD_OVERFLOW", \ - "SBE_XIP_DISASSEMBLER_ERROR", \ - "SBE_XIP_HASH_COLLISION", \ - } - -/// Applications can use this macro to safely index the array of error -/// strings. -#define SBE_XIP_ERROR_STRING(var, n) \ - ((((n) < 0) || ((n) > (int)(sizeof(var) / sizeof(char*)))) ? \ - "Bug : Invalid SBE-XIP error code" : var[n]) - -/// @} - -/// Disassembler error codes. -#define DIS_IMAGE_ERROR 1 -#define DIS_MEMORY_ERROR 2 -#define DIS_DISASM_ERROR 3 -#define DIS_RING_NAME_ADDR_MATCH_SUCCESS 4 -#define DIS_RING_NAME_ADDR_MATCH_FAILURE 5 -#define DIS_TOO_MANY_DISASM_WARNINGS 6 -#define DIS_DISASM_TROUBLES 7 - -#define DIS_ERROR_STRINGS(var) \ - const char* var[] = { \ - "Success", \ - "DIS_IMAGE_ERROR", \ - "DIS_MEMORY_ERROR", \ - "DIS_DISASM_ERROR", \ - "DIS_RING_NAME_ADDR_MATCH_SUCCESS", \ - "DIS_RING_NAME_ADDR_MATCH_FAILURE", \ - "DIS_TOO_MANY_DISASM_WARNINGS", \ - "DIS_DISASM_TROUBLES", \ - } - -#define DIS_ERROR_STRING(var, n) \ - ((((n) < 0) || ((n) > (int)(sizeof(var) / sizeof(char*)))) ? \ - "Bug : Invalid DIS error code" : var[n]) - -#if 0 -{ /* So __cplusplus doesn't mess w/auto-indent */ -#endif -#ifdef __cplusplus -} -#endif - -#endif // __ASSEMBLER__ - - -//////////////////////////////////////////////////////////////////////////// -// Assembler Definitions -//////////////////////////////////////////////////////////////////////////// - -#ifdef __ASSEMBLER__ - -/// Create an XIP TOC entry -/// -/// \param[in] index The string form of the \a index symbol is created and -/// linked from the TOC entry to allow external search procedures to locate -/// the \a address. -/// -/// \param[in] type One of the SBE_XIP_* type constants; See \ref -/// sbe_xip_toc_types. -/// -/// \param[in] address The address of the idexed code or data; This wlll -/// typically be a symbol. -/// -/// \param[in] elements <Optional> For vector types, number of elements in the -/// vector, which is limited to an 8-bit unsigned integer. This parameter -/// defaults to 1 which indicates a scalar type. Declaring a vector with 0 -/// elements disables bounds checking on vector accesses, and can be used if -/// very large or indeterminate sized vectors are required. The TOC format -/// does not support vectors of strings or addresses. -/// -/// The \c .xip_toc macro creates a XIP Table of Contents (TOC) structure in -/// the \c .toc section, as specified by the parameters. This macro is -/// typically not used directly in assembly code. Instead programmers should -/// use .xip_quad, .xip_quada, .xip_quadia, .xip_address, .xip_string or -/// .xip_cvs_revision. - - .macro .xip_toc, index:req, type:req, address:req, elements=1 - - .if (((\type) < 1) || ((\type) > SBE_XIP_MAX_TYPE_INDEX)) - .error ".xip_toc : Illegal type index" - .endif - - // First push into the .strings section to lay down the - // string form of the index name under a local label. - - .pushsection .strings -7667862: - .asciz "\index" - .popsection - - // Now the 12-byte TOC entry is created. Push into the .toc section - // and lay down the first 4 bytes which are always a pointer to the - // string just declared. The next 4 bytes are the address of the data - // (or the address itself in the case of address types). The final 4 - // bytes are the type, section (always 0 prior to normalization), - // number of elements, and a padding byte. - - .pushsection .toc - - .long 7667862b, (\address) - .byte (\type), 0, (\elements), 0 - - .popsection - - .endm - - -/// Allocate and initialize 64-bit global scalar or vector data and create the -/// TOC entry. -/// -/// \param[in] symbol The name of the scalar or vector; this name is also used -/// as the TOC index of the data. -/// -/// \param[in] init The initial value of (each element of) the data. -/// This is a 64-bit integer; To allocate address pointers use .xip_quada. -/// -/// \param[in] elements The number of 64-bit elements in the data structure, -/// defaulting to 1, with a maximum value of 255. -/// -/// \param[in] section The section where the data will be allocated, -/// default depends on the memory space - - .macro .xip_quad, symbol:req, init:req, elements=1, section - - ..xip_quad_helper .quad, \symbol, (\init), (\elements), \section - - .endm - - -/// Allocate and initialize 64-bit global scalar or vector data containing a -/// relocatable address in and create the TOC entry. -/// -/// \param[in] symbol The name of the scalar or vector; this name is also used -/// as the TOC index of the data. -/// -/// \param[in] init The initial value of (each element of) the data. This -/// will typically be a symbolic address. If the intention is to define an -/// address that will always be filled in later by image manipulation tools, -/// then use the .xip_quad macro with a 0 initial value. -/// -/// \param[in] elements The number of 64-bit elements in the data structure, -/// defaulting to 1, with a maximum value of 255. -/// -/// \param[in] section The section where the data will be allocated, -/// default depends on the memory space - - .macro .xip_quada, symbol:req, offset:req, elements=1, section - - ..xip_quad_helper .quada, \symbol, (\offset), (\elements), \section - - .endm - - -/// Helper for .xip_quad and .xip_quada - - .macro ..xip_quad_helper, directive, symbol, init, elements, section - - .if (((\elements) < 1) || ((\elements) > 255)) - .error "The number of vector elements must be in the range 1..255" - .endif - - ..xip_pushsection \section - .balign 8 - - .global \symbol -\symbol\(): - .rept (\elements) - \directive (\init) - .endr - - .popsection - - .xip_toc \symbol, SBE_XIP_UINT64, \symbol, (\elements) - - .endm - - -/// Allocate and initialize 64-bit global scalar or vector data containing -/// full 64-bit addresses and create a TOC entry -/// -/// \param[in] symbol The name of the scalar or vector; this name is also used -/// as the TOC index of the data. -/// -/// \param[in] space A valid PORE memory space descriptor -/// -/// \param[in] offset A 32-bit relocatable offset -/// -/// \param[in] elements The number of 64-bit elements in the data structure, -/// defaulting to 1, with a maximum value of 255. -/// -/// \param[in] section The section where the data will be allocated, -/// default depends on the memory space - - .macro .xip_quadia, symbol:req, space:req, offset:req, \ - elements=1, section - - .if (((\elements) < 1) || ((\elements) > 255)) - .error "The number of vector elements must be in the range 1..255" - .endif - - ..xip_pushsection \section - .balign 8 - - .global \symbol -\symbol\(): - .rept (\elements) - .quadia (\space), (\offset) - .endr - - .popsection - - .xip_toc \symbol, SBE_XIP_UINT64, \symbol, (\elements) - - .endm - -/// Default push into .ipl_data unless in an OCI space, then .data - - .macro ..xip_pushsection, section - - .ifnb \section - .pushsection \section - .else - .if (_PGAS_DEFAULT_SPACE == PORE_SPACE_OCI) - .pushsection .data - .else - .pushsection .ipl_data - .endif - .endif - - .balign 8 - - .endm - -/// Allocate and initialize a string in .strings -/// -/// \param[in] index The string will be stored in the TOC using this index -/// symbol. -/// -/// \param[in] string The string to be allocated in .strings. String space is -/// fixed once allocated. Strings designed to be overwritten by external tools -/// should be allocated to be as long as eventually needed (e.g., by a string -/// of blanks.) - - .macro .xip_string, index:req, string:req - - .pushsection .strings -7874647: - .asciz "\string" - .popsection - - .xip_toc \index, SBE_XIP_STRING, 7874647b - - .endm - - -/// Allocate and initialize a CVS Revison string in .strings -/// -/// \param[in] index The string will be stored in the TOC using this index -/// symbol. -/// -/// \param[in] string A CVS revision string to be allocated in .strings. CVS -/// revision strings are formatted by stripping out and only storing the -/// actual revision number : -/// -/// \code -/// "$Revision <n>.<m> $" -> "<n>.<m>" -/// \endcode - - - .macro .xip_cvs_revision, index:req, string:req - - .pushsection .strings -7874647: - ..cvs_revision_string "\string" - .popsection - - .xip_toc \index, SBE_XIP_STRING, 7874647b - - .endm - - -/// Shorthand to create a TOC entry for an address -/// -/// \param[in] index The symbol will be indexed as this name -/// -/// \param[in] symbol <Optional> The symbol to index; by default the same as -/// the index. - - .macro .xip_address, index:req, symbol - - .ifb \symbol - .xip_toc \index, SBE_XIP_ADDRESS, \index - .else - .xip_toc \index, SBE_XIP_ADDRESS, \symbol - .endif - - .endm - - -/// Edit and allocate a CVS revision string -/// -/// CVS revision strings are formatted by stripping out and only storing the -/// actual revision number : -/// \code -/// "$Revision <n>.<m> $" -> "<n>.<m>" -/// \endcode - - .macro ..cvs_revision_string, rev:req - .irpc c, \rev - .ifnc "\c", "$" - .ifnc "\c", "R" - .ifnc "\c", "e" - .ifnc "\c", "v" - .ifnc "\c", "i" - .ifnc "\c", "s" - .ifnc "\c", "i" - .ifnc "\c", "o" - .ifnc "\c", "n" - .ifnc "\c", ":" - .ifnc "\c", " " - .ascii "\c" - .endif - .endif - .endif - .endif - .endif - .endif - .endif - .endif - .endif - .endif - .endif - .endr - .byte 0 - .endm - -#endif // __ASSEMBLER__ - -#endif // __SBE_XIP_TOC_H diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/HvPlicModule.H b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/HvPlicModule.H new file mode 100644 index 000000000..a74bc37d4 --- /dev/null +++ b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/HvPlicModule.H @@ -0,0 +1,23 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/HvPlicModule.H $ */ +/* */ +/* IBM CONFIDENTIAL */ +/* */ +/* COPYRIGHT International Business Machines Corp. 2012 */ +/* */ +/* p1 */ +/* */ +/* Object Code Only (OCO) source materials */ +/* Licensed Internal Code Source Materials */ +/* IBM HostBoot Licensed Internal Code */ +/* */ +/* The source code for this program is not published or otherwise */ +/* divested of its trade secrets, irrespective of what has been */ +/* deposited with the U.S. Copyright Office. */ +/* */ +/* Origin: 30 */ +/* */ +/* IBM_PROLOG_END_TAG */ + diff --git a/src/usr/hwpf/hwp/build_winkle_images/proc_slw_build/p8_delta_scan_rw.h b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_delta_scan_rw.h index a0466c2ef..46f50e297 100644 --- a/src/usr/hwpf/hwp/build_winkle_images/proc_slw_build/p8_delta_scan_rw.h +++ b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_delta_scan_rw.h @@ -1,51 +1,56 @@ -/* IBM_PROLOG_BEGIN_TAG - * This is an automatically generated prolog. - * - * $Source: src/usr/hwpf/hwp/build_winkle_images/proc_slw_build/p8_delta_scan_rw.h $ - * - * IBM CONFIDENTIAL - * - * COPYRIGHT International Business Machines Corp. 2012 - * - * p1 - * - * Object Code Only (OCO) source materials - * Licensed Internal Code Source Materials - * IBM HostBoot Licensed Internal Code - * - * The source code for this program is not published or other- - * wise divested of its trade secrets, irrespective of what has - * been deposited with the U.S. Copyright Office. - * - * Origin: 30 - * - * IBM_PROLOG_END_TAG - */ -//***** IMPORTANT - Assumptions (you may have to change these settings) ****** -#define ASM_RS4_LAUNCH_BUF_SIZE 24 // Byte size of binary RS4 launch buffer w/last two - // nops removed. Must always be 8-byte aligned. +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_delta_scan_rw.h $ */ +/* */ +/* IBM CONFIDENTIAL */ +/* */ +/* COPYRIGHT International Business Machines Corp. 2012 */ +/* */ +/* p1 */ +/* */ +/* Object Code Only (OCO) source materials */ +/* Licensed Internal Code Source Materials */ +/* IBM HostBoot Licensed Internal Code */ +/* */ +/* The source code for this program is not published or otherwise */ +/* divested of its trade secrets, irrespective of what has been */ +/* deposited with the U.S. Copyright Office. */ +/* */ +/* Origin: 30 */ +/* */ +/* IBM_PROLOG_END_TAG */ +// $Id: p8_delta_scan_rw.h,v 1.23 2012/09/21 15:08:02 cmolsen Exp $ #define OVERRIDE_OFFSET 8 // Byte offset of forward pointer's addr relative // to base forward pointer's addr. -#define SIZE_IMAGE_BUF_MAX 50000000 // Max 50MB image buffer size. -#define SIZE_IMAGE_CENTAUR_MAX 5000000 // Max 5MB image buffer size. +#define SIZE_IMAGE_BUF_MAX 50000000 // Max ~50MB image buffer size. +#define SIZE_IMAGE_CENTAUR_MAX 5000000 // Max ~5MB image buffer size. +#define SIZE_REPR_RING_MAX 50000 // Max ~50kB repr ring buffer size. #define SCOM_REG_MASK 0x00ffffff // Scom register mask (within a chiplet) #define CID_MASK 0xff000000 // Chiplet ID mask #define CID_EX_LOW 0x10 // Lowest EX chiplet addr #define CID_EX_HIGH 0x1f // Highest EX chiplet addr +/***** Scan setting *****/ +#define OPCG_SCAN_RATIO 4 +#define P8_OPCG_SCAN_RATIO_BITS (uint64_t(OPCG_SCAN_RATIO-1)<<(63-8)) +#define P8_OPCG_GO_BITS (uint64_t(0x40000000)<<32) +#define P8_SCAN_POLL_MASK_BIT15 (uint64_t(0x00010000)<<32) + /***** Scan Control Regs *****/ -#define P8_PORE_CLOCK_CONTROLLER_REG 0x00030007 // Addr of clock ctrl scom reg -#define P8_PORE_SHIFT_REG 0x00038000 // Addr of scom reg that does scan ring shifting -#define P8_SCAN_CHECK_WORD 0xA5A55A5A // Header check word +#define P8_PORE_OPCG_CTRL_REG0_0x00030002 0x00030002 // OPCG control reg 0 +#define P8_PORE_OPCG_CTRL_REG1_0x00030003 0x00030003 // OPCG control reg 1 +#define P8_PORE_OPCG_CTRL_REG2_0x00030004 0x00030004 // OPCG control reg 2 +#define P8_PORE_OPCG_START_REG3_0x00030005 0x00030005 // OPCG start reg 3 +#define P8_PORE_CLOCK_REGION_0x00030006 0x00030006 // Clock region control +#define P8_PORE_CLOCK_CONTROLLER_REG 0x00030007 // Addr of clock ctrl scom reg +#define P8_PORE_CLOCK_STATUS_0x00030008 0x00030008 // Status of clocks running +#define P8_PORE_SHIFT_REG 0x00038000 // Addr of scom reg that does scan ring shifting +#define P8_SCAN_CHECK_WORD 0xA5A55A5A // Header check word /***** Ring state *****/ -#define MAX_RING_SIZE 1000000 // This is the max binary ring size in bits - -// Debug and development stuff -#define IGNORE_FOR_NOW // Causes code sections to be ignored. -#define DEBUG_SUPPORT // Activates sbe-xip debug support. -#define PRINT_WF_DIS // Causes wf inline code to be disassembled and written to file. +#define MAX_RING_SIZE 500000 // 500kbits is the max ring size in bits /***** Return codes *****/ #define DSLWB_RING_SEARCH_MATCH 0 @@ -59,12 +64,16 @@ #define DSLWB_SLWB_WF_IMAGE_ERROR 43 #define DSLWB_SLWB_IMAGE_ERROR 44 #define DSLWB_SLWB_UNKNOWN_ERROR 45 -#define IMGBUILD_SUCCESS 0 // Successful image build. -#define IMGBUILD_ERR_CHECK_CODE 2 // Coding problem. +#define IMGBUILD_SUCCESS 0 // Successful img build. +#define IMGBUILD_NO_RINGS_FOUND 1 // Successful img build but no rings found. +#define IMGBUILD_BAD_ARGS 2 // Bad function arguments. #define IMGBUILD_ERR_MEMORY 4 // Memory allocation error. +#define IMGBUILD_ERR_CHECK_CODE 6 // Coding or image data problem. #define IMGBUILD_INVALID_IMAGE 10 // Invalid image. #define IMGBUILD_IMAGE_SIZE_MISMATCH 11 // Mismatch between image sizes. -#define IMGBUILD_ERR_PORE_INLINE_ASM 20 // Err assoc w/inline assembler. +#define IMGBUILD_ERR_PORE_INLINE 20 // Pore inline error. +#define IMGBUILD_ERR_PORE_INLINE_ASM 21 // Err assoc w/inline assembler. +#define IMGBUILD_ERR_GET_SECTION 49 // Err assoc w/getting section ID. #define IMGBUILD_ERR_SECTION_DELETE 50 // Err assoc w/deleting ELF section. #define IMGBUILD_ERR_APPEND 51 // Err assoc w/appending to ELF section. #define IMGBUILD_ERR_INCOMPLETE_IMG_BUILD 52 // The image was built, but with errors. @@ -73,21 +82,26 @@ #define IMGBUILD_ERR_MISALIGNED_RING_LAYOUT 55 // Ring layout is misaligned. #define IMGBUILD_ERR_IMAGE_TOO_LARGE 56 // Image too large. Exceeded max size. #define IMGBUILD_ERR_XIP_MISC 57 // Miscellaneous XIP image error. -#define IMGBUILD_ERR_RS4_DECOMPRESS 58 // Error during RS4 decompression. -#define IMGBUILD_ERR_PORE_INLINE 60 // Pore inline error. +#define IMGBUILD_ERR_XIP_UNKNOWN 58 // Unknown XIP image error. +#define IMGBUILD_ERR_RS4_DECOMPRESS 59 // Error during RS4 decompression. +#define IMGBUILD_ERR_RAM_HDRS_NOT_SYNCED 61 // Ram headers not synchronized. +#define IMGBUILD_ERR_RAM_TABLE_OVERFLOW 63 // Ram table entry overflow. +#define IMGBUILD_ERR_RAM_CODE 64 // Code error in Ram API code. #define IMGBUILD_ERR_RAM_INVALID_PARM 65 // Invalid Ramming parameter. -#define IMGBUILD_ERR_RAM_TABLE_FAIL 66 // Unsuccessful RAM table build. +#define IMGBUILD_WARN_RAM_TABLE_CONTAMINATION 66 // Ram table contamination +#define IMGBUILD_ERR_RAM_TABLE_FAIL 67 // Unsuccessful RAM table build. +#define IMGBUILD_ERR_RAM_TABLE_END_NOT_FOUND 68 // Table entry end bit not found. #define IMGBUILD_ERR_SCOM_INVALID_PARM 70 // Invalid Scomming parameter. #define IMGBUILD_ERR_SCOM_HDRS_NOT_SYNCD 72 // Scom headers out of sync. #define IMGBUILD_ERR_SCOM_ENTRY_NOT_FOUND 74 // Scom entry not found (OR/AND oper.) #define IMGBUILD_ERR_SCOM_REPEAT_ENTRIES 76 // Repeat entries not allow. #define IMGBUILD_ERR_SCOM_TABLE_FAIL 79 // Unsuccessful SCOM table build. -#ifdef SLW_COMMAND_LINE_RAM +#if defined SLW_COMMAND_LINE_RAM || defined XIPC_COMMAND_LINE #define SLW_COMMAND_LINE #endif -#ifdef __FAPI +#if defined __FAPI && !(defined __P8_PORE_TABLE_GEN_API_C) #define MY_INF(_fmt_, _args_...) FAPI_INF(_fmt_, ##_args_) #ifndef SLW_COMMAND_LINE #define MY_ERR(_fmt_, _args_...) FAPI_ERR(_fmt_, ##_args_) @@ -107,32 +121,44 @@ #endif // End of not(__FAPI) & not(SLW_COMMAND_LINE) #endif -#include <stdlib.h> -#include <stdio.h> +#ifdef SLW_COMMAND_LINE +// Debug and development stuff +//#define IGNORE_FOR_NOW // Causes code sections to be ignored. +#define DEBUG_SUPPORT // Activates sbe-xip debug support. +#endif + +//#include <stdio.h> +//#include <stdint.h> +//#include <stdlib.h> +#include <p8_pore_api_custom.h> #include <string.h> -#ifdef SLW_COMMAND_LINE +#if defined SLW_COMMAND_LINE +#include <stdint.h> // May be in conflict with p8_pore_api_custom.h +#include <stdlib.h> // May be in conflict with p8_pore_api_custom.h +#include <stdio.h> #include <sys/mman.h> #include <unistd.h> #include <fcntl.h> #include <sys/stat.h> #endif //End of SLW_COMMAND_LINE -#ifndef SLW_BUILD_WF_P0_FIX -#include "pore_bitmanip.H" -#endif // SLW_BUILD_WF_P0_FIX +// Not needed by: +// - Done: p8_pore_table_gen_api, p8_slw_build, p8_xip_customize, sbe_xip_tool, +// p8_delta_scan, p8_ipl_build, p8_centaur_build. +// - So, what was this used for? +//#include <pore_bitmanip.H> -//#include "p8_pore_api.h" -//#include "p8_pore_static_data.h" +#include <p8_image_help_base.H> -#ifndef SLW_COMMAND_LINE_RAM -#include "p8_scan_compression.H" +#ifndef SLW_COMMAND_LINE_RAM // We don't need this include for ramming. +#include <p8_scan_compression.H> #endif -#include "sbe_xip_image.h" +#include <sbe_xip_image.h> #undef __PORE_INLINE_ASSEMBLER_C__ -#include "pore_inline.h" +#include <pore_inline.h> #ifdef __cplusplus extern "C" { @@ -174,6 +200,21 @@ typedef struct { char data[]; } MetaData; +/* +// RS4 specific layout. +typedef struct { + uint64_t entryOffset; + uint64_t backItemPtr; + uint32_t sizeOfThis; + uint32_t sizeOfMeta; // Exact size of meta data. Arbitrary size. Not null terminated. + uint32_t ddLevel; + uint8_t sysPhase; + uint8_t override; + uint8_t reserved1; + uint8_t reserved2; +} Rs4RingLayout; +*/ + int p8_centaur_build( void *i_imageIn, uint32_t i_ddLevel, void *i_imageOut, @@ -199,49 +240,58 @@ int gen_ring_delta_state( uint32_t *i_init, uint32_t *i_alter, uint32_t *o_delta, - uint32_t verbose); + uint32_t verbose); int write_delta_ring_to_image( - char *i_fnImage, + char *i_fnImage, CompressedScanData *i_RS4, - uint32_t i_ddLevel, - uint8_t i_sysPhase, - uint8_t i_override, + uint32_t i_ddLevel, + uint8_t i_sysPhase, + uint8_t i_override, char *i_varName, char *i_fnMetaData, uint32_t verbose); +int write_repr_ring_to_image( + void *io_image, + uint32_t *io_sizeImageOut, + CompressedScanData *i_bufRs4Ring, + uint8_t i_chipletId, + uint8_t i_sysPhase, + char *i_ringName); + int get_delta_ring_from_image( - char *i_fnImage, + char *i_fnImage, char *i_varName, - uint32_t i_ddLevel, + uint32_t i_ddLevel, uint8_t i_sysPhase, uint8_t i_override, MetaData **o_metaData, CompressedScanData **o_deltaRingRS4, - uint32_t verbose); + uint32_t verbose); int write_wiggle_flip_to_image( - void *io_imageOut, - uint32_t *i_sizeImageMaxNew, + void *io_imageOut, + uint32_t *i_sizeImageMaxNew, DeltaRingLayout *i_ringLayout, - uint32_t *i_wfInline, - uint32_t i_wfInlineLenInWords); + uint32_t *i_wfInline, + uint32_t i_wfInlineLenInWords); int get_ring_layout_from_image( - const void *i_imageIn, - uint32_t i_ddLevel, - uint8_t i_sysPhase, + const void *i_imageIn, + uint32_t i_ddLevel, + uint8_t i_sysPhase, DeltaRingLayout *o_rs4RingLayout, - void **nextRing); + void **nextRing); int create_wiggle_flip_prg( - uint32_t *i_deltaRing, - uint32_t i_ringBitLen, - uint32_t i_scanSelectData, - uint32_t i_chipletID, - uint32_t **o_wfInline, - uint32_t *o_wfInlineLenInWords); + uint32_t *i_deltaRing, + uint32_t i_ringBitLen, + uint32_t i_scanSelectData, + uint32_t i_chipletID, + uint32_t **o_wfInline, + uint32_t *o_wfInlineLenInWords, + uint32_t i_scanMaxRotate); int append_empty_section( void *io_image, @@ -253,6 +303,9 @@ int initialize_slw_section( void *io_image, uint32_t *i_sizeImageMaxNew); +int update_runtime_scom_pointer( + void *io_image); + void cleanup( void *buf1=NULL, void *buf2=NULL, @@ -309,7 +362,7 @@ inline uint64_t myRev64(const uint64_t i_x) // N-byte align an address, offset or size (aos) inline uint64_t myByteAlign( const uint8_t nBytes, const uint64_t aos) { - return (aos+nBytes-1)/nBytes*nBytes; + return ((aos+nBytes-1)/nBytes)*nBytes; } #ifdef __cplusplus diff --git a/src/usr/hwpf/hwp/build_winkle_images/proc_slw_build/p8_image_help.C b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_image_help.C index c2b17595e..2d5814632 100644 --- a/src/usr/hwpf/hwp/build_winkle_images/proc_slw_build/p8_image_help.C +++ b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_image_help.C @@ -1,26 +1,27 @@ -/* IBM_PROLOG_BEGIN_TAG - * This is an automatically generated prolog. - * - * $Source: src/usr/hwpf/hwp/build_winkle_images/proc_slw_build/p8_image_help.C $ - * - * IBM CONFIDENTIAL - * - * COPYRIGHT International Business Machines Corp. 2012 - * - * p1 - * - * Object Code Only (OCO) source materials - * Licensed Internal Code Source Materials - * IBM HostBoot Licensed Internal Code - * - * The source code for this program is not published or other- - * wise divested of its trade secrets, irrespective of what has - * been deposited with the U.S. Copyright Office. - * - * Origin: 30 - * - * IBM_PROLOG_END_TAG - */ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_image_help.C $ */ +/* */ +/* IBM CONFIDENTIAL */ +/* */ +/* COPYRIGHT International Business Machines Corp. 2012 */ +/* */ +/* p1 */ +/* */ +/* Object Code Only (OCO) source materials */ +/* Licensed Internal Code Source Materials */ +/* IBM HostBoot Licensed Internal Code */ +/* */ +/* The source code for this program is not published or otherwise */ +/* divested of its trade secrets, irrespective of what has been */ +/* deposited with the U.S. Copyright Office. */ +/* */ +/* Origin: 30 */ +/* */ +/* IBM_PROLOG_END_TAG */ +// $Id: p8_image_help.C,v 1.28 2012/09/27 20:59:51 cmolsen Exp $ +// /*------------------------------------------------------------------------------*/ /* *! TITLE : p8_image_help.C */ /* *! DESCRIPTION : Helper functions for building and extracting information */ @@ -37,9 +38,9 @@ // /*------------------------------------------------------------------------------*/ -#include "p8_delta_scan_rw.h" -#include "p8_pore_table_gen_api.H" -#include "common_scom_addresses.H" +#include <p8_delta_scan_rw.h> +#include <p8_pore_table_gen_api.H> +#include <common_scom_addresses.H> #ifdef __FAPI #include <fapi.H> @@ -57,11 +58,11 @@ int get_ring_layout_from_image( const void *i_imageIn, { uint32_t rc=0, rcLoc=0; uint8_t bRingFound=0, bRingEOS=0; - DeltaRingLayout *thisRingLayout, *nextRingLayout; //Pointers into memory mapped image. DO NOT CHANGE MEMBERS! + DeltaRingLayout *thisRingLayout=NULL, *nextRingLayout=NULL; //Pointers into memory mapped image. DO NOT CHANGE MEMBERS! uint32_t sizeInitf; SbeXipSection hostSection; void *initfHostAddress0; - + SBE_XIP_ERROR_STRINGS(errorStrings); // Always first get the .initf stats from the TOC: @@ -79,7 +80,7 @@ int get_ring_layout_from_image( const void *i_imageIn, MY_INF("INFO : No ring data exists for the section ID = SBE_XIP_SECTION_RINGS (ID=%i).",SBE_XIP_SECTION_RINGS); return DSLWB_RING_SEARCH_NO_MATCH; // Implies exhaust search as well. } - initfHostAddress0 = (void*)((uintptr_t)i_imageIn + hostSection.iv_offset); + initfHostAddress0 = (void*)((uintptr_t)i_imageIn + hostSection.iv_offset); sizeInitf = hostSection.iv_size; // On first call, get the base offset to the .initf section. @@ -90,16 +91,16 @@ int get_ring_layout_from_image( const void *i_imageIn, else nextRingLayout = (DeltaRingLayout*)*nextRing; - MY_DBG("initfHostAddress0 = 0x%016llx",(uint64_t)initfHostAddress0); + MY_DBG("initfHostAddress0 = 0x%016llx",(uint64_t)initfHostAddress0); MY_DBG("sizeInitf = %i", sizeInitf); MY_DBG("nextRingLayout = 0x%016llx",(uint64_t)nextRingLayout); - + // Populate the output RS4 ring BE layout structure as well as local structure in host LE format where needed. // Note! Entire memory content is in BE format. So we do LE conversions where needed. // bRingFound = 0; bRingEOS = 0; - + // SEARCH loop: Parse ring blocks successively until we find a ring that matches: // ddLevel == i_ddLevel // sysPhase == i_sysPhase @@ -112,7 +113,7 @@ int get_ring_layout_from_image( const void *i_imageIn, MY_DBG("Next override = %i",thisRingLayout->override); MY_DBG("Next reserved1 = %i",thisRingLayout->reserved1); MY_DBG("Next reserved2 = %i",thisRingLayout->reserved2); - + if (myRev32(thisRingLayout->ddLevel)==i_ddLevel) { // Is there a non-specific DD level, like for sys phase? if ((thisRingLayout->sysPhase==0 && i_sysPhase==0) || (thisRingLayout->sysPhase==1 && i_sysPhase==1) || @@ -128,7 +129,7 @@ int get_ring_layout_from_image( const void *i_imageIn, *nextRing = NULL; MY_DBG("\tRing search exhausted!"); } - + } // End of SEARCH. if (bRingFound) { @@ -136,7 +137,7 @@ int get_ring_layout_from_image( const void *i_imageIn, rcLoc = DSLWB_RING_SEARCH_EXHAUST_MATCH; else rcLoc = DSLWB_RING_SEARCH_MATCH; - } + } else { *nextRing = NULL; if (bRingEOS) @@ -156,29 +157,29 @@ int get_ring_layout_from_image( const void *i_imageIn, o_rs4RingLayout->override = thisRingLayout->override; o_rs4RingLayout->reserved1 = thisRingLayout->reserved1; o_rs4RingLayout->reserved2 = thisRingLayout->reserved2; - o_rs4RingLayout->metaData = (char*)(&thisRingLayout->reserved2 + + o_rs4RingLayout->metaData = (char*)(&thisRingLayout->reserved2 + sizeof(thisRingLayout->reserved2)); - o_rs4RingLayout->rs4Launch = (uint32_t*)((uintptr_t)thisRingLayout + + o_rs4RingLayout->rs4Launch = (uint32_t*)((uintptr_t)thisRingLayout + myRev64(thisRingLayout->entryOffset)); // entryOffset, rs4Launch and ASM_RS4_LAUNCH_BUF_SIZE should already be 8-byte aligned. - o_rs4RingLayout->rs4Delta = (uint32_t*)( (uintptr_t)thisRingLayout + + o_rs4RingLayout->rs4Delta = (uint32_t*)( (uintptr_t)thisRingLayout + myRev64(thisRingLayout->entryOffset) + ASM_RS4_LAUNCH_BUF_SIZE ); - // Check that the ring layout structure in the memory is 8-byte aligned. This must + // Check that the ring layout structure in the memory is 8-byte aligned. This must // be so because: - // - The entryOffset address must be on an 8-byte boundary because the start of the - // .rings section must be 8-byte aligned AND because the rs4Delta member is the + // - The entryOffset address must be on an 8-byte boundary because the start of the + // .rings section must be 8-byte aligned AND because the rs4Delta member is the // last member and which must itself be 8-byte aligned. - // - These two things together means that both the beginning and end of the delta - // ring layout must be 8-byte aligned, and thus the whole block, i.e. sizeOfThis, + // - These two things together means that both the beginning and end of the delta + // ring layout must be 8-byte aligned, and thus the whole block, i.e. sizeOfThis, // must therefore automatically be 8-byte aligned. // Also check that the RS4 delta ring is 8-byte aligned. // Also check that the RS4 launcher is 8-byte aligned. // - if (((uintptr_t)thisRingLayout-(uintptr_t)i_imageIn)%8 || - myRev32(o_rs4RingLayout->sizeOfThis)%8 || - myRev64(o_rs4RingLayout->entryOffset)%8 || + if (((uintptr_t)thisRingLayout-(uintptr_t)i_imageIn)%8 || + myRev32(o_rs4RingLayout->sizeOfThis)%8 || + myRev64(o_rs4RingLayout->entryOffset)%8 || ASM_RS4_LAUNCH_BUF_SIZE%8) { MY_ERR("ERROR : Ring block or layout structure is not 8-byte aligned:"); MY_ERR(" thisRingLayout-imageIn = %i",(uintptr_t)thisRingLayout-(uintptr_t)i_imageIn); @@ -210,7 +211,8 @@ int create_wiggle_flip_prg( uint32_t *i_deltaRing, // scan ring delta s uint32_t i_scanSelectData, // Scan ring modifier data uint32_t i_chipletID, // Chiplet ID uint32_t **o_wfInline, // location of the PORE instructions data stream - uint32_t *o_wfInlineLenInWords) // final length of data stream + uint32_t *o_wfInlineLenInWords, // final length of data stream + uint32_t i_scanMaxRotate) // Max rotate bit len on 38xxx { uint32_t rc=0; //defined in p8_pore_api_const.h uint32_t i=0; @@ -220,23 +222,14 @@ int create_wiggle_flip_prg( uint32_t *i_deltaRing, // scan ring delta s uint32_t scanRingCheckWord=0; uint32_t count=0; uint32_t rotateLen=0, remainder=0, remainingBits=0; - int pgas_rc=0; uint64_t pore_imm64b=0; - uint32_t maxWfInlineLenInWords = 10*MAX_RING_SIZE/32; + uint32_t maxWfInlineLenInWords = 3*MAX_RING_SIZE/32; PoreInlineContext ctx; *o_wfInline = (uint32_t*)malloc(maxWfInlineLenInWords); -/* Uncomment to dump ring state - printf("\n"); - for (i=0; i<i_ringBitLen/4; i++) { - printf("%02x",*((uint8_t*)i_deltaRing+i)); - if ((i+1)%32==0) printf("\n"); - } -*/ - pore_inline_context_create(&ctx, *o_wfInline, maxWfInlineLenInWords * 4, 0, 0); - + // Get chiplet and Ring Addr info. // -------------------------------------------------------------------------- @@ -248,97 +241,136 @@ int create_wiggle_flip_prg( uint32_t *i_deltaRing, // scan ring delta s // Descr: SCOM reg for scan ring shifting. scanRing_poreAddr=scanRing_baseAddr; // Init scan ring rotate addr scanRingCheckWord=P8_SCAN_CHECK_WORD; // Header check word for checking ring write was successful - -#ifndef SLW_BUILD_WF_P0_FIX - // This fix is a direct copy of the setp1_mcreadand macro in ./ipl/sbe/p8_slw.H + + // This fix is a direct copy of the setp1_mcreadand macro in ./ipl/sbe/p8_slw.H uint64_t CLEAR_MC_TYPE_MASK=0x47; PoreInlineLocation src1=0, src2=0, tgt1=0, tgt2=0; - pgas_rc = pore_MR( &ctx, D1, P0); - pgas_rc = pgas_rc + pore_ANDI( &ctx, D1, D1, BIT(57)); - pgas_rc = pgas_rc + PORE_LOCATION( &ctx, src1); - pgas_rc = pgas_rc + pore_BRANZ( &ctx, D1, src1); - pgas_rc = pgas_rc + pore_MR( &ctx, P1, P0); - pgas_rc = pgas_rc + PORE_LOCATION( &ctx, src2); - pgas_rc = pgas_rc + pore_BRA( &ctx, tgt2); - pgas_rc = pgas_rc + PORE_LOCATION( &ctx, tgt1); - pgas_rc = pgas_rc + pore_MR( &ctx, D1, P0); - pgas_rc = pgas_rc + pore_ANDI( &ctx, D1, D1, CLEAR_MC_TYPE_MASK); - pgas_rc = pgas_rc + pore_ORI( &ctx, D1, D1, BIT(60)); - pgas_rc = pgas_rc + pore_MR( &ctx, P1, D1); - pgas_rc = pgas_rc + PORE_LOCATION( &ctx, tgt2); - if (pgas_rc>0) { - MY_ERR("***setp1_mcreadand rc = %d", pgas_rc); - return pgas_rc; - } - pgas_rc = pore_inline_branch_fixup( &ctx, src1, tgt1); - if (pgas_rc>0) { - MY_ERR("***inline_branch_fixup error (1) rc = %d", pgas_rc); - return pgas_rc; - } - pgas_rc = pore_inline_branch_fixup( &ctx, src2, tgt2); - if (pgas_rc>0) { - MY_ERR("***inline_branch_fixup error (2) rc = %d", pgas_rc); - return pgas_rc; + pore_MR( &ctx, D1, P0); + pore_ANDI( &ctx, D1, D1, BIT(57)); + PORE_LOCATION( &ctx, src1); + pore_BRANZ( &ctx, D1, src1); + pore_MR( &ctx, P1, P0); + PORE_LOCATION( &ctx, src2); + pore_BRA( &ctx, tgt2); + PORE_LOCATION( &ctx, tgt1); + pore_MR( &ctx, D1, P0); + pore_ANDI( &ctx, D1, D1, CLEAR_MC_TYPE_MASK); + pore_ORI( &ctx, D1, D1, BIT(60)); + pore_MR( &ctx, P1, D1); + PORE_LOCATION( &ctx, tgt2); + if (ctx.error > 0) { + MY_ERR("***setp1_mcreadand rc = %d", ctx.error); + return ctx.error; } -#else - uint32_t epmCID = 0x11; - pgas_rc = pore_LS(&ctx, P0, epmCID); //bits 2:7 get loaded to perv reg 26:31 - if (pgas_rc>0) { - MY_ERR("***LS rc = %d", pgas_rc); - return pgas_rc; + pore_inline_branch_fixup( &ctx, src1, tgt1); + if (ctx.error > 0) { + MY_ERR("***inline_branch_fixup error (1) rc = %d", ctx.error); + return ctx.error; } -#endif - + pore_inline_branch_fixup( &ctx, src2, tgt2); + if (ctx.error > 0) { + MY_ERR("***inline_branch_fixup error (2) rc = %d", ctx.error); + return ctx.error; + } + + // We can assume that atomic lock is already in effect prior to WF calls. + // It can probably also be assumed that functional clocks are stopped, but + // let's do it and check for it anyway. +/* CMO: 20120927 - Not working - Being debugged by EPM + PoreInlineLocation src0=0,tgt0=0; + pore_imm64b = uint64_t(0x8C200E00)<<32; + pore_STI(&ctx, P8_PORE_CLOCK_REGION_0x00030006, P0, pore_imm64b); + pore_LD(&ctx, D1, P8_PORE_CLOCK_STATUS_0x00030008, P1); + pore_imm64b = uint64_t(0xFFFFFFFF)<<32 | uint64_t(0xFFFFFFFF); + pore_XORI( &ctx, D1, D1, pore_imm64b); + PORE_LOCATION( &ctx, src0); + pore_BRAZ( &ctx, D1, src0); + pore_HALT( &ctx); + PORE_LOCATION( &ctx, tgt0); + pore_inline_branch_fixup( &ctx, src0, tgt0); + if (ctx.error > 0) { + MY_ERR("***inline_branch_fixup error (0) rc = %d", ctx.error); + return ctx.error; + } +*/ + // Program scanselq reg for scan clock control setup before ring scan pore_imm64b = ((uint64_t)i_scanSelectData) << 32; - pgas_rc = pore_STI(&ctx, scanSelectAddr, P0, pore_imm64b); - if (pgas_rc>0) { - MY_ERR("***STI rc = %d", pgas_rc); - return pgas_rc; + pore_STI(&ctx, scanSelectAddr, P0, pore_imm64b); + if (ctx.error > 0) { + MY_ERR("***STI rc = %d", ctx.error); + return ctx.error; + } + +#ifdef IMGBUILD_PPD_WF_POLLING_PROT + // Setup On Product Clock Generator (OPCG) for polling. + pore_imm64b = uint64_t(0x01800000)<<32; + pore_STI(&ctx, P8_PORE_OPCG_CTRL_REG0_0x00030002, P0, pore_imm64b); + pore_imm64b = uint64_t(0x11480000)<<32 | uint64_t(0x00014800); + pore_STI(&ctx, P8_PORE_OPCG_CTRL_REG1_0x00030003, P0, pore_imm64b); + pore_imm64b = uint64_t(0x00000000)<<32 | uint64_t(0x0fff2800); + pore_STI(&ctx, P8_PORE_OPCG_CTRL_REG2_0x00030004, P0, pore_imm64b); + pore_imm64b = uint64_t(0x00000000); + pore_STI(&ctx, P8_PORE_OPCG_START_REG3_0x00030005, P0, pore_imm64b); + if (ctx.error > 0) { + MY_ERR("***POLLING PROT(1) rc = %d", ctx.error); + return ctx.error; } +#endif - // Preload the scan data/shift reg with the scan header check word. + +#ifdef IMGBUILD_PPD_WF_WORST_CASE_PIB + uint32_t poreCTR=0; + // Save CTR value and restore it when done. +/* + pore_MV(&ctx, A1, CTR); + if (ctx.error > 0) { + MY_ERR("***WORST CASE PIB(1) rc = %d", ctx.error); + return ctx.error; + } +*/ +#endif + + // Preload the scan data/shift reg with the scan header check word. // pore_imm64b = ((uint64_t)scanRingCheckWord) << 32; - pgas_rc = pore_LI(&ctx, D0, pore_imm64b ); - if (pgas_rc > 0) { - MY_ERR("***(1)LI D0 rc = %d", pgas_rc); - return pgas_rc; + pore_LI(&ctx, D0, pore_imm64b ); + if (ctx.error > 0) { + MY_ERR("***(1)LI D0 rc = %d", ctx.error); + return ctx.error; } - pgas_rc = pore_STD(&ctx, D0, scanRing_baseAddr, P0); - if (pgas_rc > 0) { - MY_ERR("***STD D0 rc = %d", pgas_rc); - return pgas_rc; + pore_STD(&ctx, D0, scanRing_baseAddr, P0); + if (ctx.error > 0) { + MY_ERR("***STD D0 rc = %d", ctx.error); + return ctx.error; } - + // Check how many 32-bit shift ops are needed and if we need final shift of remaining bit. count = i_ringBitLen/32; remainder = i_ringBitLen%32; if (remainder >0) count = count + 1; - + // From P7+: skip first 32 bits associated with FSI engine //TODO: check with perv design team if FSI 32 bit assumption is still valid in p8 //remainingBits=i_ringBitLen-32; // CMO: I changed the following to not skip the first 32-bit. //remainingBits = i_ringBitLen-32; //Yong impl. remainingBits = i_ringBitLen; //Mike impl. - + MY_DBG("count=%i rem=%i remBits=%i",count,remainder,remainingBits); // Compare 32 bit data at a time then shift ring (p7+ reqmt) - // TODO: check if p8 still requires skipping the 1st 32 bit // Read and compare init and flush values 32 bits at a time. Store delta in o_delta buffer. //for (i=1; i<count; i++) { //Yong impl for (i=0; i<count; i++) { //Mike impl - + //==================================================================================== // If flush & init values are identical, increase the read count, no code needed. - // When the discrepancy is found, read (rotate the ring) up to current address + // When the discrepancy is found, read (rotate the ring) up to current address // then scan/write in the last 32 bits //==================================================================================== - // TODO: add polling routine and change the max ring to 65535? Need to check with HW team // Note: For PORE scan instruction, set Port to 3. Bit 16 Must be set to 1. if (i_deltaRing[i] > 0) { @@ -352,21 +384,64 @@ int create_wiggle_flip_prg( uint32_t *i_deltaRing, // scan ring delta s // TODO: Not useing SCR1RDA : check with perv team // TODO: what to do with 1st 32 bit for FSI?? //-------------------------------------------------------------------------- - //CMO: This addr calc only works if baseAddr=0 in those bits where rotateLen=1? - scanRing_poreAddr=scanRing_baseAddr | rotateLen; - - MY_DBG("base addr = 0x8%x, pore addr = 0x8%x, rotatelen = %d", scanRing_baseAddr, scanRing_poreAddr, rotateLen); - //SCR1RD: shift out then read - pgas_rc=pore_LD(&ctx, D0, scanRing_poreAddr, P1); - if (pgas_rc > 0) { - MY_ERR("***LD D0 rc = %d", pgas_rc); - return pgas_rc; - } +#ifdef IMGBUILD_PPD_WF_POLLING_PROT + uint32_t nwait1=0; + PoreInlineLocation srcp1=0,tgtp1=0; + if (rotateLen>0x20) { + scanRing_poreAddr=scanRing_baseAddr | 0x20; + pore_LD(&ctx, D0, scanRing_poreAddr, P1); + rotateLen = rotateLen-0x20; + nwait1 = rotateLen * OPCG_SCAN_RATIO / 20 + 1; // 20x over sampling. + pore_STI(&ctx, P8_PORE_OPCG_CTRL_REG0_0x00030002, P0, + P8_OPCG_SCAN_RATIO_BITS|P8_OPCG_GO_BITS|uint64_t(rotateLen-1)); + PORE_LOCATION(&ctx, tgtp1); + pore_WAITS(&ctx, nwait1); + pore_LD(&ctx, D0, GENERIC_GP1_0x00000001, P1); + pore_ANDI(&ctx, D0, D0, P8_SCAN_POLL_MASK_BIT15); + PORE_LOCATION(&ctx, srcp1); + pore_BRAZ(&ctx, D0, tgtp1); + pore_inline_branch_fixup(&ctx, srcp1, tgtp1); + } + else { + scanRing_poreAddr=scanRing_baseAddr | rotateLen; + pore_LD(&ctx, D0, scanRing_poreAddr, P1); + } + if (ctx.error > 0) { + MY_ERR("***POLLING PROT(2) rc = %d", ctx.error); + return ctx.error; + } +#else +#ifdef IMGBUILD_PPD_WF_WORST_CASE_PIB + PoreInlineLocation srcwc1=0,tgtwc1=0; + poreCTR = rotateLen/i_scanMaxRotate-1; + if (poreCTR>=0) { + scanRing_poreAddr = scanRing_baseAddr | i_scanMaxRotate; + pore_LS(&ctx, CTR, poreCTR); + PORE_LOCATION(&ctx, tgtwc1); + pore_LD(&ctx, D0, scanRing_poreAddr, P1); + PORE_LOCATION(&ctx, srcwc1); + pore_LOOP(&ctx, tgtwc1); + pore_inline_branch_fixup(&ctx, srcwc1, tgtwc1); + } + scanRing_poreAddr = scanRing_baseAddr | (rotateLen-i_scanMaxRotate*(poreCTR+1)); + pore_LD(&ctx, D0, scanRing_poreAddr, P1); + if (ctx.error > 0) { + MY_ERR("***WORST CASE PIB(1) rc = %d", ctx.error); + return ctx.error; + } +#else + scanRing_poreAddr=scanRing_baseAddr | rotateLen; + pore_LD(&ctx, D0, scanRing_poreAddr, P1); + if (ctx.error > 0) { + MY_ERR("***LD D0 rc = %d", ctx.error); + return ctx.error; + } +#endif +#endif } // End of if (rotateLen>0) - // If the rotate length is <= 32, rotate by 32 or remaining bits if len <32 if (remainingBits>32) scanRing_poreAddr = scanRing_baseAddr | 32; else @@ -374,184 +449,281 @@ int create_wiggle_flip_prg( uint32_t *i_deltaRing, // scan ring delta s pore_imm64b = ((uint64_t)myRev32(i_deltaRing[i])) << 32; - pgas_rc = pore_LI(&ctx, D0, pore_imm64b ); - if (pgas_rc > 0) { - MY_ERR("***(2)LI D0 rc = %d", pgas_rc); - return pgas_rc; + pore_LI(&ctx, D0, pore_imm64b ); + if (ctx.error > 0) { + MY_ERR("***(2)LI D0 rc = %d", ctx.error); + return ctx.error; } - pgas_rc = pore_STD(&ctx, D0, scanRing_poreAddr, P0); - if (pgas_rc > 0) { - MY_ERR("***STD D0 rc = %d", pgas_rc); - return pgas_rc; + pore_STD(&ctx, D0, scanRing_poreAddr, P0); + if (ctx.error > 0) { + MY_ERR("***STD D0 rc = %d", ctx.error); + return ctx.error; } rotateLen=0; //reset rotate length - } - else { - // OK, so i_deltaRing==0 (init and alter states are identical) - // Increase rotate length by remaining scan bits (32 by default) - // TODO : the max rotate ring size needs to be modified. - // there will be no size limit, but will add polling once the feture is available - - // Increase rotate length by remaining scan bits (default 32 bits) + + } + else { + // i_deltaRing[i]==0 (i.e., init and alter states are identical). + // Increase rotate length by remaining scan bits (32 by default). + + // Increase rotate length by remaining scan bits (default 32 bits) if (remainingBits>32) rotateLen = rotateLen + 32; else - rotateLen = rotateLen + remainingBits; - - // This section will be modfied - // PORE does not release PIB/PCB until CC acks, thus limiting bandwidth - // It will time out if more than 4095 bits need to be rotated - // If rotate length is more than 4032 (allows to rotate up to 4064 bits - // Rotate the chain and reset rotate length counter + rotateLen = rotateLen + remainingBits; + +#ifdef IMGBUILD_PPD_WF_POLLING_PROT + uint32_t nwait2=0; + PoreInlineLocation srcp2=0,tgtp2=0; + // Max loop count is 16^7-1, so make sure we never exceed that. + if (rotateLen>=0xFFFFFE0) { + MY_DBG("/n/nScanning should never be here, should it?/n/n"); + scanRing_poreAddr=scanRing_baseAddr | 0x20; + pore_LD(&ctx, D0, scanRing_poreAddr, P1); + rotateLen = rotateLen-0x20; + nwait2 = rotateLen * OPCG_SCAN_RATIO / 20 + 1; // 20x over sampling. + pore_STI(&ctx, P8_PORE_OPCG_CTRL_REG0_0x00030002, P0, + P8_OPCG_SCAN_RATIO_BITS|P8_OPCG_GO_BITS|uint64_t(rotateLen-1)); + PORE_LOCATION(&ctx, tgtp2); + pore_WAITS(&ctx, nwait2); + pore_LD(&ctx, D0, GENERIC_GP1_0x00000001, P1); + pore_ANDI(&ctx, D0, D0, P8_SCAN_POLL_MASK_BIT15); + PORE_LOCATION(&ctx, srcp2); + pore_BRAZ(&ctx, D0, tgtp2); + pore_inline_branch_fixup(&ctx, srcp2, tgtp2); + if (ctx.error > 0) { + MY_ERR("***POLLING PROT(3) rc = %d", ctx.error); + return ctx.error; + } + rotateLen=0; + } +#else +#ifdef IMGBUILD_PPD_WF_WORST_CASE_PIB + // There is no max rotateLen issue in this case since we rotate 32 bits + // at a time. +#else + // PORE does not release PIB/PCB until CC acks, thus limiting bandwidth. + // It will time out if more than 4095 bits need to be rotated. + // If rotate length is more than 4032 (allows to rotate up to 4064 bits) + // rotate the chain and reset rotate length counter. if (rotateLen>0xFC0) { scanRing_poreAddr = scanRing_baseAddr | rotateLen; - pgas_rc = pore_LD(&ctx, D0, scanRing_poreAddr, P1); - if (pgas_rc > 0) { - MY_ERR("***LD D0 rc = %d", pgas_rc); - return pgas_rc; + pore_LD(&ctx, D0, scanRing_poreAddr, P1); + if (ctx.error > 0) { + MY_ERR("***LD D0 rc = %d", ctx.error); + return ctx.error; } - rotateLen=0; - } //end of if (roateLen >0xFC0) + } +#endif +#endif } //end of else (i_deltaRing==0) if (remainingBits>32) remainingBits = remainingBits - 32; else - remainingBits = 0; + remainingBits = 0; } // End of for loop - + // If the scan ring has not been rotated to the original position - // shift the ring by remaining shift bit length + // shift the ring by remaining shift bit length. (No need to do polling here.) if (rotateLen>0) { +#ifdef IMGBUILD_PPD_WF_POLLING_PROT + uint32_t nwait3=0; + PoreInlineLocation srcp3=0,tgtp3=0; + if (rotateLen>0x20) { + scanRing_poreAddr=scanRing_baseAddr | 0x20; + pore_LD(&ctx, D0, scanRing_poreAddr, P1); + rotateLen = rotateLen-0x20; + nwait3 = rotateLen * OPCG_SCAN_RATIO / 20 + 1; // 20x over sampling. + pore_STI(&ctx, P8_PORE_OPCG_CTRL_REG0_0x00030002, P0, + P8_OPCG_SCAN_RATIO_BITS|P8_OPCG_GO_BITS|uint64_t(rotateLen-1)); + PORE_LOCATION(&ctx, tgtp3); + pore_WAITS(&ctx, nwait3); + pore_LD(&ctx, D0, GENERIC_GP1_0x00000001, P1); + pore_ANDI(&ctx, D0, D0, P8_SCAN_POLL_MASK_BIT15); + PORE_LOCATION(&ctx, srcp3); + pore_BRAZ(&ctx, D0, tgtp3); + pore_inline_branch_fixup(&ctx, srcp3, tgtp3); + } + else { + scanRing_poreAddr=scanRing_baseAddr | rotateLen; + pore_LD(&ctx, D0, scanRing_poreAddr, P1); + } + if (ctx.error > 0) { + MY_ERR("***POLLING PROT(4) rc = %d", ctx.error); + return ctx.error; + } + rotateLen=0; +#else +#ifdef IMGBUILD_PPD_WF_WORST_CASE_PIB + PoreInlineLocation srcwc2=0,tgtwc2=0; + poreCTR = rotateLen/i_scanMaxRotate-1; + if (poreCTR>=0) { + scanRing_poreAddr = scanRing_baseAddr | i_scanMaxRotate; + pore_LS(&ctx, CTR, poreCTR); + PORE_LOCATION(&ctx, tgtwc2); + pore_LD(&ctx, D0, scanRing_poreAddr, P1); + PORE_LOCATION(&ctx, srcwc2); + pore_LOOP(&ctx, tgtwc2); + pore_inline_branch_fixup(&ctx, srcwc2, tgtwc2); + } + scanRing_poreAddr = scanRing_baseAddr | (rotateLen-i_scanMaxRotate*(poreCTR+1)); + pore_LD(&ctx, D0, scanRing_poreAddr, P1); + if (ctx.error > 0) { + MY_ERR("***WORST CASE PIB(2) rc = %d", ctx.error); + return ctx.error; + } + rotateLen=0; +#else scanRing_poreAddr=scanRing_baseAddr | rotateLen; - pgas_rc = pore_LD(&ctx, D0, scanRing_poreAddr, P1); - if (pgas_rc > 0) { - MY_ERR("***LD D0 rc = %d", pgas_rc); - return pgas_rc; + pore_LD(&ctx, D0, scanRing_poreAddr, P1); + if (ctx.error > 0) { + MY_ERR("***LD D0 rc = %d", ctx.error); + return ctx.error; } rotateLen=0; +#endif +#endif } +/* +#ifdef IMGBUILD_PPD_WF_WORST_CASE_PIB + // Restore CTR value. + pore_MV(&ctx, CTR, A1); + if (ctx.error > 0) { + MY_ERR("***WORST CASE PIB(5) rc = %d", ctx.error); + return ctx.error; + } +#endif +*/ + // Finally, check that our header check word went through in one piece. // Note, we first do the MC-READ-AND check, then the MC-READ-OR check -#ifndef SLW_BUILD_WF_P0_FIX // // ...First, do the MC-READ-AND check // (Reference: setp1_mcreadand macro in ./ipl/sbe/p8_slw.H) // PoreInlineLocation src3=0, src5=0, src7=0, src8=0, tgt3=0, tgt5=0, tgt7=0, tgt8=0; - pgas_rc = pore_MR( &ctx, D1, P0); - pgas_rc = pgas_rc + pore_ANDI( &ctx, D1, D1, BIT(57)); - pgas_rc = pgas_rc + PORE_LOCATION( &ctx, src3); - pgas_rc = pgas_rc + pore_BRANZ( &ctx, D1, src3); - pgas_rc = pgas_rc + pore_MR( &ctx, P1, P0); // If here, MC=0. Omit MC check in OR case. - pgas_rc = pgas_rc + PORE_LOCATION( &ctx, src7); - pgas_rc = pgas_rc + pore_BRA( &ctx, tgt7); - pgas_rc = pgas_rc + PORE_LOCATION( &ctx, tgt3); - pgas_rc = pgas_rc + pore_MR( &ctx, D1, P0); - pgas_rc = pgas_rc + pore_ANDI( &ctx, D1, D1, CLEAR_MC_TYPE_MASK); - pgas_rc = pgas_rc + pore_ORI( &ctx, D1, D1, BIT(60)); - pgas_rc = pgas_rc + pore_MR( &ctx, P1, D1); - if (pgas_rc>0) { - MY_ERR("***setp1_mcreadand rc = %d", pgas_rc); - return pgas_rc; - } - pgas_rc = pore_inline_branch_fixup( &ctx, src3, tgt3); - if (pgas_rc>0) { - MY_ERR("***inline_branch_fixup error (3) rc = %d", pgas_rc); - return pgas_rc; + pore_MR( &ctx, D1, P0); + pore_ANDI( &ctx, D1, D1, BIT(57)); + PORE_LOCATION( &ctx, src3); + pore_BRANZ( &ctx, D1, src3); + pore_MR( &ctx, P1, P0); // If here, MC=0. Omit MC check in OR case. + PORE_LOCATION( &ctx, src7); + pore_BRA( &ctx, tgt7); + PORE_LOCATION( &ctx, tgt3); + pore_MR( &ctx, D1, P0); + pore_ANDI( &ctx, D1, D1, CLEAR_MC_TYPE_MASK); + pore_ORI( &ctx, D1, D1, BIT(60)); + pore_MR( &ctx, P1, D1); + if (ctx.error > 0) { + MY_ERR("***setp1_mcreadand rc = %d", ctx.error); + return ctx.error; + } + pore_inline_branch_fixup( &ctx, src3, tgt3); + if (ctx.error > 0) { + MY_ERR("***inline_branch_fixup error (3) rc = %d", ctx.error); + return ctx.error; } // ...Load the output check word... - pgas_rc = pore_LD(&ctx, D0, scanRing_baseAddr, P1); + pore_LD(&ctx, D0, scanRing_baseAddr, P1); // Compare against the reference header check word... - pgas_rc = pgas_rc + pore_XORI( &ctx, D0, D0, ((uint64_t)scanRingCheckWord) << 32); - pgas_rc = pgas_rc + PORE_LOCATION( &ctx, src5); - pgas_rc = pgas_rc + pore_BRAZ( &ctx, D0, tgt5); - pgas_rc = pgas_rc + pore_HALT( &ctx); - pgas_rc = pgas_rc + PORE_LOCATION( &ctx, tgt5); - if (pgas_rc > 0) { - MY_ERR("***LD, XORI, BRANZ, RET or HALT went wrong rc = %d", pgas_rc); - return pgas_rc; - } - pgas_rc = pore_inline_branch_fixup( &ctx, src5, tgt5); - if (pgas_rc>0) { - MY_ERR("***inline_branch_fixup error (5) rc = %d", pgas_rc); - return pgas_rc; + pore_XORI( &ctx, D0, D0, ((uint64_t)scanRingCheckWord) << 32); +#ifdef IMGBUILD_PPD_DEBUG_WF +pore_LI( &ctx, D1, ((uint64_t)scanRingCheckWord)<<32); +#endif + PORE_LOCATION( &ctx, src5); + pore_BRAZ( &ctx, D0, tgt5); +#ifdef IMGBUILD_PPD_DEBUG_WF +if (i_scanSelectData==0x00200800 || i_scanSelectData==0x04000800) { +pore_LD(&ctx, D1, scanRing_baseAddr, P1); +if (i_scanSelectData==0x00200800) { + pore_XORI( &ctx, D1, D1, ((uint64_t)0x00000001)<<32); // Yields B in last nibble. +} +if (i_scanSelectData==0x04000800) { + pore_XORI( &ctx, D1, D1, ((uint64_t)0x00000006)<<32); // Yields C in last nibble. +} +pore_RET( &ctx); +} +#endif + pore_HALT( &ctx); + PORE_LOCATION( &ctx, tgt5); + if (ctx.error > 0) { + MY_ERR("***LD, XORI, BRANZ, RET or HALT went wrong rc = %d", ctx.error); + return ctx.error; + } + pore_inline_branch_fixup( &ctx, src5, tgt5); + if (ctx.error > 0) { + MY_ERR("***inline_branch_fixup error (5) rc = %d", ctx.error); + return ctx.error; } // // ...Now do the MC-READ-OR check // (Reference: setp1_mcreador macro in ./ipl/sbe/p8_slw.H) // Note. If we made is this far, we know that MC=1 already, so don't check for it. // - pgas_rc = pore_MR( &ctx, D1, P0); - pgas_rc = pgas_rc + pore_ANDI( &ctx, D1, D1, CLEAR_MC_TYPE_MASK); // This also clears bit-60. - pgas_rc = pgas_rc + pore_MR( &ctx, P1, D1); - pgas_rc = pgas_rc + PORE_LOCATION( &ctx, tgt7); - if (pgas_rc>0) { - MY_ERR("***setp1_mcreadand rc = %d", pgas_rc); - return pgas_rc; - } - pgas_rc = pore_inline_branch_fixup( &ctx, src7, tgt7); - if (pgas_rc>0) { - MY_ERR("***inline_branch_fixup error (7) rc = %d", pgas_rc); - return pgas_rc; + pore_MR( &ctx, D1, P0); + pore_ANDI( &ctx, D1, D1, CLEAR_MC_TYPE_MASK); // This also clears bit-60. + pore_MR( &ctx, P1, D1); + PORE_LOCATION( &ctx, tgt7); + if (ctx.error > 0) { + MY_ERR("***setp1_mcreadand rc = %d", ctx.error); + return ctx.error; + } + pore_inline_branch_fixup( &ctx, src7, tgt7); + if (ctx.error > 0) { + MY_ERR("***inline_branch_fixup error (7) rc = %d", ctx.error); + return ctx.error; } // ...Load the output check word... - pgas_rc = pore_LD(&ctx, D0, scanRing_baseAddr, P1); - pgas_rc = pgas_rc + pore_XORI( &ctx, D0, D0, ((uint64_t)scanRingCheckWord) << 32); - pgas_rc = pgas_rc + PORE_LOCATION( &ctx, src8); - pgas_rc = pgas_rc + pore_BRAZ( &ctx, D0, tgt8); - pgas_rc = pgas_rc + pore_HALT( &ctx); - pgas_rc = pgas_rc + PORE_LOCATION( &ctx, tgt8); - pgas_rc = pgas_rc + pore_LI( &ctx, D0, 0x0); // Do shadowing by setpulse. - pgas_rc = pgas_rc + pore_STD( &ctx, D0, GENERIC_CLK_SCAN_UPDATEDR_0x0003A000, P0); - pgas_rc = pgas_rc + pore_RET( &ctx); - if (pgas_rc > 0) { - MY_ERR("***LD, XORI, BRANZ, RET or HALT went wrong rc = %d", pgas_rc); - return pgas_rc; - } - pgas_rc = pore_inline_branch_fixup( &ctx, src8, tgt8); - if (pgas_rc>0) { - MY_ERR("***inline_branch_fixup error (8) rc = %d", pgas_rc); - return pgas_rc; + pore_LD(&ctx, D0, scanRing_baseAddr, P1); + pore_XORI( &ctx, D0, D0, ((uint64_t)scanRingCheckWord) << 32); +#ifdef IMGBUILD_PPD_DEBUG_WF +pore_LI( &ctx, D1, ((uint64_t)scanRingCheckWord)<<32); +#endif + PORE_LOCATION( &ctx, src8); + pore_BRAZ( &ctx, D0, tgt8); +#ifdef IMGBUILD_PPD_DEBUG_WF +if (i_scanSelectData==0x00200800 || i_scanSelectData==0x04000800) { +pore_LD(&ctx, D1, scanRing_baseAddr, P1); +if (i_scanSelectData==0x00200800) { + pore_XORI( &ctx, D1, D1, ((uint64_t)0x00000001)<<32); // Yields B in last nibble. +} +if (i_scanSelectData==0x04000800) { + pore_XORI( &ctx, D1, D1, ((uint64_t)0x00000006)<<32); // Yields C in last nibble. +} +pore_RET( &ctx); +} +#endif + pore_HALT( &ctx); + PORE_LOCATION( &ctx, tgt8); + pore_LI( &ctx, D0, 0x0); // Do shadowing by setpulse. + pore_STD( &ctx, D0, GENERIC_CLK_SCAN_UPDATEDR_0x0003A000, P0); + pore_RET( &ctx); + if (ctx.error > 0) { + MY_ERR("***LD, XORI, BRANZ, RET or HALT went wrong rc = %d", ctx.error); + return ctx.error; } -#else - PoreInlineLocation src3=0, tgt3=0; - // Load the output check word... - pgas_rc = pore_LD(&ctx, D0, scanRing_baseAddr, P1); - // Compare against the reference header check word... - pgas_rc = pgas_rc + pore_XORI( &ctx, D0, D0, ((uint64_t)scanRingCheckWord) << 32); - pgas_rc = pgas_rc + PORE_LOCATION( &ctx, src3); - // For now, branch to HALT instruction if NZ, otherwise return in the following instr ..eventually branch to firmware error_handler i.e. pore_BRANZ(&ctx, D0, error_handler) - pgas_rc = pgas_rc + pore_BRANZ( &ctx, D0, tgt3); //pore_BRANZ( &ctx, D0, ctx.lc+8) - pgas_rc = pgas_rc + pore_RET( &ctx); - pgas_rc = pgas_rc + PORE_LOCATION( &ctx, tgt3); - pgas_rc = pgas_rc + pore_HALT( &ctx); - if (pgas_rc > 0) { - MY_ERR("***LD, XORI, BRANZ, RET or HALT went wrong rc = %d", pgas_rc); - return pgas_rc; - } - pgas_rc = pore_inline_branch_fixup( &ctx, src3, tgt3); - if (pgas_rc>0) { - MY_ERR("***inline_branch_fixup error (3) rc = %d", pgas_rc); - return pgas_rc; + pore_inline_branch_fixup( &ctx, src8, tgt8); + if (ctx.error > 0) { + MY_ERR("***inline_branch_fixup error (8) rc = %d", ctx.error); + return ctx.error; } -#endif *o_wfInlineLenInWords = ctx.lc/4; // 8-byte align code, just as a precaution. if ((*o_wfInlineLenInWords*4)%8) { // Insert 4-byte NOP at end. - pgas_rc = pore_NOP( &ctx); - if (pgas_rc>0) { - MY_ERR("***NOP went wrong rc = %d", pgas_rc); - return pgas_rc; + pore_NOP( &ctx); + if (ctx.error > 0) { + MY_ERR("***NOP went wrong rc = %d", ctx.error); + return ctx.error; } *o_wfInlineLenInWords = ctx.lc/4; } @@ -575,37 +747,37 @@ int write_wiggle_flip_to_image( void *io_imageOut, void *ringsBuffer=NULL; uint32_t ringRingsOffset=0; uint64_t ringPoreAddress=0,backPtr=0,fwdPtr=0,fwdPtrCheck; - + SBE_XIP_ERROR_STRINGS(errorStrings); - MY_DBG("wfInlineLenInWords=%i", i_wfInlineLenInWords); - + MY_DBG("wfInlineLenInWords=%i", i_wfInlineLenInWords); + // Modify the input ring layout content - // - Remove the qualifier section: ddLevel, sysPhase, override and reserved1+2. + // - Remove the qualifier section: ddLevel, sysPhase, override and reserved1+2. // This means reducing the entryOffset by the size of these qualifiers. - // - The new WF ring block and start of WF code must both be 8-byte aligned. + // - The new WF ring block and start of WF code must both be 8-byte aligned. // - RS4 entryOffset is already 8-byte aligned. // - The WF code section, i.e. wfInlineLenInWords, is already 8-byte aligned. // - i_ringLayout->entryOffset = + i_ringLayout->entryOffset = myRev64( myByteAlign(8, myRev64(i_ringLayout->entryOffset) - sizeof(i_ringLayout->ddLevel) - sizeof(i_ringLayout->sysPhase) - sizeof(i_ringLayout->override) - sizeof(i_ringLayout->reserved1) - sizeof(i_ringLayout->reserved2) ) ); - i_ringLayout->sizeOfThis = + i_ringLayout->sizeOfThis = myRev32( myRev64(i_ringLayout->entryOffset) + i_wfInlineLenInWords*4 ); - + // Not really any need for this. Just being consistent. Once we have transitioned completely to new - // headers, then ditch i_wfInline from parm list and assign wfInline to layout in main program. + // headers, then ditch i_wfInline from parm list and assign wfInline to layout in main program. i_ringLayout->wfInline = i_wfInline; - + if (myRev64(i_ringLayout->entryOffset)%8 || myRev32(i_ringLayout->sizeOfThis)%8) { MY_ERR("ERROR : Ring block or WF code origin not 8-byte aligned."); return IMGBUILD_ERR_MISALIGNED_RING_LAYOUT; } - + // Calc the size of the data section we're adding and the resulting output image. // rc = sbe_xip_image_size( io_imageOut, &sizeImageIn); @@ -615,7 +787,7 @@ int write_wiggle_flip_to_image( void *io_imageOut, } sizeNewDataBlock = myRev32(i_ringLayout->sizeOfThis); // ...estimate max size of new image - sizeImageOutThisEst = sizeImageIn + sizeNewDataBlock + SBE_XIP_MAX_SECTION_ALIGNMENT; // + sizeImageOutThisEst = sizeImageIn + sizeNewDataBlock + SBE_XIP_MAX_SECTION_ALIGNMENT; // if (sizeImageOutThisEst>*i_sizeImageMaxNew) { MY_ERR("ERROR : Estimated new image size (=%i) would exceed max allowed size (=%i).", @@ -623,7 +795,7 @@ int write_wiggle_flip_to_image( void *io_imageOut, *i_sizeImageMaxNew = sizeImageOutThisEst; return IMGBUILD_ERR_IMAGE_TOO_LARGE; } - + MY_DBG("Input image size\t\t= %6i\n\tNew rings data block size\t= %6i\n\tOutput image size (max)\t\t<=%6i", sizeImageIn, sizeNewDataBlock, sizeImageOutThisEst); MY_DBG("entryOffset = %i\n\tsizeOfThis = %i\n\tMeta data size = %i", @@ -667,12 +839,12 @@ int write_wiggle_flip_to_image( void *io_imageOut, } deltaLC = i_wfInlineLenInWords*4; memcpy( (uint8_t*)ringsBuffer+bufLC, i_wfInline, deltaLC); - + // Append WF ring layout to .rings section of in-memory input image. // Note! All layout members should already be 8-byte aligned. // - rc = sbe_xip_append( io_imageOut, - SBE_XIP_SECTION_RINGS, + rc = sbe_xip_append( io_imageOut, + SBE_XIP_SECTION_RINGS, (void*)ringsBuffer, sizeNewDataBlock, sizeImageOutThisEst, @@ -694,7 +866,7 @@ int write_wiggle_flip_to_image( void *io_imageOut, return IMGBUILD_ERR_XIP_MISC; } MY_DBG("Successful append of RS4 ring to .rings. Next, update forward ptr..."); - + // Update forward pointer associated with the ring/var name + any override offset. // // Convert the ring offset (wrt .rings address) to an PORE address @@ -707,12 +879,12 @@ int write_wiggle_flip_to_image( void *io_imageOut, return IMGBUILD_ERR_XIP_MISC; } // ...then update the forward pointer, i.e. the old "variable/ring name's" pointer. - // DO NOT add any 8-byte offset if override ring. The backItemPtr already has this + // DO NOT add any 8-byte offset if override ring. The backItemPtr already has this // from p8_delta_scan. // backPtr = myRev64(i_ringLayout->backItemPtr); MY_DBG("backPtr = 0x%016llx", backPtr); - rc = sbe_xip_write_uint64( io_imageOut, + rc = sbe_xip_write_uint64( io_imageOut, backPtr, fwdPtr); rc = rc+sbe_xip_read_uint64(io_imageOut, @@ -724,7 +896,7 @@ int write_wiggle_flip_to_image( void *io_imageOut, return IMGBUILD_ERR_XIP_MISC; } if (fwdPtrCheck!=ringPoreAddress || backPtr!=myRev64(i_ringLayout->backItemPtr)) { - MY_ERR("ERROR : Forward or backward pointer mess. Check code."); + MY_ERR("ERROR : Forward or backward pointer mess. Check code."); MY_ERR("fwdPtr =0x%016llx",fwdPtr); MY_ERR("fwdPtrCheck =0x%016llx",fwdPtrCheck); MY_ERR("layout bckPtr=0x%016llx",myRev64(i_ringLayout->backItemPtr)); @@ -742,9 +914,9 @@ int write_wiggle_flip_to_image( void *io_imageOut, if (ringsBuffer) free(ringsBuffer); return IMGBUILD_ERR_XIP_MISC; } - + if (ringsBuffer) free(ringsBuffer); - + return rc; } @@ -764,12 +936,12 @@ int append_empty_section( void *io_image, SBE_XIP_ERROR_STRINGS(errorStrings); rc = 0; - + if (i_sizeSection==0) { MY_INF("INFO : Requested append size = 0. Nothing to do."); return rc; } - + // Check if there is enough room in the new image to add section. // sbe_xip_image_size( io_image, &sizeImageIn); @@ -781,12 +953,12 @@ int append_empty_section( void *io_image, *i_sizeImageMaxNew = sizeImageOutThisEst; return IMGBUILD_ERR_IMAGE_TOO_LARGE; } - + // Add the 0-initialized buffer as a section append. // bufEmpty = calloc( i_sizeSection, 1); - rc = sbe_xip_append( io_image, - i_sectionId, + rc = sbe_xip_append( io_image, + i_sectionId, bufEmpty, i_sizeSection, sizeImageOutThisEst, @@ -809,7 +981,7 @@ int append_empty_section( void *io_image, if (bufEmpty) free(bufEmpty); return IMGBUILD_ERR_XIP_MISC; } - + if (bufEmpty) free(bufEmpty); @@ -826,22 +998,20 @@ int initialize_slw_section( void *io_image, uint32_t *i_sizeImageMaxNew) { uint32_t rc=0, i_coreId=0, i_iis=0; - int pgas_rc=0; - void *bufRNNN=NULL; PoreInlineContext ctx; SbeXipSection xipSection; SbeXipItem xipTocItem; void *hostScomTableFirst, *hostScomTableNext, *hostScomVectorFirst, *hostScomVectorNext; uint64_t xipScomTableFirst; - + ////void *bufRNNN=NULL; + uint8_t bufRNNN[XIPSIZE_SCOM_ENTRY]; + SBE_XIP_ERROR_STRINGS(errorStrings); - rc = 0; - rc = append_empty_section( io_image, i_sizeImageMaxNew, SBE_XIP_SECTION_SLW, - SLW_RAM_TABLE_SIZE + SLW_SCOM_TABLE_SIZE); + SLW_RAM_TABLE_SIZE + SLW_SCOM_TABLE_SIZE_ALL); if (rc) return rc; @@ -853,68 +1023,114 @@ int initialize_slw_section( void *io_image, // Scomming table: Fill with RNNN (16-byte) instruction sequences. // - // ... allocate buffer to hold one RNNN instruction sequence. - bufRNNN = malloc( XIPSIZE_SCOM_ENTRY); - // ... create RNNN instruction sequence. - pore_inline_context_create( &ctx, bufRNNN, XIPSIZE_SCOM_ENTRY, 0, 0); - pgas_rc = pore_RET( &ctx); - pgas_rc = pgas_rc + pore_NOP( &ctx); - pgas_rc = pgas_rc + pore_NOP( &ctx); - pgas_rc = pgas_rc + pore_NOP( &ctx); - if (pgas_rc>0) { - MY_ERR("***_RET or _NOP generated rc = %d", pgas_rc); - if (bufRNNN) free(bufRNNN); + pore_inline_context_create( &ctx, (void*)bufRNNN, XIPSIZE_SCOM_ENTRY, 0, 0); + pore_RET( &ctx); + pore_NOP( &ctx); + pore_NOP( &ctx); + pore_NOP( &ctx); + if (ctx.error > 0) { + MY_ERR("***_RET or _NOP generated rc = %d", ctx.error); return IMGBUILD_ERR_PORE_INLINE_ASM; } - + // ... get host and pore location of Scom table in .slw section. rc = sbe_xip_get_section( io_image, SBE_XIP_SECTION_SLW, &xipSection); if (rc) { MY_ERR("ERROR : sbe_xip_get_section() failed: %s", SBE_XIP_ERROR_STRING(errorStrings, rc)); MY_ERR("Probable cause:"); MY_ERR("\tThe section (=SBE_XIP_SECTION_SLW=%i) was not found.",SBE_XIP_SECTION_SLW); - if (bufRNNN) free(bufRNNN); return IMGBUILD_ERR_KEYWORD_NOT_FOUND; } hostScomTableFirst = (void*)((uintptr_t)io_image + xipSection.iv_offset + SLW_RAM_TABLE_SIZE); sbe_xip_host2pore( io_image, hostScomTableFirst, &xipScomTableFirst); -//#ifdef DUMMY_DEF1 // Undo this ifdef once Scom vector name is defined in TOC. // ... get location of Scom vector from TOC. rc = sbe_xip_find( io_image, SLW_HOST_SCOM_VECTOR_TOC_NAME, &xipTocItem); if (rc) { MY_ERR("ERROR : sbe_xip_find() failed w/rc=%i and %s", rc, SBE_XIP_ERROR_STRING(errorStrings, rc)); MY_ERR("Probable cause:"); MY_ERR("\tThe keyword (=%s) was not found.",SLW_HOST_SCOM_VECTOR_TOC_NAME); - if (bufRNNN) free(bufRNNN); return IMGBUILD_ERR_KEYWORD_NOT_FOUND; } - rc = sbe_xip_pore2host( io_image, xipTocItem.iv_address, &hostScomVectorFirst); + sbe_xip_pore2host( io_image, xipTocItem.iv_address, &hostScomVectorFirst); // ... populate entire Scom table with RNNN IIS. - for (i_iis=0; i_iis<SLW_SCOM_TABLE_SIZE; i_iis=i_iis+XIPSIZE_SCOM_ENTRY) { + for (i_iis=0; i_iis<SLW_SCOM_TABLE_SIZE_ALL; i_iis=i_iis+XIPSIZE_SCOM_ENTRY) { hostScomTableNext = (void*)( (uintptr_t)hostScomTableFirst + i_iis); - memcpy( hostScomTableNext, bufRNNN, XIPSIZE_SCOM_ENTRY); + memcpy( hostScomTableNext, (void*)bufRNNN, XIPSIZE_SCOM_ENTRY); } - // ... update Scom vector. + // ... update Non-cache Scom vector. for (i_coreId=0; i_coreId<SLW_MAX_CORES; i_coreId++) { hostScomVectorNext = (void*)( (uint64_t*)hostScomVectorFirst + i_coreId); *(uint64_t*)hostScomVectorNext = myRev64( xipScomTableFirst + - SLW_SCOM_TABLE_SPACE_PER_CORE*i_coreId); + SLW_SCOM_TABLE_SPACE_PER_CORE_NC*i_coreId); } -//#endif - - if (bufRNNN) free(bufRNNN); return rc; } -void cleanup( void *buf1, - void *buf2, +// update_runtime_scom_pointer() +// - reprogram host_runtime_scom data to point to sub_slw_runtime_scom +// - reprogram ex_enable_runtime_scom data to point to sub_slw_ex_enable_runtime_scom +int update_runtime_scom_pointer( void *io_image) +{ + int rc=0; + uint64_t xipSlwRuntimeAddr; + uint64_t xipSlwExEnableRuntimeAddr; + + SBE_XIP_ERROR_STRINGS(errorStrings); + + // Get address of sub_slw_runtime_scom subroutine. + // + rc = sbe_xip_get_scalar( io_image, SLW_RUNTIME_SCOM_TOC_NAME, &xipSlwRuntimeAddr); + if (rc) { + MY_ERR("ERROR : sbe_xip_set_scalar() failed w/rc=%i and %s", rc, SBE_XIP_ERROR_STRING(errorStrings, rc)); + MY_ERR("Probable cause:"); + MY_ERR("\tThe keyword (=%s) was not found.",SLW_RUNTIME_SCOM_TOC_NAME); + return IMGBUILD_ERR_KEYWORD_NOT_FOUND; + } + + // Update host_runtime_scom with sub_slw_runtime_scom's address. + // + rc = sbe_xip_set_scalar( io_image, HOST_RUNTIME_SCOM_TOC_NAME, xipSlwRuntimeAddr); + if (rc) { + MY_ERR("ERROR : sbe_xip_set_scalar() failed w/rc=%i and %s", rc, SBE_XIP_ERROR_STRING(errorStrings, rc)); + MY_ERR("Probable cause:"); + MY_ERR("\tThe keyword (=%s) was not found.",HOST_RUNTIME_SCOM_TOC_NAME); + return IMGBUILD_ERR_KEYWORD_NOT_FOUND; + } + + // Get address of sub_slw_ex_enable_runtime_scom subroutine. + // + rc = sbe_xip_get_scalar( io_image, SLW_EX_ENABLE_RUNTIME_SCOM_TOC_NAME, &xipSlwExEnableRuntimeAddr); + if (rc) { + MY_ERR("ERROR : sbe_xip_set_scalar() failed w/rc=%i and %s", rc, SBE_XIP_ERROR_STRING(errorStrings, rc)); + MY_ERR("Probable cause:"); + MY_ERR("\tThe keyword (=%s) was not found.",SLW_EX_ENABLE_RUNTIME_SCOM_TOC_NAME); + return IMGBUILD_ERR_KEYWORD_NOT_FOUND; + } + + // Update host_runtime_scom with sub_slw_ex_enable_runtime_scom's address. + // + rc = sbe_xip_set_scalar( io_image, EX_ENABLE_RUNTIME_SCOM_TOC_NAME, xipSlwExEnableRuntimeAddr); + if (rc) { + MY_ERR("ERROR : sbe_xip_set_scalar() failed w/rc=%i and %s", rc, SBE_XIP_ERROR_STRING(errorStrings, rc)); + MY_ERR("Probable cause:"); + MY_ERR("\tThe keyword (=%s) was not found.",EX_ENABLE_RUNTIME_SCOM_TOC_NAME); + return IMGBUILD_ERR_KEYWORD_NOT_FOUND; + } + + return 0; +} + + + +void cleanup( void *buf1, + void *buf2, void *buf3, void *buf4, void *buf5) diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_image_help_base.H b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_image_help_base.H new file mode 100644 index 000000000..1067d3f9c --- /dev/null +++ b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_image_help_base.H @@ -0,0 +1,60 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_image_help_base.H $ */ +/* */ +/* IBM CONFIDENTIAL */ +/* */ +/* COPYRIGHT International Business Machines Corp. 2012 */ +/* */ +/* p1 */ +/* */ +/* Object Code Only (OCO) source materials */ +/* Licensed Internal Code Source Materials */ +/* IBM HostBoot Licensed Internal Code */ +/* */ +/* The source code for this program is not published or otherwise */ +/* divested of its trade secrets, irrespective of what has been */ +/* deposited with the U.S. Copyright Office. */ +/* */ +/* Origin: 30 */ +/* */ +/* IBM_PROLOG_END_TAG */ +// $Id: p8_image_help_base.H,v 1.4 2012/09/01 16:49:28 cmolsen Exp $ +//------------------------------------------------------------------------------ +// Title: p8_image_help_base.H +// Description: Contains the most basic structures and defines needed for +// image building and interpretation. +//------------------------------------------------------------------------------ + +#define ASM_RS4_LAUNCH_BUF_SIZE 24 // Byte size of RS4 launch buffer. +#define LISTING_STRING_SIZE (2*PORE_INLINE_DISASSEMBLER_STRING_SIZE) + +// Base (shared) ring layout for both RS4 and Wiggle-flip layouts. +typedef struct { + uint64_t entryOffset; + uint64_t backItemPtr; + uint32_t sizeOfThis; + uint32_t sizeOfMeta; // Exact size of meta data. Arbitrary size. Not null terminated. +} BaseRingLayout; + +// RS4 specific layout. +typedef struct { + uint64_t entryOffset; + uint64_t backItemPtr; + uint32_t sizeOfThis; + uint32_t sizeOfMeta; // Exact size of meta data. Arbitrary size. Not null terminated. + uint32_t ddLevel; + uint8_t sysPhase; + uint8_t override; + uint8_t reserved1; + uint8_t reserved2; +} Rs4RingLayout; + +// PairingInfo is used for pairing, or matching, a back pointer address of a +// ring block with its corresponding TOC name. +typedef struct { + uint64_t address; // 64-bit PORE address + char *name; // TOC name + uint8_t override; // 0: base 1: override +} PairingInfo; diff --git a/src/usr/hwpf/hwp/build_winkle_images/proc_slw_build/p8_pore_api.h b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_pore_api.h index 0656f0a1c..0656f0a1c 100644 --- a/src/usr/hwpf/hwp/build_winkle_images/proc_slw_build/p8_pore_api.h +++ b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_pore_api.h diff --git a/src/usr/hwpf/hwp/build_winkle_images/proc_slw_build/p8_pore_api_const.h b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_pore_api_const.h index 1f0f86ada..1f0f86ada 100644 --- a/src/usr/hwpf/hwp/build_winkle_images/proc_slw_build/p8_pore_api_const.h +++ b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_pore_api_const.h diff --git a/src/usr/hwpf/hwp/build_winkle_images/proc_slw_build/p8_pore_api_custom.h b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_pore_api_custom.h index a35fb1006..a35fb1006 100644 --- a/src/usr/hwpf/hwp/build_winkle_images/proc_slw_build/p8_pore_api_custom.h +++ b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_pore_api_custom.h diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_pore_table_gen_api.C b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_pore_table_gen_api.C new file mode 100644 index 000000000..979ad4bef --- /dev/null +++ b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_pore_table_gen_api.C @@ -0,0 +1,680 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_pore_table_gen_api.C $ */ +/* */ +/* IBM CONFIDENTIAL */ +/* */ +/* COPYRIGHT International Business Machines Corp. 2012 */ +/* */ +/* p1 */ +/* */ +/* Object Code Only (OCO) source materials */ +/* Licensed Internal Code Source Materials */ +/* IBM HostBoot Licensed Internal Code */ +/* */ +/* The source code for this program is not published or otherwise */ +/* divested of its trade secrets, irrespective of what has been */ +/* deposited with the U.S. Copyright Office. */ +/* */ +/* Origin: 30 */ +/* */ +/* IBM_PROLOG_END_TAG */ +// $Id: p8_pore_table_gen_api.C,v 1.10 2012/09/24 21:25:55 cmolsen Exp $ +// +/*------------------------------------------------------------------------------*/ +/* *! (C) Copyright International Business Machines Corp. 2012 */ +/* *! All Rights Reserved -- Property of IBM */ +/* *! *** IBM Confidential *** */ +/*------------------------------------------------------------------------------*/ +/* *! TITLE : p8_pore_table_gen_api.C */ +/* *! DESCRIPTION : PORE SLW table generaion APIs */ +/* *! OWNER NAME : Michael Olsen Email: cmolsen@us.ibm.com */ +/* *! USAGE : To build for PHYP command-line - */ +// buildecmdprcd_cmo -d "sbe_xip_image.c,pore_inline_assembler.c" p8_pore_table_gen_api.C +// Other usages: +// - Passing the DYNAMIC_RAM_TABLE PPD, gen_cpureg() will build +// up the ramming table in a space saving way, occupying only +// as much space as needed in the [pre-defined sized] .slw +// section. This implementation, even though presently not +// safe due to race condition to the ramming vector, may come +// in handy at a later stage. +// +/* *! COMMENTS : Start file: p7p_pore_api.c */ +// +/*------------------------------------------------------------------------------*/ + +#define __P8_PORE_TABLE_GEN_API_C +#include <p8_pore_api_custom.h> +#include <HvPlicModule.H> +#include <p8_pore_table_gen_api.H> +#include <p8_delta_scan_rw.h> + +/* +// io_image - pointer to SLW image +// i_sizeImage - size of SLW image +// i_regName - unswizzled enum SPR value (NOT a name) +// i_regData - data to write +// i_coreIndex - core ID +// i_threadIndex - thread to operate on, API changes thread num to 0 for shared SPRs, except for HRMOR which +// is always done on thread 3 to be the last SPR +*/ +uint32_t p8_pore_gen_cpureg( void *io_image, + uint32_t i_sizeImage, + uint32_t i_regName, + uint64_t i_regData, + uint32_t i_coreId, // [0:15] + uint32_t i_threadId) +{ + uint32_t rc=0, rcLoc=0, iCount=0; + int i=0, iReg=-1; + uint32_t sizeImageIn=0; + uint64_t xipSlwRamSection; + void *hostSlwRamSection; + uint64_t xipRamTableThis; + void *hostRamVector; + void *hostRamTableThis; + void *hostRamEntryThis, *hostRamEntryNext; + uint8_t bNewTable=0, bFound=0; + uint8_t bEntryEnd=1, headerType=0; + SbeXipSection xipSection; + SbeXipItem xipTocItem; + RamTableEntry ramEntryThis, *ramEntryNext; + uint32_t sprSwiz=0; +#ifdef DYNAMIC_RAM_TABLE + uint32_t iCore=0, sizeTableThis=0, sizeTableAll=0; + void *hostRamEntryFirstAll; // First entry of all Ram tables. + void *hostRamEntryLastAll; // Last entry of all Ram tables. + uint64_t xipRamTableNext; + void *hostRamTableNext; +#endif + + // ------------------------------------------------------------------------- + // Validate Ramming parameters. + // + // ...check register value + bFound = 0; + for (i=0;i<SLW_SPR_REGS_SIZE;i++) { + if (i_regName==SLW_SPR_REGS[i].value) { + bFound = 1; + iReg = i; + break; + } + } + if (!bFound) { + MY_ERR("Register value = %i is not supported.\n",i_regName); + MY_ERR("The following registers are supported:\n"); + for (i=0;i<SLW_SPR_REGS_SIZE;i++) + MY_ERR("\t(%s,%i)\n",SLW_SPR_REGS[i].name,SLW_SPR_REGS[i].value); + rcLoc = 1; + } + // ...check core ID + if (i_coreId>=SLW_MAX_CORES) { + MY_ERR("Core ID = %i is not within valid range of [0;%i]\n",i_coreId,SLW_MAX_CORES-1); + rcLoc = 1; + } + // ...check thread ID + if (i_threadId>=SLW_CORE_THREADS) { + MY_ERR("Thread ID = %i is not within valid range of [0;%i]\n",i_coreId,SLW_CORE_THREADS-1); + rcLoc = 1; + } + if (rcLoc) + return IMGBUILD_ERR_RAM_INVALID_PARM; + rcLoc = 0; + + // ------------------------------------------------------------------------- + // Validate image and get pointer to SLW section. + // + // ...validate + rc = sbe_xip_validate( io_image, i_sizeImage); + if (rc) { + MY_ERR("Invalid image.\n"); + return IMGBUILD_INVALID_IMAGE; + } + // ...size check + sbe_xip_image_size( io_image, &sizeImageIn); + if (sizeImageIn!=i_sizeImage) { + MY_ERR("Supplied image size (=%i) differs from size in image header (=%i).\n", + i_sizeImage, sizeImageIn); + return IMGBUILD_IMAGE_SIZE_MISMATCH; + } + // ...get pointer to SLW section where Ram table resides + rc = sbe_xip_get_section( io_image, SBE_XIP_SECTION_SLW, &xipSection); + if (rc) { + MY_ERR("Probably invalid section name for SBE_XIP_SECTION_SLW.\n"); + return IMGBUILD_ERR_GET_SECTION; + } + hostSlwRamSection = (void*)((uint8_t*)io_image + xipSection.iv_offset); + sbe_xip_host2pore( io_image, hostSlwRamSection, &xipSlwRamSection); + + // ------------------------------------------------------------------------- + // Cross check SPR register and table defines + // + if (SLW_SPR_REGS_SIZE!=(SLW_MAX_CPUREGS_CORE+SLW_MAX_CPUREGS_THREADS)) { + MY_ERR("Defines in *.H header file not in sync.\n"); + return IMGBUILD_ERR_RAM_HDRS_NOT_SYNCED; + } + if (xipSection.iv_size!=SLW_RAM_TABLE_SIZE+SLW_SCOM_TABLE_SIZE_ALL) { + MY_ERR("SLW table size in *.H header file differs from SLW section size in image.\n"); + MY_ERR("Check code or image version.\n"); + return IMGBUILD_ERR_RAM_HDRS_NOT_SYNCED; + } + // ------------------------------------------------------------------------- + // Summarize parameters and checking results. + // + MY_INF("Input parameter checks - OK\n"); + MY_INF("\tRegister = (%s,%i)\n",SLW_SPR_REGS[iReg].name,SLW_SPR_REGS[iReg].value); + MY_INF("\tCore ID = %i\n",i_coreId); + MY_INF("\tThread ID = %i\n",i_threadId); + MY_INF("Image validation and size checks - OK\n"); + MY_INF("\tImage size = %i\n",i_sizeImage); + MY_INF("\tSLW section size= %i\n",xipSection.iv_size); + + // ------------------------------------------------------------------------- + // Locate RAM vector and locate RAM table associated with "This" core ID. + // + rc = sbe_xip_find( io_image, SLW_HOST_REG_VECTOR_TOC_NAME, &xipTocItem); + if (rc) { + MY_ERR("Probably invalid key word for SLW_HOST_REG_VECTOR_TOC_NAME.\n"); + return IMGBUILD_ERR_KEYWORD_NOT_FOUND; + } + sbe_xip_pore2host( io_image, xipTocItem.iv_address, &hostRamVector); + xipRamTableThis = myRev64(*((uint64_t*)hostRamVector + i_coreId)); + if (xipRamTableThis) { + sbe_xip_pore2host( io_image, xipRamTableThis, &hostRamTableThis); + bNewTable = 0; + } + else { + hostRamTableThis = NULL; + bNewTable = 1; + } + +#ifdef DYNAMIC_RAM_TABLE + hostRamEntryFirstAll = hostSlwRamSection; + hostRamEntryLastAll = hostRamEntryFirstAll; + + // ------------------------------------------------------------------------- + // Walk the RAM vector and RAM tables to + // - determine size of present tables, sizeTableAll - we'll need it when/if shifting entries forward + // - check for RAM table overflow. + // + sizeTableAll = 0; + for (iCore=0; iCore<SLW_MAX_CORES; iCore++) { + xipRamTableNext = myRev64(*((uint64_t*)hostRamVector + iCore)); + if (xipRamTableNext) + sbe_xip_pore2host( io_image, xipRamTableNext, &hostRamTableNext); + else + hostRamTableNext = NULL; + sizeTableThis = 0; + if (hostRamTableNext) { + hostRamEntryNext = hostRamTableNext; + ramEntryNext = (RamTableEntry*)hostRamEntryNext; + sizeTableThis = sizeTableThis + XIPSIZE_RAM_ENTRY; + while ((myRev32(ramEntryNext->header) & RAM_HEADER_END_MASK_C)==0) { + hostRamEntryNext = (void*)((uint8_t*)hostRamEntryNext + XIPSIZE_RAM_ENTRY); + ramEntryNext = (RamTableEntry*)hostRamEntryNext; + sizeTableThis = sizeTableThis + XIPSIZE_RAM_ENTRY; + } + // Keep searching for last entry. + if ((uint64_t)hostRamEntryLastAll<(uint64_t)hostRamEntryNext) + hostRamEntryLastAll = hostRamEntryNext; + // Check hostRamTableThis for sizeTableThis>SLW_MAX_CPUREGS_OPS + if ((uint64_t)hostRamTableNext==(uint64_t)hostRamTableThis) { + if ((sizeTableThis/XIPSIZE_RAM_ENTRY+1)>SLW_MAX_CPUREGS_OPS) { + MY_ERR("Table entry overflow. (SLW_MAX_CPUREGS_OPS=%i). Exiting.\n",SLW_MAX_CPUREGS_OPS); + return IMGBUILD_ERR_RAM_TABLE_OVERFLOW; + } + } + // Update total table size. + sizeTableAll = sizeTableAll + sizeTableThis; + // Increment RAM vector entries, if needed, but not if a new table which goes at the end. + // (This must be done at this stage while walking everything.) + if (!bNewTable && ((uint64_t)hostRamTableNext>(uint64_t)hostRamTableThis)) { + sbe_xip_host2pore( io_image, (void*)((uint8_t*)hostRamTableNext + XIPSIZE_RAM_ENTRY), &xipRamTableNext); + *((uint64_t*)hostRamVector + iCore) = myRev64(xipRamTableNext); + } + } + } +#else + // ------------------------------------------------------------------------- + // We don't need to walk the "this" RAM table to check for RAM table + // as this is done further down during insertion of the entry. + // +#endif + + + // ------------------------------------------------------------------------- + // Walk the "This" core ID's RAM table to + // - determine insertion point, hostRamEntryThis, of new RAM entry + // + if (bNewTable) { +#ifdef DYNAMIC_RAM_TABLE + // Append to end of table. + hostRamTableThis = (void*)((uint8_t*)hostRamEntryFirstAll + sizeTableAll); + hostRamEntryThis = hostRamTableThis; + // ...update RAM vector (since it is currently NULL) + sbe_xip_host2pore( io_image, hostRamTableThis, &xipRamTableThis); + *((uint64_t*)hostRamVector + i_coreId) = myRev64(xipRamTableThis); + bEntryEnd = 1; +#else + // Append to beginning of agreed upon static position for this coreId. + hostRamTableThis = (void*)((uint8_t*)hostSlwRamSection + + (uint32_t)(SLW_RAM_TABLE_SIZE/SLW_MAX_CORES)*i_coreId ); + hostRamEntryThis = hostRamTableThis; + // ...update RAM vector (since it is currently NULL) + *((uint64_t*)hostRamVector + i_coreId) = myRev64( xipSlwRamSection + + (uint32_t)(SLW_RAM_TABLE_SIZE/SLW_MAX_CORES)*i_coreId ); + bEntryEnd = 1; +#endif + } + else { + // Insert at end of existing table. + hostRamEntryNext = hostRamTableThis; + ramEntryNext = (RamTableEntry*)hostRamEntryNext; + iCount = 0; + while ((myRev32(ramEntryNext->header) & RAM_HEADER_END_MASK_C)==0) { + hostRamEntryNext = (void*)((uint8_t*)hostRamEntryNext + XIPSIZE_RAM_ENTRY); + ramEntryNext = (RamTableEntry*)hostRamEntryNext; + iCount++; + if ((iCount+1)>SLW_MAX_CPUREGS_OPS) { + MY_ERR("Table end bit, in header, wasn't found within max OPs allowed per table.\n"); + return IMGBUILD_ERR_RAM_TABLE_END_NOT_FOUND; + } + } + // ...zero out previous END bit in header + if ((myRev32(ramEntryNext->header) & RAM_HEADER_END_MASK_C)) { + ramEntryNext->header = ramEntryNext->header & myRev32(~RAM_HEADER_END_MASK_C); + } + else { + MY_ERR("ERROR : We should never get here. Check code. Dumping data:\n"); + MY_ERR("myRev32(ramEntryNext->header) = 0x%08x\n",myRev32(ramEntryNext->header)); + MY_ERR("RAM_HEADER_END_MASK_C = 0x%08x\n",RAM_HEADER_END_MASK_C); + return IMGBUILD_ERR_RAM_CODE; + } + // ...this is the spot for the new entry + hostRamEntryThis = (void*)((uint8_t*)hostRamEntryNext + XIPSIZE_RAM_ENTRY); + bEntryEnd = 1; + } + +#ifdef DYNAMIC_RAM_TABLE + // ------------------------------------------------------------------------- + // Shift RAM entries forward by XIPSIZE_RAM_ENTRY + // (Need to do this before inserting new RAM entry at hostRamEntryThis.) + // + if (!bNewTable) + for ( ramEntryNext=(RamTableEntry*)hostRamEntryLastAll; + ramEntryNext>=(RamTableEntry*)hostRamEntryThis; + ramEntryNext-- ) { + *(ramEntryNext+1) = *ramEntryNext; + if ((ramEntryNext+1)->instr!=ramEntryNext->instr) { + MY_ERR("ERROR : Incorrect shifting of table entries. Check code.\n"); + return IMGBUILD_ERR_RAM_CODE; + } + } +#endif + + // ------------------------------------------------------------------------- + // Create, or modify, the RAM entry. + // + if (i_regName==P8_MSR_MSR) { + // ...do the MSR header + headerType = 0x1; // MTMSRD header. + ramEntryThis.header = ( ((uint32_t)bEntryEnd) << RAM_HEADER_END_START_C & RAM_HEADER_END_MASK_C ) | + ( ((uint32_t)headerType) << RAM_HEADER_TYPE_START_C & RAM_HEADER_TYPE_MASK_C ); + // ...do the MSR instr + ramEntryThis.instr = RAM_MTMSRD_INSTR_TEMPL_C; + } + else { + // ...do the SPR header + headerType = 0x0; // MTSPR header. + ramEntryThis.header = ( ((uint32_t)bEntryEnd) << RAM_HEADER_END_START_C & RAM_HEADER_END_MASK_C ) | + ( ((uint32_t)headerType) << RAM_HEADER_TYPE_START_C & RAM_HEADER_TYPE_MASK_C ) | + ( i_regName << RAM_HEADER_SPRN_START_C & RAM_HEADER_SPRN_MASK_C ) | + ( i_threadId << RAM_HEADER_THREAD_START_C & RAM_HEADER_THREAD_MASK_C ); + // ...do the SPR instr + sprSwiz = i_regName>>5 | (i_regName & 0x0000001f)<<5; + if (sprSwiz!=SLW_SPR_REGS[iReg].swizzled) { + MY_ERR("ERROR : Inconsistent swizzle rules implemented. Check code. Dumping data.\n"); + MY_ERR("\tsprSwiz (on-the-fly-calc)=%i\n",sprSwiz); + MY_ERR("\tSLW_SPR_REGS[%i].swizzled=%i\n",iReg,SLW_SPR_REGS[iReg].swizzled); + return IMGBUILD_ERR_RAM_CODE; + } + ramEntryThis.instr = RAM_MTSPR_INSTR_TEMPL_C | ( ( sprSwiz<<RAM_MTSPR_SPR_START_C ) & RAM_MTSPR_SPR_MASK_C ); + } + // ...do the data + ramEntryThis.data = i_regData; + // ...summarize new table entry data + MY_INF("New table entry data (host format):\n"); + MY_INF("\theader = 0x%08x\n",ramEntryThis.header); + MY_INF("\tinstr = 0x%08x\n",ramEntryThis.instr); + MY_INF("\tdata = 0x%016llx\n",ramEntryThis.data); + + // ------------------------------------------------------------------------- + // Insert the new RAM entry into the table in BE format. + // + ramEntryNext = (RamTableEntry*)hostRamEntryThis; + // ...some redundant checking + if (bNewTable) { + // For any new table, the insertion location should be clean. We check for this here. + if (myRev32(ramEntryNext->header)!=0) { + MY_ERR("WARNING : Table entry location should be empty for a new table. Check code and image. Dumping data:\n"); + MY_ERR("\theader = 0x%08x\n",myRev32(ramEntryNext->header)); + MY_ERR("\tinstr = 0x%08x\n",myRev32(ramEntryNext->instr)); + MY_ERR("\tdata = 0x%016llx\n",myRev64(ramEntryNext->data)); + rc = IMGBUILD_WARN_RAM_TABLE_CONTAMINATION; + } + } + ramEntryNext->header = myRev32(ramEntryThis.header); + ramEntryNext->instr = myRev32(ramEntryThis.instr); + ramEntryNext->data = myRev64(ramEntryThis.data); + + return rc; +} + + +/* +// io_image - pointer to SLW image +// i_sizeImage - size of SLW image +// i_scomAddr - Scom address +// i_scomData - Data to write to scom register +// i_operation - What to do with the scom addr and data +// i_coreId - The core ID [0:15]. +*/ +uint32_t p8_pore_gen_scom( void *io_image, + uint32_t i_sizeImage, + uint32_t i_scomAddr, + uint32_t i_coreId, + uint64_t i_scomData, // [1:4] + uint32_t i_operation) // [0:15] +{ + uint32_t rc=0, rcLoc=0, iEntry=0; + int pgas_rc=0; + uint32_t chipletId=0; + uint32_t operation=0; + uint32_t entriesCount=0, entriesMatch=0; + uint32_t sizeImageIn=0; + void *hostSlwSection; + uint64_t xipScomTableThis; + void *hostScomVector, *hostScomTableThis; + void *hostScomEntryNext; // running entry pointer + void *hostScomEntryFound=NULL; // pointer to entry that matches scomAddr + void *hostScomEntryRET=NULL; // pointer to first return instr after table + void *hostScomEntryNOP=NULL; // pointer to first nop IIS + uint8_t bufIIS[XIPSIZE_SCOM_ENTRY], bufNOP[4], bufRET[4]; + SbeXipSection xipSection; + SbeXipItem xipTocItem; + PoreInlineContext ctx; + + // ------------------------------------------------------------------------- + // Validate Scom parameters. + // + // ...check if valid Scom register (is there anything we can do here to check?) + // Skipping check. We blindly trust caller. + // + // ...check Scom operation + if (i_operation<P8_PORE_SCOM_FIRST_OP || i_operation>P8_PORE_SCOM_LAST_OP) { + MY_ERR("Scom operation = %i is not within valid range of [%d;%d]\n", + i_operation, P8_PORE_SCOM_FIRST_OP, P8_PORE_SCOM_LAST_OP); + rcLoc = 1; + } + // ...check that core ID corresponds to valid chiplet ID + chipletId = i_coreId + P8_CID_EX_LOW; + if (chipletId<P8_CID_EX_LOW || chipletId>P8_CID_EX_HIGH) { + MY_ERR("Chiplet ID = 0x%02x is not within valid range of [0x%02x;0x%02x]\n", + chipletId, P8_CID_EX_LOW, P8_CID_EX_HIGH); + rcLoc = 1; + } + if (rcLoc) + return IMGBUILD_ERR_SCOM_INVALID_PARM; + rcLoc = 0; + + // ------------------------------------------------------------------------- + // Validate image and get pointer to SLW section. + // + // ...validate + rc = sbe_xip_validate( io_image, i_sizeImage); + if (rc) { + MY_ERR("Invalid image.\n"); + return IMGBUILD_INVALID_IMAGE; + } + // ...size check + sbe_xip_image_size( io_image, &sizeImageIn); + if (sizeImageIn!=i_sizeImage) { + MY_ERR("Supplied image size (=%i) differs from size in image header (=%i).\n", + i_sizeImage, sizeImageIn); + return IMGBUILD_IMAGE_SIZE_MISMATCH; + } + // ...get pointer to SLW section where Scom table resides + rc = sbe_xip_get_section( io_image, SBE_XIP_SECTION_SLW, &xipSection); + if (rc) { + MY_ERR("Probably invalid section name for SBE_XIP_SECTION_SLW.\n"); + return IMGBUILD_ERR_GET_SECTION; + } + hostSlwSection = (void*)((uint8_t*)io_image + xipSection.iv_offset); + // ...check .slw section size + if (xipSection.iv_size!=SLW_RAM_TABLE_SIZE+SLW_SCOM_TABLE_SIZE_ALL) { + MY_ERR("SLW table size in *.H header file differs from SLW section size in image.\n"); + MY_ERR("Check code or image version.\n"); + return IMGBUILD_ERR_SCOM_HDRS_NOT_SYNCD; + } + + // ------------------------------------------------------------------------- + // Summarize parameters and checking results. + // + MY_INF("Input parameter checks - OK\n"); + MY_INF("\tRegister = 0x%08x\n",i_scomAddr); + MY_INF("\tOperation = %i\n",i_operation); + MY_INF("\tCore ID = %i\n",i_coreId); + MY_INF("Image validation and size checks - OK\n"); + MY_INF("\tImage size = %i\n",i_sizeImage); + MY_INF("\tSLW section size= %i\n",xipSection.iv_size); + + // ------------------------------------------------------------------------- + // Locate Scom vector and locate Scom table associated with "This" core ID. + // + rc = sbe_xip_find( io_image, SLW_HOST_SCOM_VECTOR_TOC_NAME, &xipTocItem); + if (rc) { + MY_ERR("Probably invalid key word for SLW_HOST_SCOM_VECTOR_TOC_NAME.\n"); + return IMGBUILD_ERR_KEYWORD_NOT_FOUND; + } + MY_INF("xipTocItem.iv_address = 0x%016llx\n",xipTocItem.iv_address); + sbe_xip_pore2host( io_image, xipTocItem.iv_address, &hostScomVector); + MY_INF("hostScomVector = 0x%016llx\n",(uint64_t)hostScomVector); + xipScomTableThis = myRev64(*((uint64_t*)hostScomVector + i_coreId)); + MY_INF("xipScomTableThis = 0x%016llx\n",xipScomTableThis); + if (xipScomTableThis) { + sbe_xip_pore2host( io_image, xipScomTableThis, &hostScomTableThis); + } + else { // We should never get here. + MY_ERR("Code or image bug. Scom vector table entries should never be null.\n"); + return IMGBUILD_ERR_CHECK_CODE; + } + + // + // Determine where to place/do Scom action and if entry already exists. + // Insertion rules: + // - If entry doesn't exist, insert at first NOP. (Note that if you don't do + // this, then the table might potentially overflow since the max table size + // doesn't include NOP entries.) + // - If no NOP found, insert at first RET. + // + + // First, create search string + // Note, this IIS will also be used in case of operation==replace. + pore_inline_context_create( &ctx, (void*)bufIIS, XIPSIZE_SCOM_ENTRY, 0, 0); + pgas_rc = pore_LS( &ctx, P1, chipletId); + pgas_rc = pgas_rc + pore_STI( &ctx, i_scomAddr, P1, i_scomData); + if (pgas_rc>0) { + MY_ERR("pore_LS or _STI generated rc = %d", pgas_rc); + return IMGBUILD_ERR_PORE_INLINE_ASM; + } + pore_inline_context_create( &ctx, (void*)bufRET, 4, 0, 0); + pgas_rc = pore_RET( &ctx); + if (pgas_rc>0) { + MY_ERR("pore_RET generated rc = %d", pgas_rc); + return IMGBUILD_ERR_PORE_INLINE_ASM; + } + pore_inline_context_create( &ctx, (void*)bufNOP, 4, 0, 0); + pgas_rc = pore_NOP( &ctx); + if (pgas_rc>0) { + MY_ERR("pore_NOP generated rc = %d", pgas_rc); + return IMGBUILD_ERR_PORE_INLINE_ASM; + } + + // Second, search for scomAddr in relevant coreId table until first RET. + // Note: + // - We go through ALL entries until first RET instr. + // - Count number of entries and check for overrun. + // - Check for repeat entries, which are not allowed. + // - The STI opcode is in the 2nd word of the Scom entry. + // - Last NOP is picked, if any, for append (if no entry found for a replace) + hostScomEntryNext = hostScomTableThis; + while (*(uint32_t*)hostScomEntryNext!=*(uint32_t*)bufRET) { + entriesCount++; + if (*((uint32_t*)bufIIS+1)==*((uint32_t*)hostScomEntryNext+1)) {// +1 skips 1st word in Scom entry + hostScomEntryFound = hostScomEntryNext; + entriesMatch++; + } + if (*(uint32_t*)hostScomEntryNext==*(uint32_t*)bufNOP ) + hostScomEntryNOP = hostScomEntryNext; // If >1 NOP, then pick last NOP. + hostScomEntryNext = (void*)((uintptr_t)hostScomEntryNext + XIPSIZE_SCOM_ENTRY); + } + hostScomEntryRET = hostScomEntryNext; // The last EntryNext will always be the first RET. + if (entriesMatch>1) { + MY_ERR("Repeat Scom entries not allowed. (entriesMatch=%i)\n",entriesMatch); + return IMGBUILD_ERR_SCOM_REPEAT_ENTRIES; + } + if (entriesCount>SLW_MAX_SCOMS_NC) { + MY_ERR("Too many Scoms in table. Max %i is allowed.\n",SLW_MAX_SCOMS_NC); + MY_ERR("Check code.\n"); + return IMGBUILD_ERR_CHECK_CODE; + } + + // + // Further qualify (translate) operation and IIS. + // + if (i_operation==P8_PORE_SCOM_REPLACE) { + if (hostScomEntryFound) + // ... do a replace + operation = i_operation; + else + // ... do an append + operation = P8_PORE_SCOM_APPEND; + } + else if (i_operation==P8_PORE_SCOM_NOOP) { + // ...overwrite earlier bufIIS from the search step + pore_inline_context_create( &ctx, (void*)bufIIS, XIPSIZE_SCOM_ENTRY, 0, 0); + pgas_rc = pore_NOP( &ctx); + pgas_rc = pgas_rc + pore_NOP( &ctx); + pgas_rc = pgas_rc + pore_NOP( &ctx); + pgas_rc = pgas_rc + pore_NOP( &ctx); + if (pgas_rc>0) { + MY_ERR("*** _NOP generated rc = %d", pgas_rc); + return IMGBUILD_ERR_PORE_INLINE_ASM; + } + operation = i_operation; + } + else if (i_operation==P8_PORE_SCOM_AND || + i_operation==P8_PORE_SCOM_OR) { + operation = i_operation; + } + else if (i_operation==P8_PORE_SCOM_RESET) { + // ... create RNNN instruction sequence. + pore_inline_context_create( &ctx, (void*)bufIIS, XIPSIZE_SCOM_ENTRY, 0, 0); + pgas_rc = pore_RET( &ctx); + pgas_rc = pgas_rc + pore_NOP( &ctx); + pgas_rc = pgas_rc + pore_NOP( &ctx); + pgas_rc = pgas_rc + pore_NOP( &ctx); + if (pgas_rc>0) { + MY_ERR("***_RET or _NOP generated rc = %d", pgas_rc); + return IMGBUILD_ERR_PORE_INLINE_ASM; + } + operation = i_operation; + } + else { + MY_ERR("Scom operation = %i is not within valid range of [%d;%d]\n", + i_operation, P8_PORE_SCOM_FIRST_OP, P8_PORE_SCOM_LAST_OP); + return IMGBUILD_ERR_SCOM_INVALID_PARM; + } + + // ------------------------------------------------------------------------- + // Assuming pre-allocated Scom table (after pre-allocated Ram table): + // - Table is pre-filled with RNNN ISS. + // - Each core Id has dedicated space, uniformly distributed by SLW_MAX_SCOMS_NC* + // XIPSIZE_SCOM_ENTRY. + // - Remember to check for more than SLW_MAX_SCOMS_NC entries! + switch (operation) { + + case P8_PORE_SCOM_APPEND: // Append a Scom at a NOP or at RET + if (hostScomEntryNOP) { + // ... do an append at a NOP + MY_INF("Append at NOP\n"); + memcpy(hostScomEntryNOP,(void*)bufIIS,XIPSIZE_SCOM_ENTRY); + } + else { + // ... do an append at the RET + MY_INF("Append at RET\n"); + memcpy(hostScomEntryRET,(void*)bufIIS,XIPSIZE_SCOM_ENTRY); + } + break; + case P8_PORE_SCOM_REPLACE: // Replace existing Scom with new data + if (hostScomEntryFound) { + // ... do a vanilla replace + MY_INF("Replace existing Scom\n"); + memcpy(hostScomEntryFound,(void*)bufIIS,XIPSIZE_SCOM_ENTRY); + } + else { + // We should never be here. + MY_ERR("In case=_SCOM_REPLACE: EntryFound=NULL is impossible. Check code.\n"); + return IMGBUILD_ERR_CHECK_CODE; + } + break; + case P8_PORE_SCOM_NOOP: + if (hostScomEntryFound) { + // ... do a vanilla replace + MY_INF("Replace existing Scom w/NOPs\n"); + memcpy(hostScomEntryFound,(void*)bufIIS,XIPSIZE_SCOM_ENTRY); + } + else { + // do nothing, and assume everything is fine, since we did no damage. + } + break; + case P8_PORE_SCOM_OR: // Overlay Scom data onto existing data by bitwise OR + if (hostScomEntryFound) { + // ... do an OR on the data (which is the 2nd DWord in the entry) + MY_INF("Overlay existing Scom - OR case\n"); + *((uint64_t*)hostScomEntryFound+1) = + *((uint64_t*)hostScomEntryFound+1) | myRev64(i_scomData); + } + else { + MY_ERR("No Scom entry found to do OR operation with.\n"); + return IMGBUILD_ERR_SCOM_ENTRY_NOT_FOUND; + } + break; + case P8_PORE_SCOM_AND: // Overlay Scom data onto existing data by bitwise AND + if (hostScomEntryFound) { + // ... do an AND on the data (which is the 2nd DWord in the entry) + MY_INF("Overlay existing Scom - AND case\n"); + *((uint64_t*)hostScomEntryFound+1) = + *((uint64_t*)hostScomEntryFound+1) & myRev64(i_scomData); + } + else { + MY_ERR("No Scom entry found to do AND operation with.\n"); + return IMGBUILD_ERR_SCOM_ENTRY_NOT_FOUND; + } + break; + case P8_PORE_SCOM_RESET: // Reset (delete) table. Refill w/RNNN ISS. + MY_INF("Reset table\n"); + hostScomEntryNext = hostScomTableThis; + for ( iEntry=0; iEntry<entriesCount; iEntry++) { + memcpy( hostScomEntryNext, (void*)bufIIS, XIPSIZE_SCOM_ENTRY); + hostScomEntryNext = (void*)((uintptr_t)hostScomEntryNext + XIPSIZE_SCOM_ENTRY); + } + break; + default: + break; + + } // End of switch(operation) + + return rc; +} diff --git a/src/usr/hwpf/hwp/build_winkle_images/proc_gen_cpureg/p8_pore_table_gen_api.H b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_pore_table_gen_api.H index e78a31e7a..60c765f95 100644 --- a/src/usr/hwpf/hwp/build_winkle_images/proc_gen_cpureg/p8_pore_table_gen_api.H +++ b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_pore_table_gen_api.H @@ -1,34 +1,34 @@ -/* IBM_PROLOG_BEGIN_TAG - * This is an automatically generated prolog. - * - * $Source: src/usr/hwpf/hwp/build_winkle_images/pore_gen_cpureg/p8_pore_table_gen_api.H $ - * - * IBM CONFIDENTIAL - * - * COPYRIGHT International Business Machines Corp. 2012 - * - * p1 - * - * Object Code Only (OCO) source materials - * Licensed Internal Code Source Materials - * IBM HostBoot Licensed Internal Code - * - * The source code for this program is not published or other- - * wise divested of its trade secrets, irrespective of what has - * been deposited with the U.S. Copyright Office. - * - * Origin: 30 - * - * IBM_PROLOG_END_TAG - */ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_pore_table_gen_api.H $ */ +/* */ +/* IBM CONFIDENTIAL */ +/* */ +/* COPYRIGHT International Business Machines Corp. 2012 */ +/* */ +/* p1 */ +/* */ +/* Object Code Only (OCO) source materials */ +/* Licensed Internal Code Source Materials */ +/* IBM HostBoot Licensed Internal Code */ +/* */ +/* The source code for this program is not published or otherwise */ +/* divested of its trade secrets, irrespective of what has been */ +/* deposited with the U.S. Copyright Office. */ +/* */ +/* Origin: 30 */ +/* */ +/* IBM_PROLOG_END_TAG */ +// $Id: p8_pore_table_gen_api.H,v 1.13 2012/09/24 15:02:48 cmolsen Exp $ /*------------------------------------------------------------------------------*/ /* *! (C) Copyright International Business Machines Corp. 2012 */ /* *! All Rights Reserved -- Property of IBM */ /* *! *** IBM Confidential *** */ /*------------------------------------------------------------------------------*/ -/* *! TITLE : p8_pore_table_gen_api */ +/* *! TITLE : p8_pore_table_gen_api.H */ /* *! DESCRIPTION : Contains all external APIs used by firmware (PHYP) to */ -// generate/modify the P8 PORE SLW image with /Ramming and +// generate/modify the P8 PORE SLW image with Ramming and // Scomming specific instructions to be executed on exit from // Sleep/Winkle. Also contains definitions for the ramming // PORE code. @@ -61,13 +61,13 @@ // 1 - Reserved // 2:3 - Type // 00: MTSPR -// 01: MTGPR +// 01: MTGPR // 10: Reserved // 11: Reserved // 4:13 - SPR number in non-swizzled form (0:9) // 14:15 - Reserved for SPR nunmber expansion // 16:18 - Thread ID -// 19:31 - Reserved +// 19:31 - Reserved #define RAM_HEADER_END_START 0 #define RAM_HEADER_END_MASK BITS(RAM_HEADER_END_START,1) @@ -94,7 +94,7 @@ #ifdef FOR_PORE_RAMMING // Thread status -CONST_UINT64_T( PROC_RAS_STAT_10013002 , ULL(0x10013002) ); +CONST_UINT64_T( PROC_RAS_STAT_10013002 , ULL(0x10013002) ); // TCTL RAS Status (for each thread) // Note: the address is not included in the name to ease PGAS indexing @@ -111,22 +111,32 @@ CONST_UINT64_T( EX_PERV_TCTL7_R_STAT , ULL(0x10013072) ); // Thread scratch registers // Note: the address is not included in the name to ease PGAS indexing // of these registers -CONST_UINT64_T( EX_PERV_SCRATCH0 , ULL(0x10013283) ); -CONST_UINT64_T( EX_PERV_SCRATCH1 , ULL(0x10013284) ); -CONST_UINT64_T( EX_PERV_SCRATCH2 , ULL(0x10013285) ); -CONST_UINT64_T( EX_PERV_SCRATCH3 , ULL(0x10013286) ); -CONST_UINT64_T( EX_PERV_SCRATCH4 , ULL(0x10013287) ); -CONST_UINT64_T( EX_PERV_SCRATCH5 , ULL(0x10013288) ); -CONST_UINT64_T( EX_PERV_SCRATCH6 , ULL(0x10013289) ); +CONST_UINT64_T( EX_PERV_SCRATCH0 , ULL(0x10013283) ); +CONST_UINT64_T( EX_PERV_SCRATCH1 , ULL(0x10013284) ); +CONST_UINT64_T( EX_PERV_SCRATCH2 , ULL(0x10013285) ); +CONST_UINT64_T( EX_PERV_SCRATCH3 , ULL(0x10013286) ); +CONST_UINT64_T( EX_PERV_SCRATCH4 , ULL(0x10013287) ); +CONST_UINT64_T( EX_PERV_SCRATCH5 , ULL(0x10013288) ); +CONST_UINT64_T( EX_PERV_SCRATCH6 , ULL(0x10013289) ); CONST_UINT64_T( EX_PERV_SCRATCH7 , ULL(0x1001328A) ); -// Max # of polling attempts. SLW ops have no quiescent needs, so low #. -CONST_UINT32_T( SLW_MAX_RAM_POLLS , ULL(0x04) ); +// RAM Status reg settings. +CONST_UINT64_T( RAM_STATUS_REG_AFTER_RAM, 0x5000000000000000); +CONST_UINT32_T( SLW_MAX_RAM_POLLS ,ULL(0x04) ); // mfspr gpr0, scratch0 opcode left-shifted 29 bits, ready for ramming. -CONST_UINT64_T( MFSPR_GPR0_SCRATCH0_RAM_READY, (0x000000007C1542A6<<29)); +CONST_UINT64_T( MTSPR_SCRATCH0_GPR0_RAM_READY, (0x000000007C1543A6<<29)); +CONST_UINT64_T( MFSPR_GPR0_SCRATCH0_RAM_READY, (0x000000007C1542A6<<29)); +CONST_UINT64_T( MTMSRD_GPR0_RAM_READY, (0x000000007C000164<<29)); +CONST_UINT64_T( MFMSR_GPR0_RAM_READY, (0x000000007C0000A6<<29)); + +// Predefined MSR content during Ramming +CONST_UINT64_T( P8_PORE_MSR_DURING_RAM, (0x9000000002802000) ); -#ifdef __ASSEMBLER__ +// "reset" value of SCRATCH0 to ensure it gets updated from GPR0 +CONST_UINT64_T( SCRATCH0_RESET_VALUE, (0xABBA99EBBA33DADA) ); + +#ifdef __ASSEMBLER__ /***********************************************************************/ /* Pore RAM section - begin */ @@ -134,8 +144,8 @@ CONST_UINT64_T( MFSPR_GPR0_SCRATCH0_RAM_READY, (0x000000007C1542A6<<29)); /***********************************************************************/ .set RAM_HEADER, 0 .set RAM_INSTR, 4 -.set RAM_DATA, 8 -.set RAM_ENTRY_LENGTH, 16 +.set RAM_DATA, 8 +.set RAM_ENTRY_LENGTH, 16 /***********************************************************************/ /* Pore RAM section - end */ /***********************************************************************/ @@ -146,11 +156,18 @@ CONST_UINT64_T( MFSPR_GPR0_SCRATCH0_RAM_READY, (0x000000007C1542A6<<29)); #else // Not FOR_PORE_RAMMING +//#include <stdio.h> +// Temporarily include this to support malloc until Host services supplies buffers in their calls. #include <stdlib.h> -#include <stdio.h> -#include <stdint.h> +//#include <stdint.h> +#include <p8_pore_api_custom.h> -#include "pore_bitmanip.H" +//#include <pore_bitmanip.H> +// Defining local versions of BITS and BIT +// Create a multi-bit mask of \a n bits starting at bit \a b +#define BITS(b, n) ((ULL(0xffffffffffffffff) << (64 - (n))) >> (b)) +// Create a single bit mask at bit \a b +#define BIT(b) BITS((b), 1) // Header defs (C notation where bits are numbered from right-to-left, and reducing to 32-bit) #define RAM_HEADER_END_START_C ( 31-RAM_HEADER_END_START+1-1 ) @@ -166,35 +183,73 @@ CONST_UINT64_T( MFSPR_GPR0_SCRATCH0_RAM_READY, (0x000000007C1542A6<<29)); #define RAM_MTSPR_SPR_START_C ( 31-RAM_MTSPR_SPR_START+1-10 ) //#define RAM_MTSPR_SPR_MASK_C (uint32_t)(BITS(RAM_MTSPR_SPR_START,10)>>32) #define RAM_MTSPR_SPR_MASK_C (uint32_t)(RAM_MTSPR_SPR_MASK>>32) +// MTMSR innstr def +#define RAM_MTMSRD_INSTR_TEMPL_C ( ( (uint32_t)31<<(31-5) | (uint32_t)178<<(31-30) ) ) -/* Other defs needed for ramming */ +/* Other defs needed for ramming and scomming */ // TOC names -#define SLW_HOST_REG_VECTOR_TOC_NAME "slw_host_reg_vector" -#define SLW_HOST_SCOM_VECTOR_TOC_NAME "slw_host_scom_vector" -#define SLW_HOST_REG_TABLE_TOC_NAME "slw_core_reg_table" - -// Defines for slw_build() to update "host_runtime_scom" w/pointer to "sub_slw_runtime_scom" at SLW image build time. -#define HOST_RUNTIME_SCOM_TOC_NAME "host_runtime_scom" // Null 1st, then fill w/addr of SLW_RUNTIME_SCOM_TOC_NAME -#define SLW_RUNTIME_SCOM_TOC_NAME "sub_slw_runtime_scom" +#define SLW_HOST_REG_VECTOR_TOC_NAME "slw_host_reg_vector" +#define SLW_HOST_SCOM_VECTOR_TOC_NAME "slw_host_scom_vector" +#define SLW_HOST_SCOM_L2_VECTOR_TOC_NAME "slw_host_scom_l2_vector" +#define SLW_HOST_SCOM_L3_VECTOR_TOC_NAME "slw_host_scom_l3_vector" +//#define SLW_HOST_REG_TABLE_TOC_NAME "slw_core_reg_table" + +// Defines for slw_build() to update "runtime_scom" pointers w/pointer to +// "sub_slw_runtime_scom" subroutines at SLW image build time. +#define HOST_RUNTIME_SCOM_TOC_NAME "host_runtime_scom" // Null 1st, then fill w/addr of SLW_RUNTIME_SCOM_TOC_NAME +#define SLW_RUNTIME_SCOM_TOC_NAME "sub_slw_runtime_scom" +#define EX_ENABLE_RUNTIME_SCOM_TOC_NAME "ex_enable_runtime_scom" // Null 1st, then fill w/addr of SLW_EX_ENABLE_RUNTIME_SCOM_TOC_NAME +#define SLW_EX_ENABLE_RUNTIME_SCOM_TOC_NAME "sub_slw_ex_enable_runtime_scom" + +#define SCAN_MAX_ROTATE_38XXX_NAME "scan_max_rotate_38xxx" +#define SCAN_ROTATE_DEFAULT 0xFE0 +#define SCAN_MAX_ROTATE 0x1FFF // RAM table defines #define XIPSIZE_RAM_ENTRY ( (sizeof(RamTableEntry)+7)/8*8 ) #define SLW_MAX_CORES 16 -#define SLW_MAX_CPUREGS_CORE 8 -#define SLW_MAX_CPUREGS_THREADS 2 // Was 3 at some point, when MSR reg was included? +#define SLW_MAX_CPUREGS_CORE 9 +#define SLW_MAX_CPUREGS_THREADS 2 #define SLW_CORE_THREADS 8 #define SLW_MAX_CPUREGS_OPS ( SLW_MAX_CPUREGS_CORE + \ SLW_CORE_THREADS*SLW_MAX_CPUREGS_THREADS ) -// $$ mww 2012-07-19 SLW_SLW_SECTION_SIZE removed? needed by proc_slw_build -#define SLW_SLW_SECTION_SIZE ( SLW_MAX_CORES * SLW_MAX_CPUREGS_OPS * XIPSIZE_RAM_ENTRY ) #define SLW_RAM_TABLE_SIZE ( SLW_MAX_CORES * SLW_MAX_CPUREGS_OPS * XIPSIZE_RAM_ENTRY ) -// SCOM table defines +// SPR and MSR values for i_regName +enum { + P8_SPR_HRMOR = 313, + P8_SPR_HMEER = 337, + P8_SPR_PMICR = 852, + P8_SPR_PMCR = 884, + P8_SPR_HID0 = 1008, + P8_SPR_HID1 = 1009, + P8_SPR_HID4 = 1012, + P8_SPR_HID5 = 1014, + P8_SPR_HSPRG0 = 304, + P8_SPR_LPCR = 318, + P8_MSR_MSR = 2000 +}; + +// SCOM table defines - Common #define XIPSIZE_SCOM_ENTRY 16 -#define SLW_MAX_SCOMS 32 -#define SLW_SCOM_TABLE_SPACE_PER_CORE ( (SLW_MAX_SCOMS+1)*XIPSIZE_SCOM_ENTRY ) // Add 1 for RNNN IIS -#define SLW_SCOM_TABLE_SIZE ( SLW_MAX_CORES * SLW_SCOM_TABLE_SPACE_PER_CORE ) +// SCOM table defines - Non-cache +#define SLW_MAX_SCOMS_NC 32 +#define SLW_SCOM_TABLE_SPACE_PER_CORE_NC ( (SLW_MAX_SCOMS_NC+1)*XIPSIZE_SCOM_ENTRY ) // Add 1 for RNNN IIS +#define SLW_SCOM_TABLE_SIZE_NC ( SLW_MAX_CORES * SLW_SCOM_TABLE_SPACE_PER_CORE_NC ) + +// SCOM table defines - L2 +#define SLW_MAX_SCOMS_L2 16 +#define SLW_SCOM_TABLE_SPACE_PER_CORE_L2 ( (SLW_MAX_SCOMS_L2+1)*XIPSIZE_SCOM_ENTRY ) // Add 1 for RNNN IIS +#define SLW_SCOM_TABLE_SIZE_L2 ( SLW_MAX_CORES * SLW_SCOM_TABLE_SPACE_PER_CORE_L2 ) + +// SCOM table defines - L3 +#define SLW_MAX_SCOMS_L3 16 +#define SLW_SCOM_TABLE_SPACE_PER_CORE_L3 ( (SLW_MAX_SCOMS_L3+1)*XIPSIZE_SCOM_ENTRY ) // Add 1 for RNNN IIS +#define SLW_SCOM_TABLE_SIZE_L3 ( SLW_MAX_CORES * SLW_SCOM_TABLE_SPACE_PER_CORE_L3 ) + +#define SLW_SCOM_TABLE_SIZE_ALL ( SLW_SCOM_TABLE_SIZE_NC + SLW_SCOM_TABLE_SIZE_L2 + SLW_SCOM_TABLE_SIZE_L3) + // SCOM/CID masks and ranges #define P8_CID_EX_LOW 0x10 // Lowest EX chiplet addr #define P8_CID_EX_HIGH 0x1f // Highest EX chiplet addr @@ -220,7 +275,7 @@ CONST_UINT64_T( MFSPR_GPR0_SCRATCH0_RAM_READY, (0x000000007C1542A6<<29)); #define SLW_RAM_WARNING_TABLE_CONTAMINATION 6 -#ifdef __cpluscplus +#ifdef __cplusplus extern "C" { #endif @@ -244,6 +299,8 @@ typedef struct { uint32_t swizzled; } SlwSprRegs; +extern const SlwSprRegs SLW_SPR_REGS[]; +extern const int SLW_SPR_REGS_SIZE; /* Name: p8_pore_gen_cpureg() * Description: Populates ramming entries in the .slw section @@ -255,7 +312,7 @@ typedef struct { * i_threadId - the thread ID to operate on */ uint32_t p8_pore_gen_cpureg(void *io_image, - uint32_t i_sizeImage, + uint32_t i_sizeImage, uint32_t i_regName, uint64_t i_regData, uint32_t i_coreId, @@ -271,13 +328,13 @@ uint32_t p8_pore_gen_cpureg(void *io_image, * i_coreId - the core ID [0:15] */ uint32_t p8_pore_gen_scom(void *io_image, - uint32_t i_sizeImage, + uint32_t i_sizeImage, uint32_t i_scomAddr, uint32_t i_coreId, uint64_t i_scomData, uint32_t i_operation); -#ifdef __cpluscplus +#ifdef __cplusplus } #endif diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_pore_table_static_data.c b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_pore_table_static_data.c new file mode 100644 index 000000000..6cce13ed7 --- /dev/null +++ b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_pore_table_static_data.c @@ -0,0 +1,55 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_pore_table_static_data.c $ */ +/* */ +/* IBM CONFIDENTIAL */ +/* */ +/* COPYRIGHT International Business Machines Corp. 2012 */ +/* */ +/* p1 */ +/* */ +/* Object Code Only (OCO) source materials */ +/* Licensed Internal Code Source Materials */ +/* IBM HostBoot Licensed Internal Code */ +/* */ +/* The source code for this program is not published or otherwise */ +/* divested of its trade secrets, irrespective of what has been */ +/* deposited with the U.S. Copyright Office. */ +/* */ +/* Origin: 30 */ +/* */ +/* IBM_PROLOG_END_TAG */ +// $Id: p8_pore_table_static_data.c,v 1.4 2012/09/13 19:42:59 cmolsen Exp $ +/*------------------------------------------------------------------------------*/ +/* *! (C) Copyright International Business Machines Corp. 2012 */ +/* *! All Rights Reserved -- Property of IBM */ +/* *! *** IBM Confidential *** */ +/*------------------------------------------------------------------------------*/ +/* *! TITLE : p8_pore_table_static_data */ +/* *! DESCRIPTION : Global static data declaration file. */ +/* *! OWNER NAME : Michael Olsen Email: cmolsen@us.ibm.com */ +// +/* *! COMMENTS : This file is exclusively for PHYP environment. */ +// +/*------------------------------------------------------------------------------*/ +#include <p8_pore_table_gen_api.H> + +const SlwSprRegs SLW_SPR_REGS[] = { + /* name value swizzled */ + // ...core regs + { "P8_SPR_HRMOR", P8_SPR_HRMOR, ( P8_SPR_HRMOR >>5 | ( P8_SPR_HRMOR &0x1f)<<5 ) }, + { "P8_SPR_HMEER", P8_SPR_HMEER, ( P8_SPR_HMEER >>5 | ( P8_SPR_HMEER &0x1f)<<5 ) }, + { "P8_SPR_PMICR", P8_SPR_PMICR, ( P8_SPR_PMICR >>5 | ( P8_SPR_PMICR &0x1f)<<5 ) }, + { "P8_SPR_PMCR", P8_SPR_PMCR, ( P8_SPR_PMCR >>5 | ( P8_SPR_PMCR &0x1f)<<5 ) }, + { "P8_SPR_HID0", P8_SPR_HID0, ( P8_SPR_HID0 >>5 | ( P8_SPR_HID0 &0x1f)<<5 ) }, + { "P8_SPR_HID1", P8_SPR_HID1, ( P8_SPR_HID1 >>5 | ( P8_SPR_HID1 &0x1f)<<5 ) }, + { "P8_SPR_HID4", P8_SPR_HID4, ( P8_SPR_HID4 >>5 | ( P8_SPR_HID4 &0x1f)<<5 ) }, + { "P8_SPR_HID5", P8_SPR_HID5, ( P8_SPR_HID5 >>5 | ( P8_SPR_HID5 &0x1f)<<5 ) }, + { "P8_MSR_MSR", P8_MSR_MSR, ( P8_MSR_MSR ) }, + // ...thread regs + { "P8_SPR_HSPRG0", P8_SPR_HSPRG0,( P8_SPR_HSPRG0>>5 | ( P8_SPR_HSPRG0&0x1f)<<5 ) }, + { "P8_SPR_LPCR", P8_SPR_LPCR, ( P8_SPR_LPCR >>5 | ( P8_SPR_LPCR &0x1f)<<5 ) }, +}; + +const int SLW_SPR_REGS_SIZE = sizeof(SLW_SPR_REGS)/sizeof(SLW_SPR_REGS[0]); diff --git a/src/usr/hwpf/hwp/build_winkle_images/proc_slw_build/p8_scan_compression.C b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_scan_compression.C index 339b8da01..73e2189af 100644 --- a/src/usr/hwpf/hwp/build_winkle_images/proc_slw_build/p8_scan_compression.C +++ b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_scan_compression.C @@ -1,27 +1,26 @@ - /* IBM_PROLOG_BEGIN_TAG - * This is an automatically generated prolog. - * - * $Source: src/usr/hwpf/hwp/build_winkle_images/proc_slw_build/p8_scan_compression.C $ - * - * IBM CONFIDENTIAL - * - * COPYRIGHT International Business Machines Corp. 2012 - * - * p1 - * - * Object Code Only (OCO) source materials - * Licensed Internal Code Source Materials - * IBM HostBoot Licensed Internal Code - * - * The source code for this program is not published or other- - * wise divested of its trade secrets, irrespective of what has - * been deposited with the U.S. Copyright Office. - * - * Origin: 30 - * - * IBM_PROLOG_END_TAG - */ -// $Id: p8_scan_compression.C,v 1.4 2012/08/17 16:19:44 cmolsen Exp $ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_scan_compression.C $ */ +/* */ +/* IBM CONFIDENTIAL */ +/* */ +/* COPYRIGHT International Business Machines Corp. 2012 */ +/* */ +/* p1 */ +/* */ +/* Object Code Only (OCO) source materials */ +/* Licensed Internal Code Source Materials */ +/* IBM HostBoot Licensed Internal Code */ +/* */ +/* The source code for this program is not published or otherwise */ +/* divested of its trade secrets, irrespective of what has been */ +/* deposited with the U.S. Copyright Office. */ +/* */ +/* Origin: 30 */ +/* */ +/* IBM_PROLOG_END_TAG */ +// $Id: p8_scan_compression.C,v 1.5 2012/09/20 20:25:29 bcbrock Exp $ // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/utils/p8_scan_compression.C,v $ //------------------------------------------------------------------------------ // *! (C) Copyright International Business Machines Corp. 2011 @@ -31,7 +30,7 @@ // *! OWNER NAME: Bishop Brock Email: Bishop Brock; bcbrock@us.ibm.com // *! // *! General Description: -// *! +// *! // *! See below. //------------------------------------------------------------------------------ // @@ -39,7 +38,7 @@ // for revision history of p8_scan_compression.c. /// \file p8_scan_compression.C -/// \brief APIs related to scan chain compression. +/// \brief APIs related to scan chain compression. /// /// RS4 Compression Format /// ====================== @@ -103,34 +102,34 @@ /// (R S)* (R E) T D? /// /// \code -/// +/// /// <rs4_string> ::= <rotate> <terminate> | /// <rotate> <scan> <rs4_string> -/// +/// /// <rotate> ::= <octal_stop> | /// <octal_go> <rotate> -/// +/// /// <octal_go> ::= '0x0' | ... | '0x7' -/// +/// /// <octal_stop> ::= '0x8' | ... | '0xf' -/// +/// /// <scan> ::= <scan_count(N)> <data(N)> -/// +/// /// <scan_count(N)> ::= * 0bnnnn, for N = 0bnnnn, N != 0 * -/// +/// /// <data(N)> ::= * N nibbles of uncompressed data * -/// +/// /// <terminate> ::= '0x0' <terminal_count(0)> | /// '0x0' <terminal_count(T, T > 0)> <terminal_data(T)> -/// +/// /// <terminal_count(T)> ::= * 0b00nn, for T = 0bnn * -/// +/// /// <terminal_data(1)> ::= '0x0' | '0x8' /// /// <terminal_data(2)> ::= '0x0' | '0x4' | '0x8' | '0xc' /// /// <terminal_data(3)> ::= '0x0' | '0x2' | '0x4' | ... | '0xe' -/// +/// /// \endcode @@ -198,7 +197,7 @@ revle32(const uint32_t i_x) #endif return rx; } - + #if COMPRESSED_SCAN_DATA_VERSION != 1 #error This code assumes CompressedScanData structure version 1 layout @@ -236,7 +235,7 @@ get_nibble(const uint8_t* i_string, const uint32_t i_i) } return nibble; } - + // Set a big-endian-indexed nibble in a byte string @@ -257,7 +256,7 @@ set_nibble(uint8_t* io_string, const uint32_t i_i, const int i_nibble) // Encode an unsigned integer into a 4-bit octal stop code directly into a // nibble stream at io_string<i_i>, returning the number of nibbles in the -// resulting code. +// resulting code. static int stop_encode(const uint32_t i_count, uint8_t* io_string, const uint32_t i_i) @@ -317,7 +316,7 @@ stop_decode(uint32_t* o_count, const uint8_t* i_string, const uint32_t i_i) return digits; } - + // RS4 compression algorithm notes: // // RS4 compression processes i_string as a string of nibbles. Final @@ -336,7 +335,7 @@ stop_decode(uint32_t* o_count, const uint8_t* i_string, const uint32_t i_i) static uint32_t _rs4_compress(CompressedScanData* o_data, - const uint8_t* i_string, + const uint8_t* i_string, const uint32_t i_length) { int state; /* 0 : Rotate, 1 : Scan */ @@ -356,7 +355,7 @@ _rs4_compress(CompressedScanData* o_data, data = (uint8_t*)o_data + sizeof(CompressedScanData); count = 0; state = 0; - + // Process the bulk of the string. Note that state changes do not // increment 'i' - the nibble at i_data<i> is always scanned again. @@ -411,8 +410,8 @@ _rs4_compress(CompressedScanData* o_data, j++; // Insert the remainder count nibble, and if non-0, the remainder data - // nibble. - + // nibble. + set_nibble(data, j, r); j++; if (r != 0) { @@ -420,7 +419,7 @@ _rs4_compress(CompressedScanData* o_data, j++; } - // Return the number of nibbles in the compressed string. + // Return the number of nibbles in the compressed string. return j; } @@ -436,7 +435,7 @@ _rs4_compress(CompressedScanData* o_data, int rs4_compress(CompressedScanData** o_data, uint32_t* o_size, - const uint8_t* i_string, + const uint8_t* i_string, const uint32_t i_length, const uint64_t i_scanSelect, const uint8_t i_ringId, @@ -484,8 +483,8 @@ rs4_compress(CompressedScanData** o_data, // Returns a scan compression return code. static int -_rs4_decompress(uint8_t* o_string, - const uint8_t* i_string, +_rs4_decompress(uint8_t* o_string, + const uint8_t* i_string, const uint32_t i_length) { int rc; @@ -584,19 +583,19 @@ rs4_decompress(uint8_t** o_string, } *o_length = revle32(i_data->iv_length); - bytes = ((*o_length + 7) / 8) * 8; + bytes = (*o_length + 7) / 8; *o_string = (uint8_t*)calloc(bytes, 1); if (*o_string == 0) { rc = BUG(SCAN_COMPRESSION_NO_MEMORY); break; } - rc = _rs4_decompress(*o_string, + rc = _rs4_decompress(*o_string, (uint8_t*)i_data + sizeof(CompressedScanData), *o_length); } while (0); return rc; } - - + + diff --git a/src/usr/hwpf/hwp/build_winkle_images/proc_slw_build/p8_scan_compression.H b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_scan_compression.H index 6e48f6b4b..8e4d38364 100644 --- a/src/usr/hwpf/hwp/build_winkle_images/proc_slw_build/p8_scan_compression.H +++ b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_scan_compression.H @@ -1,30 +1,29 @@ - /* IBM_PROLOG_BEGIN_TAG - * This is an automatically generated prolog. - * - * $Source: src/usr/hwpf/hwp/build_winkle_images/proc_slw_build/p8_scan_compression.H $ - * - * IBM CONFIDENTIAL - * - * COPYRIGHT International Business Machines Corp. 2012 - * - * p1 - * - * Object Code Only (OCO) source materials - * Licensed Internal Code Source Materials - * IBM HostBoot Licensed Internal Code - * - * The source code for this program is not published or other- - * wise divested of its trade secrets, irrespective of what has - * been deposited with the U.S. Copyright Office. - * - * Origin: 30 - * - * IBM_PROLOG_END_TAG - */ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_scan_compression.H $ */ +/* */ +/* IBM CONFIDENTIAL */ +/* */ +/* COPYRIGHT International Business Machines Corp. 2012 */ +/* */ +/* p1 */ +/* */ +/* Object Code Only (OCO) source materials */ +/* Licensed Internal Code Source Materials */ +/* IBM HostBoot Licensed Internal Code */ +/* */ +/* The source code for this program is not published or otherwise */ +/* divested of its trade secrets, irrespective of what has been */ +/* deposited with the U.S. Copyright Office. */ +/* */ +/* Origin: 30 */ +/* */ +/* IBM_PROLOG_END_TAG */ #ifndef __P8_SCAN_COMPRESSION_H__ #define __P8_SCAN_COMPRESSION_H__ -// $Id: p8_scan_compression.H,v 1.2 2012/08/17 16:20:15 cmolsen Exp $ +// $Id: p8_scan_compression.H,v 1.3 2012/09/20 20:25:37 bcbrock Exp $ // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/utils/p8_scan_compression.H,v $ //------------------------------------------------------------------------------ // *! (C) Copyright International Business Machines Corp. 2011 @@ -34,7 +33,7 @@ // *! OWNER NAME: Bishop Brock Email: Bishop Brock; bcbrock@us.ibm.com // *! // *! General Description: -// *! +// *! // *! See below. //------------------------------------------------------------------------------ // @@ -43,7 +42,7 @@ /// \file p8_scan_compression.H /// \brief Structure definitions and protoypes related to scan chain -/// compression. +/// compression. /// /// This header declares and documents the entry points defined in /// p8_scan_compression.C. Some constants are also required by the scan @@ -65,7 +64,7 @@ /// decompression algorithms. /// /// Bytes - Content -/// +/// /// 0:3 - A 32-bit "magic number" that identifies and validates the /// compression algorithm and algorithm version used to compress the data. /// @@ -81,7 +80,7 @@ /// /// 16:19 - The 32 high-order bits of the value written to the Scan Select /// register to set up the scan. The Scan Select register only defines these -/// bits. +/// bits. /// /// 20 - The Scan Chain Data Structure version number /// @@ -189,7 +188,7 @@ compressed_scan_data_translate(CompressedScanData* o_data, /// a repair ring. (See p8_ring_identification.c for more info.) /// /// \param i_chipletId The 7-bit value for the iv_chipletId field of the -/// CompressedScanData. +/// CompressedScanData. /// /// \param i_flushOptimization This input parameter should be set to a non-0 /// value if it is known that this ring difference will be applied to a scan-0 @@ -201,13 +200,13 @@ compressed_scan_data_translate(CompressedScanData* o_data, int rs4_compress(CompressedScanData** o_data, uint32_t* o_size, - const uint8_t* i_string, + const uint8_t* i_string, const uint32_t i_length, const uint64_t i_scanSelect, - const uint8_t i_ringId, + const uint8_t i_ringId, const uint8_t i_chipletId, const uint8_t i_flushOptimization); - + /// Decompress a scan string compressed using the RS4 compression algorithm /// @@ -220,12 +219,12 @@ rs4_compress(CompressedScanData** o_data, /// bytes. /// /// \param i_data A pointer to the CompressedScanData header + data to be -/// decompressed. +/// decompressed. int rs4_decompress(uint8_t** o_string, uint32_t* o_length, const CompressedScanData* i_data); - + #endif // __ASSEMBLER__ diff --git a/src/usr/hwpf/hwp/build_winkle_images/proc_slw_build/proc_slw_build.C b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_slw_build.C index af54eb656..79800a66f 100644 --- a/src/usr/hwpf/hwp/build_winkle_images/proc_slw_build/proc_slw_build.C +++ b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_slw_build.C @@ -1,62 +1,76 @@ -/* IBM_PROLOG_BEGIN_TAG - * This is an automatically generated prolog. - * - * $Source: src/usr/hwpf/hwp/build_winkle_images/proc_slw_build/proc_slw_build.C $ - * - * IBM CONFIDENTIAL - * - * COPYRIGHT International Business Machines Corp. 2012 - * - * p1 - * - * Object Code Only (OCO) source materials - * Licensed Internal Code Source Materials - * IBM HostBoot Licensed Internal Code - * - * The source code for this program is not published or other- - * wise divested of its trade secrets, irrespective of what has - * been deposited with the U.S. Copyright Office. - * - * Origin: 30 - * - * IBM_PROLOG_END_TAG - */ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_slw_build.C $ */ +/* */ +/* IBM CONFIDENTIAL */ +/* */ +/* COPYRIGHT International Business Machines Corp. 2012 */ +/* */ +/* p1 */ +/* */ +/* Object Code Only (OCO) source materials */ +/* Licensed Internal Code Source Materials */ +/* IBM HostBoot Licensed Internal Code */ +/* */ +/* The source code for this program is not published or otherwise */ +/* divested of its trade secrets, irrespective of what has been */ +/* deposited with the U.S. Copyright Office. */ +/* */ +/* Origin: 30 */ +/* */ +/* IBM_PROLOG_END_TAG */ +// $Id: p8_slw_build.C,v 1.3 2012/09/19 14:07:17 cmolsen Exp $ /*------------------------------------------------------------------------------*/ -/* *! TITLE : proc_slw_build */ +/* *! TITLE : p8_slw_build */ /* *! DESCRIPTION : Extracts and decompresses delta ring states from EPROM */ // image. Utilizes the linked list approach (LLA) to extract -// and position wiggle-flip programs in .rings according to -// back pointer, DD level, phase and override settings. +// and position wiggle-flip programs in .rings according to +// back pointer, DD level, phase and override settings. /* *! OWNER NAME : Michael Olsen cmolsen@us.ibm.com */ // /* *! EXTENDED DESCRIPTION : */ // /* *! USAGE : To build (for Hostboot) - */ -// buildfapiprcd -r ver-12-5 -C "p8_image_help.C,p8_scan_compression.C" -c "sbe_xip_image.c,pore_inline_assembler.c,pore_inline_disassembler.c,p8_pore_static_data.c" -e "../../xml/error_info/proc_slw_build_errors.xml" proc_slw_build.C -// Parameter list - -// See function definition below. -// Alternative usages - -// To build for scanning by EPM team w/fixed P0 value, sysPhase=0, -// always-return-after-wf, command-line mode: -// buildfapiprcd -u "SLW_BUILD_WF_P0_FIX,SLW_BUILD_SYSPHASE_ZERO_MODE,SLW_BUILD_WF_RETURN,SLW_COMMAND_LINE" -r ... +// buildfapiprcd -C "p8_image_help.C,p8_scan_compression.C" -c "sbe_xip_image.c,pore_inline_assembler.c" -e "../../xml/error_info/p8_slw_build_errors.xml" p8_slw_build.C +// To build (for command-line) - +// buildfapiprcd -C "p8_image_help.C,p8_scan_compression.C" -c "sbe_xip_image.c,pore_inline_assembler.c" -e "../../xml/error_info/p8_slw_build_errors.xml" -u "SLW_COMMAND_LINE" p8_slw_build.C +// Other Pre-Processor Directive (PPD) options - +// To debug WF programs: +// -u "IMGBUILD_PPD_DEBUG_WF" +// To add worst-case PIB access to wf programs: +// -u "IMGBUILD_PPD_WF_WORST_CASE_PIB" +// To add polling protocol to wf programs: +// -u "IMGBUILD_PPD_WF_POLLING_PROT" +// (NB! This will eventually be changed to IMGBUILD_PPD_WF_NO POLLING_PROT +// because we want the polling protocol to be default.) +// To add repair rings to the .rings section: +// -u "IMGBUILD_PPD_ADD_REPR_RINGS" +// (NB! This will eventually be changed to IMGBUILD_PPD_OMIT_REPR_RINGS +// because we want the adding of repair rings to be default.) // /* *! ASSUMPTIONS : */ // - For Hostboot environment: +// - No precompiler directives needed // - dynamic P0/P1 calculation -// - sysPhase=1 +// - polling scan protocol // - check header word after WF +// - sysPhase=1 // - non-command-line mode, FAPI call // /* *! COMMENTS : */ // - All image content, incl .initf content and ring layout, is handled // in BE format. No matter which platform. -// - A ring may only be requested with the sysPhase=0 or 1. Any other +// - A ring may only be requested with the sysPhase=0 or 1. Any other // sysPhase value, incl sysPhase=2, will cause no rings to be found. // /*------------------------------------------------------------------------------*/ -#include "proc_slw_build.H" -#include "p8_delta_scan_rw.h" +#include <p8_pore_api_custom.h> +#include <HvPlicModule.H> +#include <p8_slw_build.H> +#include <p8_delta_scan_rw.h> +#include <p8_pore_table_gen_api.H> extern "C" { @@ -64,40 +78,34 @@ using namespace fapi; // Parameter list: // fapi::Target &i_target: Hardware target -// void *i_imageIn: Pointer to memory mapped input SBE-XIP EPROM image +// void *i_imageIn: Pointer to memory mapped input Reference PNOR image // uint32_t i_sizeImageIn: Size of input image. // void *i_imageOut: Pointer to where to put SLW mainstore image // uint32_t *io_sizeImageOut: Size of output image. Initial upper limit supplied by HB. Final size returned. // -ReturnCode proc_slw_build( const fapi::Target &i_target, - const void *i_imageIn, - uint32_t i_sizeImageIn, - void *i_imageOut, - uint32_t *io_sizeImageOut) +ReturnCode p8_slw_build( const fapi::Target &i_target, + const void *i_imageIn, + uint32_t i_sizeImageIn, + void *i_imageOut, + uint32_t *io_sizeImageOut) { ReturnCode rc; uint8_t l_uint8 = 0; uint32_t ddLevel=0; -#ifdef SLW_BUILD_SYSPHASE_ZERO_MODE - uint8_t sysPhase=0; -#else - uint8_t sysPhase=1; -#endif - + uint8_t sysPhase=1; // To build SLW image for Hostboot. + uint32_t rcLoc=0, rcSearch=0, i, countWF=0; uint32_t sizeImage=0, sizeImageOutMax, sizeImageTmp, sizeImageOld; uint8_t *deltaRingDxed=NULL; CompressedScanData *deltaRingRS4=NULL; DeltaRingLayout rs4RingLayout; void *nextRing=NULL; - uint32_t ringBitLen=0; //ringByteLen=0, ringTrailBits=0; - uint32_t *wfInline=NULL; uint32_t wfInlineLenInWords; - + uint64_t scanMaxRotate=SCAN_ROTATE_DEFAULT; sizeImageOutMax = *io_sizeImageOut; - + if (sizeImageOutMax<i_sizeImageIn) { FAPI_ERR("Inp image size (from caller): %i",i_sizeImageIn); FAPI_ERR("Max image size (from caller): %i",*io_sizeImageOut); @@ -106,7 +114,7 @@ ReturnCode proc_slw_build( const fapi::Target &i_target, FAPI_SET_HWP_ERROR(rc, RC_PROC_SLWB_INPUT_IMAGE_SIZE_MESS); return rc; } - + // ========================================================================== // Check and copy image to mainstore and clean it up. @@ -134,7 +142,7 @@ ReturnCode proc_slw_build( const fapi::Target &i_target, return rc; } FAPI_DBG("Image size (in EPROM): %i",i_sizeImageIn); - + // Second, copy input image to supplied mainstore location. // memcpy( i_imageOut, i_imageIn, i_sizeImageIn); @@ -208,7 +216,7 @@ ReturnCode proc_slw_build( const fapi::Target &i_target, do { FAPI_DBG("nextRing (at top)=0x%016llx",(uint64_t)nextRing); - + // ========================================================================== // Get ring layout from image @@ -220,8 +228,8 @@ ReturnCode proc_slw_build( const fapi::Target &i_target, &rs4RingLayout, &nextRing); rcSearch = rcLoc; - if (rcSearch!=DSLWB_RING_SEARCH_MATCH && - rcSearch!=DSLWB_RING_SEARCH_EXHAUST_MATCH && + if (rcSearch!=DSLWB_RING_SEARCH_MATCH && + rcSearch!=DSLWB_RING_SEARCH_EXHAUST_MATCH && rcSearch!=DSLWB_RING_SEARCH_NO_MATCH) { FAPI_ERR("\tERROR : Getting delta ring from image was unsuccessful (rcSearch=%i).",rcSearch); FAPI_ERR("\tNo wiggle-flip programs will be stored in .rings section."); @@ -230,18 +238,29 @@ ReturnCode proc_slw_build( const fapi::Target &i_target, FAPI_SET_HWP_ERROR(rc, RC_PROC_SLWB_RING_RETRIEVAL_ERROR); return rc; } - if (rcSearch==DSLWB_RING_SEARCH_MATCH || + if (rcSearch==DSLWB_RING_SEARCH_MATCH || rcSearch==DSLWB_RING_SEARCH_EXHAUST_MATCH) FAPI_DBG("\tRetrieving RS4 delta ring was successful."); // Check if we're done at this point. - // + // if (rcSearch==DSLWB_RING_SEARCH_NO_MATCH) { +#ifdef IMGBUILD_PPD_ADD_REPR_RINGS + // Add repair rings. + rc = p8_xip_customize( i_target, + i_imageOut, + sizeImageOld, + sysPhase, + NULL, + sizeImageoutMax); + // TBD. Need to check RC. +#endif FAPI_INF("Wiggle-flip programming done."); FAPI_INF("Number of wf programs appended: %i", countWF); if (countWF==0) FAPI_INF("ZERO WF programs appended to .rings section."); - sizeImageTmp = sizeImageOutMax; + sizeImageTmp = sizeImageOutMax; + // Initialize .slw section with PORE table. rcLoc = initialize_slw_section( i_imageOut, &sizeImageTmp); if (rcLoc) { @@ -258,13 +277,21 @@ ReturnCode proc_slw_build( const fapi::Target &i_target, return rc; } FAPI_INF("SLW section allocated for Ramming and Scomming tables."); + // Update host_runtime_scom pointer to point to sub_slw_runtime_scom + rcLoc = update_runtime_scom_pointer( i_imageOut); + if (rcLoc==IMGBUILD_ERR_KEYWORD_NOT_FOUND) { + uint32_t &RC_LOCAL=rcLoc; + FAPI_SET_HWP_ERROR(rc, RC_PROC_SLWB_KEYWORD_NOT_FOUND_ERROR); + return rc; + } + // Report final size. sbe_xip_image_size( i_imageOut, io_sizeImageOut); FAPI_INF("Final SLW image size: %i", *io_sizeImageOut); return FAPI_RC_SUCCESS; } - + deltaRingRS4 = (CompressedScanData*)rs4RingLayout.rs4Delta; - + FAPI_DBG("Dumping ring layout:"); FAPI_DBG("\tentryOffset = %i",(uint32_t)myRev64(rs4RingLayout.entryOffset)); FAPI_DBG("\tbackItemPtr = 0x%016llx",myRev64(rs4RingLayout.backItemPtr)); @@ -274,13 +301,13 @@ ReturnCode proc_slw_build( const fapi::Target &i_target, FAPI_DBG("\tsysPhase = %i",rs4RingLayout.sysPhase); FAPI_DBG("\toverride = %i",rs4RingLayout.override); FAPI_DBG("\treserved1+2 = %i",rs4RingLayout.reserved1|rs4RingLayout.reserved2); - FAPI_DBG("\tRS4 magic # = 0x%08x",myRev32(deltaRingRS4->iv_magic)); + FAPI_DBG("\tRS4 magic # = 0x%08x",myRev32(deltaRingRS4->iv_magic)); FAPI_DBG("\tRS4 total size = %i",myRev32(deltaRingRS4->iv_size)); FAPI_DBG("\tUnXed data size = %i",myRev32(deltaRingRS4->iv_length)); FAPI_DBG("\tScan select = 0x%08x",myRev32(deltaRingRS4->iv_scanSelect)); FAPI_DBG("\tHeader version = 0x%02x",deltaRingRS4->iv_headerVersion); FAPI_DBG("\tFlush optimize = 0x%02x (reverse of override)",deltaRingRS4->iv_flushOptimization); - FAPI_DBG("\tReserved = 0x%02x",deltaRingRS4->iv_reserved); + FAPI_DBG("\tRing ID = 0x%02x",deltaRingRS4->iv_ringId); FAPI_DBG("\tChiplet ID = 0x%02x",deltaRingRS4->iv_chipletId); FAPI_DBG("Dumping meta data:"); FAPI_DBG("\tsizeOfData = %i",myRev32(rs4RingLayout.sizeOfMeta)); @@ -299,6 +326,7 @@ ReturnCode proc_slw_build( const fapi::Target &i_target, rcLoc = rs4_decompress( &deltaRingDxed, &ringBitLen, deltaRingRS4); + FAPI_DBG("rs4_decompress %d.\n", rcLoc ); if (rcLoc) { FAPI_ERR("\tERROR : rs4_decompress() failed: rc=%i",rcLoc); if (deltaRingDxed) free(deltaRingDxed); @@ -307,21 +335,47 @@ ReturnCode proc_slw_build( const fapi::Target &i_target, return rc; } FAPI_DBG("\tDecompression successful.\n"); - + // ringByteLen = (ringBitLen-1)/8+1; // ringTrailBits = ringBitLen - 8*(ringByteLen-1); // ========================================================================== - // Create Wiggle-Flip Programs + // Create Wiggle-Flip Programs (but first resolve max rotate status.) // ========================================================================== FAPI_DBG("--> Creating Wiggle-Flip Program."); - rcLoc = create_wiggle_flip_prg( (uint32_t*)deltaRingDxed, + rcLoc = sbe_xip_get_scalar( (void*)i_imageIn, SCAN_MAX_ROTATE_38XXX_NAME, &scanMaxRotate); + if (rcLoc) { + FAPI_INF("WARNING: sbe_xip_get_scalar() failed...but we might wing it."); + if (rcLoc==SBE_XIP_ITEM_NOT_FOUND) { + FAPI_INF("Probable cause:"); + FAPI_INF("\tThe key word in SCAN_MAX_ROTATE_38XXX_NAME does not exist the TOC."); + scanMaxRotate = SCAN_ROTATE_DEFAULT; + FAPI_INF("\tscanMaxRotate set to 0x%llx", scanMaxRotate); + FAPI_INF("Continuing..."); + } + else { + FAPI_ERR("ERROR: Nope, couldn't wing it."); + if (deltaRingDxed) free(deltaRingDxed); + uint32_t & RC_LOCAL=rcLoc; + FAPI_SET_HWP_ERROR(rc, RC_PROC_SLWB_UNKNOWN_XIP_ERROR); + return rc; + } + } + if (scanMaxRotate<0x20 || scanMaxRotate>SCAN_MAX_ROTATE) { + FAPI_INF("WARNING: Value of key word SCAN_MAX_ROTATE_38XXX_NAME=0x%llx is not permitted.\n",scanMaxRotate); + scanMaxRotate = SCAN_ROTATE_DEFAULT; + FAPI_INF("\tscanMaxRotate set to 0x%llx\n", scanMaxRotate); + FAPI_INF("Continuing...\n"); + } + + rcLoc = create_wiggle_flip_prg( (uint32_t*)deltaRingDxed, ringBitLen, myRev32(deltaRingRS4->iv_scanSelect), (uint32_t)deltaRingRS4->iv_chipletId, - &wfInline, - &wfInlineLenInWords); + &wfInline, + &wfInlineLenInWords, + (uint32_t)scanMaxRotate); if (rcLoc) { FAPI_ERR("ERROR : create_wiggle_flip_prg() failed w/rcLoc=%i",rcLoc); if (deltaRingDxed) free(deltaRingDxed); @@ -331,7 +385,7 @@ ReturnCode proc_slw_build( const fapi::Target &i_target, return rc; } FAPI_DBG("\tWiggle-flip programming successful."); - + // ========================================================================== // Append Wiggle-Flip programs to .rings section. @@ -360,7 +414,7 @@ ReturnCode proc_slw_build( const fapi::Target &i_target, return rc; } FAPI_DBG("\tUpdating image w/wiggle-flip program + header was successful."); - + // Update some variables for debugging and error reporting. sizeImageOld = sizeImageTmp; countWF++; @@ -371,18 +425,29 @@ ReturnCode proc_slw_build( const fapi::Target &i_target, // ========================================================================== if (deltaRingDxed) free(deltaRingDxed); if (wfInline) free(wfInline); - - + + // ========================================================================== // Are we done? // ========================================================================== if (rcSearch==DSLWB_RING_SEARCH_EXHAUST_MATCH) { +#ifdef IMGBUILD_PPD_ADD_REPR_RINGS + // Add repair rings. + rc = p8_xip_customize( i_target, + i_imageOut, + sizeImageOld, + sysPhase, + NULL, + sizeImageoutMax); + // TBD. Need to check RC. +#endif FAPI_INF("Wiggle-flip programming done."); FAPI_INF("Number of wf programs appended: %i", countWF); if (countWF==0) FAPI_INF("ZERO WF programs appended to .rings section."); sizeImageTmp = sizeImageOutMax; - rcLoc = initialize_slw_section( i_imageOut, + // Initialize .slw section with PORE table. + rcLoc = initialize_slw_section( i_imageOut, &sizeImageTmp); if (rcLoc) { if (rcLoc==IMGBUILD_ERR_IMAGE_TOO_LARGE) { @@ -398,13 +463,21 @@ ReturnCode proc_slw_build( const fapi::Target &i_target, return rc; } FAPI_INF("SLW section allocated for Ramming and Scomming tables."); - sbe_xip_image_size( i_imageOut, io_sizeImageOut); + // Update host_runtime_scom pointer to point to sub_slw_runtime_scom + rcLoc = update_runtime_scom_pointer( i_imageOut); + if (rcLoc==IMGBUILD_ERR_KEYWORD_NOT_FOUND) { + uint32_t &RC_LOCAL=rcLoc; + FAPI_SET_HWP_ERROR(rc, RC_PROC_SLWB_KEYWORD_NOT_FOUND_ERROR); + return rc; + } + // Report final size. + sbe_xip_image_size( i_imageOut, io_sizeImageOut); FAPI_INF("Final SLW image size: %i", *io_sizeImageOut); return FAPI_RC_SUCCESS; } FAPI_DBG("nextRing (at bottom)=0x%016llx",(uint64_t)nextRing); - + } while (nextRing!=NULL); /*************************************************************************** * SEARCH LOOP - End * @@ -413,7 +486,7 @@ ReturnCode proc_slw_build( const fapi::Target &i_target, FAPI_ERR("ERROR : Shouldn't be in this code section. Check code."); rcLoc = IMGBUILD_ERR_CHECK_CODE; uint32_t & RC_LOCAL=rcLoc; - FAPI_SET_HWP_ERROR(rc, RC_PROC_SLWB_UNKOWN_ERROR); + FAPI_SET_HWP_ERROR(rc, RC_PROC_SLWB_UNKNOWN_ERROR); return rc; } diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_slw_build.H b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_slw_build.H new file mode 100644 index 000000000..ca6ad7e57 --- /dev/null +++ b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_slw_build.H @@ -0,0 +1,50 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_slw_build.H $ */ +/* */ +/* IBM CONFIDENTIAL */ +/* */ +/* COPYRIGHT International Business Machines Corp. 2012 */ +/* */ +/* p1 */ +/* */ +/* Object Code Only (OCO) source materials */ +/* Licensed Internal Code Source Materials */ +/* IBM HostBoot Licensed Internal Code */ +/* */ +/* The source code for this program is not published or otherwise */ +/* divested of its trade secrets, irrespective of what has been */ +/* deposited with the U.S. Copyright Office. */ +/* */ +/* Origin: 30 */ +/* */ +/* IBM_PROLOG_END_TAG */ +// $Id: p8_slw_build.H,v 1.2 2012/09/17 19:42:43 cmolsen Exp $ + +#include <fapi.H> + +typedef fapi::ReturnCode (*p8_slw_build_FP_t) ( const fapi::Target&, + const void*, + uint32_t, + void*, + uint32_t*); + +extern "C" +{ + // Description: FAPI HWP entry point. p8_slw_build() constructs the + // Sleep-Winkle (SLW) image in mainstore during Hostboot + // IPL. + // Parameters: i_target: Processor chip target. + // *i_imageIn: Pointer to location of input SBE-XIP image. + // i_sizeImageIn: Size of input image. + // *i_imageOut: Pointer to location of output SLW image in + // mainstore. + // *io_sizeImageOut: On input, upper limit of size of output + // image. On output, final size of output image. + fapi::ReturnCode p8_slw_build( const fapi::Target &i_target, + const void *i_imageIn, + uint32_t i_sizeImageIn, + void *i_imageOut, + uint32_t *io_sizeImageOut); +} diff --git a/src/usr/hwpf/hwp/build_winkle_images/proc_slw_build/proc_slw_build_errors.xml b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_slw_build_errors.xml index 9066290f4..0931f22bd 100644 --- a/src/usr/hwpf/hwp/build_winkle_images/proc_slw_build/proc_slw_build_errors.xml +++ b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_slw_build_errors.xml @@ -1,25 +1,25 @@ -<!-- IBM_PROLOG_BEGIN_TAG - This is an automatically generated prolog. - - $Source: src/usr/hwpf/hwp/build_winkle_images/proc_slw_build/proc_slw_build_errors.xml $ - - IBM CONFIDENTIAL - - COPYRIGHT International Business Machines Corp. 2012 - - p1 - - Object Code Only (OCO) source materials - Licensed Internal Code Source Materials - IBM HostBoot Licensed Internal Code - - The source code for this program is not published or other- - wise divested of its trade secrets, irrespective of what has - been deposited with the U.S. Copyright Office. - - Origin: 30 - - IBM_PROLOG_END_TAG --> +<!-- IBM_PROLOG_BEGIN_TAG --> +<!-- This is an automatically generated prolog. --> +<!-- --> +<!-- $Source: src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_slw_build_errors.xml $ --> +<!-- --> +<!-- IBM CONFIDENTIAL --> +<!-- --> +<!-- COPYRIGHT International Business Machines Corp. 2012 --> +<!-- --> +<!-- p1 --> +<!-- --> +<!-- Object Code Only (OCO) source materials --> +<!-- Licensed Internal Code Source Materials --> +<!-- IBM HostBoot Licensed Internal Code --> +<!-- --> +<!-- The source code for this program is not published or otherwise --> +<!-- divested of its trade secrets, irrespective of what has been --> +<!-- deposited with the U.S. Copyright Office. --> +<!-- --> +<!-- Origin: 30 --> +<!-- --> +<!-- IBM_PROLOG_END_TAG --> <!-- Error definitions for proc_slw_build procedure --> <hwpErrors> <!-- *********************************************************************** --> @@ -101,7 +101,19 @@ </hwpError> <!-- *********************************************************************** --> <hwpError> - <rc>RC_PROC_SLWB_UNKOWN_ERROR</rc> + <rc>RC_PROC_SLWB_KEYWORD_NOT_FOUND_ERROR</rc> + <description>A keyword in the XIP image was not found.</description> + <ffdc>RC_LOCAL</ffdc> + </hwpError> + <!-- *********************************************************************** --> + <hwpError> + <rc>RC_PROC_SLWB_UNKNOWN_XIP_ERROR</rc> + <description>Unknown XIP error, except it's not an _ITEM_NOT_FOUND error.</description> + <ffdc>RC_LOCAL</ffdc> + </hwpError> + <!-- *********************************************************************** --> + <hwpError> + <rc>RC_PROC_SLWB_UNKNOWN_ERROR</rc> <description>Unknown error. (Shouldn't be in this code section.)</description> <ffdc>RC_LOCAL</ffdc> </hwpError> diff --git a/src/usr/hwpf/hwp/build_winkle_images/proc_slw_build/pgas.h b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/pgas.h index 92fb57646..ad0a99d78 100644 --- a/src/usr/hwpf/hwp/build_winkle_images/proc_slw_build/pgas.h +++ b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/pgas.h @@ -1,32 +1,31 @@ -/* IBM_PROLOG_BEGIN_TAG - * This is an automatically generated prolog. - * - * $Source: src/usr/hwpf/hwp/build_winkle_images/proc_slw_build/pgas.h $ - * - * IBM CONFIDENTIAL - * - * COPYRIGHT International Business Machines Corp. 2012 - * - * p1 - * - * Object Code Only (OCO) source materials - * Licensed Internal Code Source Materials - * IBM HostBoot Licensed Internal Code - * - * The source code for this program is not published or other- - * wise divested of its trade secrets, irrespective of what has - * been deposited with the U.S. Copyright Office. - * - * Origin: 30 - * - * IBM_PROLOG_END_TAG - */ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/pgas.h $ */ +/* */ +/* IBM CONFIDENTIAL */ +/* */ +/* COPYRIGHT International Business Machines Corp. 2012 */ +/* */ +/* p1 */ +/* */ +/* Object Code Only (OCO) source materials */ +/* Licensed Internal Code Source Materials */ +/* IBM HostBoot Licensed Internal Code */ +/* */ +/* The source code for this program is not published or otherwise */ +/* divested of its trade secrets, irrespective of what has been */ +/* deposited with the U.S. Copyright Office. */ +/* */ +/* Origin: 30 */ +/* */ +/* IBM_PROLOG_END_TAG */ #ifndef __PGAS_H__ #define __PGAS_H__ #define __PGAS__ -// $Id: pgas.h,v 1.16 2012/05/23 19:03:40 bcbrock Exp $ +// $Id: pgas.h,v 1.17 2012/08/15 19:24:49 bcbrock Exp $ // ** WARNING : This file is maintained as part of the OCC firmware. Do ** // ** not edit this file in the PMX area, the hardware procedure area, ** @@ -36,7 +35,7 @@ /// \brief Pore GAS /// /// PGAS is documented in a seperate standalone document entitled <em> PGAS : -/// PORE GAS (GNU Assembler) User's and Reference Manual <\em>. +/// PORE GAS (GNU Assembler) User's and Reference Manual </em>. /// /// This file defines support macros for the GNU PORE assembler, and the PORE /// inline assembler and disassebler which follow the PGAS assembly syntax. @@ -696,7 +695,7 @@ ////////////////////////////////////////////////////////////////////// - // TEB<eng> - Test Engine and branch if engine. + // TEB[N]<eng> - Test Engine and branch if [not] engine. ////////////////////////////////////////////////////////////////////// // // All but GPE0 use a 1-hot code. @@ -726,6 +725,31 @@ .endm + .macro tebngpe0, dest:req, target:req + mr (\dest), IFR + andi (\dest), (\dest), 0xf + branz (\dest), (\target) + .endm + + .macro tebngpe1, dest:req, target:req + mr (\dest), IFR + andi (\dest), (\dest), PORE_ID_GPE1 + braz (\dest), (\target) + .endm + + .macro tebnslw, dest:req, target:req + mr (\dest), IFR + andi (\dest), (\dest), PORE_ID_SLW + braz (\dest), (\target) + .endm + + .macro tebnsbe, dest:req, target:req + mr (\dest), IFR + andi (\dest), (\dest), PORE_ID_SBE + braz (\dest), (\target) + .endm + + ////////////////////////////////////////////////////////////////////// // LPCS - Load Pervasive Chiplet from Scom address ////////////////////////////////////////////////////////////////////// diff --git a/src/usr/hwpf/hwp/build_winkle_images/proc_slw_build/pore_bitmanip.H b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/pore_bitmanip.H index b9ba60424..b9ba60424 100644 --- a/src/usr/hwpf/hwp/build_winkle_images/proc_slw_build/pore_bitmanip.H +++ b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/pore_bitmanip.H diff --git a/src/usr/hwpf/hwp/build_winkle_images/proc_slw_build/pore_inline.h b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/pore_inline.h index a8436d69f..a8436d69f 100644 --- a/src/usr/hwpf/hwp/build_winkle_images/proc_slw_build/pore_inline.h +++ b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/pore_inline.h diff --git a/src/usr/hwpf/hwp/build_winkle_images/proc_slw_build/pore_inline_assembler.c b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/pore_inline_assembler.c index ec4f0abbf..b576f8281 100644 --- a/src/usr/hwpf/hwp/build_winkle_images/proc_slw_build/pore_inline_assembler.c +++ b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/pore_inline_assembler.c @@ -1,26 +1,25 @@ -/* IBM_PROLOG_BEGIN_TAG - * This is an automatically generated prolog. - * - * $Source: src/usr/hwpf/hwp/build_winkle_images/proc_slw_build/pore_inline_assembler.c $ - * - * IBM CONFIDENTIAL - * - * COPYRIGHT International Business Machines Corp. 2012 - * - * p1 - * - * Object Code Only (OCO) source materials - * Licensed Internal Code Source Materials - * IBM HostBoot Licensed Internal Code - * - * The source code for this program is not published or other- - * wise divested of its trade secrets, irrespective of what has - * been deposited with the U.S. Copyright Office. - * - * Origin: 30 - * - * IBM_PROLOG_END_TAG - */ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/pore_inline_assembler.c $ */ +/* */ +/* IBM CONFIDENTIAL */ +/* */ +/* COPYRIGHT International Business Machines Corp. 2012 */ +/* */ +/* p1 */ +/* */ +/* Object Code Only (OCO) source materials */ +/* Licensed Internal Code Source Materials */ +/* IBM HostBoot Licensed Internal Code */ +/* */ +/* The source code for this program is not published or otherwise */ +/* divested of its trade secrets, irrespective of what has been */ +/* deposited with the U.S. Copyright Office. */ +/* */ +/* Origin: 30 */ +/* */ +/* IBM_PROLOG_END_TAG */ // $Id: pore_inline_assembler.c,v 1.14 2012/05/23 19:03:42 bcbrock Exp $ // ** WARNING : This file is maintained as part of the OCC firmware. Do ** diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_pba_bar_config/p8_pba_bar_config_errors.xml b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/proc_pba_bar_config_errors.xml index c150e1c26..21b2ff311 100644 --- a/src/usr/hwpf/hwp/build_winkle_images/p8_pba_bar_config/p8_pba_bar_config_errors.xml +++ b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/proc_pba_bar_config_errors.xml @@ -1,7 +1,7 @@ <!-- IBM_PROLOG_BEGIN_TAG --> <!-- This is an automatically generated prolog. --> <!-- --> -<!-- $Source: src/usr/hwpf/hwp/build_winkle_images/p8_pba_bar_config/p8_pba_bar_config_errors.xml $ --> +<!-- $Source: src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/proc_pba_bar_config_errors.xml $ --> <!-- --> <!-- IBM CONFIDENTIAL --> <!-- --> @@ -20,7 +20,7 @@ <!-- Origin: 30 --> <!-- --> <!-- IBM_PROLOG_END_TAG --> -<!-- $Id: p8_pba_bar_config_errors.xml,v 1.1 2012/09/27 09:20:45 pchatnah Exp $ --> +<!-- $Id: proc_pba_bar_config_errors.xml,v 1.4 2012/09/12 21:59:26 wenning Exp $ --> <!-- Error definitions for proc_pba_bar_config procedure --> <hwpErrors> <!-- *********************************************************************** --> diff --git a/src/usr/hwpf/hwp/build_winkle_images/proc_slw_build/sbe_xip_image.c b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/sbe_xip_image.c index 138b1d7cb..0160b7bd9 100644 --- a/src/usr/hwpf/hwp/build_winkle_images/proc_slw_build/sbe_xip_image.c +++ b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/sbe_xip_image.c @@ -1,27 +1,26 @@ -/* IBM_PROLOG_BEGIN_TAG - * This is an automatically generated prolog. - * - * $Source: src/usr/hwpf/hwp/build_winkle_images/proc_slw_build/sbe_xip_image.c $ - * - * IBM CONFIDENTIAL - * - * COPYRIGHT International Business Machines Corp. 2012 - * - * p1 - * - * Object Code Only (OCO) source materials - * Licensed Internal Code Source Materials - * IBM HostBoot Licensed Internal Code - * - * The source code for this program is not published or other- - * wise divested of its trade secrets, irrespective of what has - * been deposited with the U.S. Copyright Office. - * - * Origin: 30 - * - * IBM_PROLOG_END_TAG - */ -// $Id: sbe_xip_image.c,v 1.20 2012/06/21 01:41:31 bcbrock Exp $ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/sbe_xip_image.c $ */ +/* */ +/* IBM CONFIDENTIAL */ +/* */ +/* COPYRIGHT International Business Machines Corp. 2012 */ +/* */ +/* p1 */ +/* */ +/* Object Code Only (OCO) source materials */ +/* Licensed Internal Code Source Materials */ +/* IBM HostBoot Licensed Internal Code */ +/* */ +/* The source code for this program is not published or otherwise */ +/* divested of its trade secrets, irrespective of what has been */ +/* deposited with the U.S. Copyright Office. */ +/* */ +/* Origin: 30 */ +/* */ +/* IBM_PROLOG_END_TAG */ +// $Id: sbe_xip_image.c,v 1.21 2012/09/18 20:16:49 bcbrock Exp $ // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/sbe/sbe_xip_image.c,v $ //----------------------------------------------------------------------------- // *! (C) Copyright International Business Machines Corp. 2011 @@ -1386,6 +1385,7 @@ sbe_xip_normalize(void* io_image) for (; tocEntries--; imageToc++) { rc = normalizeToc(io_image, imageToc, &fixedTocEntry, &fixedEntriesRemaining); + if (rc) break; } if (rc) break; diff --git a/src/usr/hwpf/hwp/build_winkle_images/proc_slw_build/sbe_xip_image.h b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/sbe_xip_image.h index 02421cd30..200277d39 100644 --- a/src/usr/hwpf/hwp/build_winkle_images/proc_slw_build/sbe_xip_image.h +++ b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/sbe_xip_image.h @@ -1,26 +1,25 @@ -/* IBM_PROLOG_BEGIN_TAG - * This is an automatically generated prolog. - * - * $Source: src/usr/hwpf/hwp/build_winkle_images/proc_slw_build/sbe_xip_image.h $ - * - * IBM CONFIDENTIAL - * - * COPYRIGHT International Business Machines Corp. 2012 - * - * p1 - * - * Object Code Only (OCO) source materials - * Licensed Internal Code Source Materials - * IBM HostBoot Licensed Internal Code - * - * The source code for this program is not published or other- - * wise divested of its trade secrets, irrespective of what has - * been deposited with the U.S. Copyright Office. - * - * Origin: 30 - * - * IBM_PROLOG_END_TAG - */ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/sbe_xip_image.h $ */ +/* */ +/* IBM CONFIDENTIAL */ +/* */ +/* COPYRIGHT International Business Machines Corp. 2012 */ +/* */ +/* p1 */ +/* */ +/* Object Code Only (OCO) source materials */ +/* Licensed Internal Code Source Materials */ +/* IBM HostBoot Licensed Internal Code */ +/* */ +/* The source code for this program is not published or otherwise */ +/* divested of its trade secrets, irrespective of what has been */ +/* deposited with the U.S. Copyright Office. */ +/* */ +/* Origin: 30 */ +/* */ +/* IBM_PROLOG_END_TAG */ #ifndef __SBE_XIP_IMAGE_H #define __SBE_XIP_IMAGE_H diff --git a/src/usr/hwpf/hwp/build_winkle_images/proc_gen_cpureg/HvPlicModule.H b/src/usr/hwpf/hwp/build_winkle_images/proc_gen_cpureg/HvPlicModule.H deleted file mode 100644 index 859c217cd..000000000 --- a/src/usr/hwpf/hwp/build_winkle_images/proc_gen_cpureg/HvPlicModule.H +++ /dev/null @@ -1,24 +0,0 @@ -/* IBM_PROLOG_BEGIN_TAG - * This is an automatically generated prolog. - * - * $Source: src/usr/hwpf/hwp/build_winkle_images/pore_gen_cpureg/HvPlicModule.H $ - * - * IBM CONFIDENTIAL - * - * COPYRIGHT International Business Machines Corp. 2012 - * - * p1 - * - * Object Code Only (OCO) source materials - * Licensed Internal Code Source Materials - * IBM HostBoot Licensed Internal Code - * - * The source code for this program is not published or other- - * wise divested of its trade secrets, irrespective of what has - * been deposited with the U.S. Copyright Office. - * - * Origin: 30 - * - * IBM_PROLOG_END_TAG - */ - diff --git a/src/usr/hwpf/hwp/build_winkle_images/proc_slw_build/p8_pore_static_data.c b/src/usr/hwpf/hwp/build_winkle_images/proc_slw_build/p8_pore_static_data.c deleted file mode 100644 index e1a8387c0..000000000 --- a/src/usr/hwpf/hwp/build_winkle_images/proc_slw_build/p8_pore_static_data.c +++ /dev/null @@ -1,118 +0,0 @@ -/* IBM_PROLOG_BEGIN_TAG - * This is an automatically generated prolog. - * - * $Source: src/usr/hwpf/hwp/build_winkle_images/proc_slw_build/p8_pore_static_data.c $ - * - * IBM CONFIDENTIAL - * - * COPYRIGHT International Business Machines Corp. 2012 - * - * p1 - * - * Object Code Only (OCO) source materials - * Licensed Internal Code Source Materials - * IBM HostBoot Licensed Internal Code - * - * The source code for this program is not published or other- - * wise divested of its trade secrets, irrespective of what has - * been deposited with the U.S. Copyright Office. - * - * Origin: 30 - * - * IBM_PROLOG_END_TAG - */ -/* $Id: p8_pore_static_data.c,v 1.1 2011/08/25 12:32:01 yjkim Exp $ */ -/* $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/utils/p8_pore_static_data.c,v $ */ -/*------------------------------------------------------------------------------*/ -/* *! (C) Copyright International Business Machines Corp. 2010 */ -/* *! All Rights Reserved -- Property of IBM */ -/* *! *** IBM Confidential *** */ -/*------------------------------------------------------------------------------*/ -/* *! TITLE p7p_pore_static_data */ -/* *! DESCRIPTION : Static data for PORE APIs */ -/* *! OWNER NAME : Nicole Schwartz Email: nschwart@us.ibm.com */ -/* *! BACKUP NAME : */ -/* *! ADDITIONAL COMMENTS : */ - -/*------------------------------------------------------------------------------*/ -/* Don't forget to create CVS comments when you check in your changes! */ -/*------------------------------------------------------------------------------*/ -/* HvPlic include needed for PHYP, must be first include */ -/*#include "HvPlicModule.H"*/ -#include "p8_pore_api_custom.h" -#include "p8_pore_api.h" -#include "p8_pore_static_data.h" - -/* Note: this info is a place holder until we get all other rings */ -const p8_pore_ringInfoStruct P8_PORE_RINGINFO[] = { - /*ring name ring local address scan region/type*/ - { "REPR_RING_C0", 0x00034A08, 0x48000080 }, - { "REPR_RING_C1", 0x00034A02, 0x48002000 }, - { "REPR_RING_C2", 0x00034A01, 0x48004000 }, - { "REPR_RING_C3", 0x00034A04, 0x48000800 }, - { "REPR_RING_C4", 0x00034A07, 0x48000100 }, - { "REPR_RING_C5", 0x00034A05, 0x48000400 }, - { "REPR_RING_C6", 0x00034A07, 0x48000100 }, - { "REPR_RING_C7", 0x00034A05, 0x48000400 }, - /* P7P data - { "EX_ECO_BNDY", 0x00034A08, 0x48000080 }, - { "EX_ECO_GPTR", 0x00034A02, 0x48002000 }, - { "EX_ECO_MODE", 0x00034A01, 0x48004000 }, - { "EX_ECO_LBST", 0x00034A04, 0x48000800 }, - { "EX_ECO_TIME", 0x00034A07, 0x4800010000000000 }, - { "EX_ECO_ABST", 0x00034A05, 0x4800040000000000 }, - { "EX_ECO_REGF", 0x00034A03, 0x4800100000000000 }, - { "EX_ECO_REPR", 0x00034A06, 0x4800020000000000 }, - { "EX_ECO_FUNC", 0x00034800, 0x4800800000000000 }, - { "EX_ECO_L3REFR", 0x00030200, 0x0200800000000000 }, - { "EX_ECO_DPLL_FUNC", 0x00030400, 0x0400800000000000 }, - { "EX_ECO_DPLL_GPTR", 0x00030402, 0x0400200000000000 }, - { "EX_ECO_DPLL_MODE", 0x00030401, 0x0400400000000000 }, - { "EX_CORE_BNDY", 0x00033008, 0x3000008000000000 }, - { "EX_CORE_GPTR", 0x00033002, 0x3000200000000000 }, - { "EX_CORE_MODE", 0x00033001, 0x3000400000000000 }, - { "EX_CORE_LBST", 0x00033004, 0x3000080000000000 }, - { "EX_CORE_TIME", 0x00033007, 0x3000010000000000 }, - { "EX_CORE_ABST", 0x00033005, 0x3000040000000000 }, - { "EX_CORE_REGF", 0x00032003, 0x2000100000000000 }, - { "EX_CORE_REPR", 0x00033006, 0x3000020000000000 }, - { "EX_CORE_FUNC", 0x00032000, 0x2000800000000000 }, - { "EX_CORE_L2FARY", 0x00031009, 0x1000900000000000 }, - */ -}; - -const int P8_PORE_RINGINDEX=sizeof P8_PORE_RINGINFO/sizeof P8_PORE_RINGINFO[0]; - -/* -*************** Do not edit this area *************** -This section is automatically updated by CVS when you check in this file. -Be sure to create CVS comments when you commit so that they can be included here. - -$Log: p8_pore_static_data.c,v $ -Revision 1.1 2011/08/25 12:32:01 yjkim -initial checkin - -Revision 1.5 2010/10/19 22:34:41 schwartz -added #include <p7p_pore_static_data.h> - -Revision 1.4 2010/08/26 15:13:33 schwartz -Fixed more C++ style comments to C style comments - -Revision 1.3 2010/08/26 03:57:02 schwartz -Changed comments to C-style -Changed "" to <> for #includes -Moved RINGINFO struct and RINGINDEX constant into separate object file, includes created static_data.h file -Put p7p_pore in front of #defines -Removed ring length from ringInfoStruct -Renamed scom operators to have SCOM in the name -Fixed gen_scan to use SCANRD and SCANWR pore instructions -Fixed compiler warnings - -Revision 1.2 2010/07/09 15:38:35 schwartz -Changed ring names to uppercase and updated length of rings. Neither of these pieces of data are used in the gen_scan API, but is used when generating rings for verification - -Revision 1.1 2010/06/23 23:10:06 schwartz -Moved constants ringInfoStruct and RINGINDEX into this file - - -*/ diff --git a/src/usr/hwpf/hwp/build_winkle_images/proc_slw_build/p8_pore_static_data.h b/src/usr/hwpf/hwp/build_winkle_images/proc_slw_build/p8_pore_static_data.h deleted file mode 100644 index dd18808b4..000000000 --- a/src/usr/hwpf/hwp/build_winkle_images/proc_slw_build/p8_pore_static_data.h +++ /dev/null @@ -1,72 +0,0 @@ -/* IBM_PROLOG_BEGIN_TAG - * This is an automatically generated prolog. - * - * $Source: src/usr/hwpf/hwp/build_winkle_images/proc_slw_build/p8_pore_static_data.h $ - * - * IBM CONFIDENTIAL - * - * COPYRIGHT International Business Machines Corp. 2012 - * - * p1 - * - * Object Code Only (OCO) source materials - * Licensed Internal Code Source Materials - * IBM HostBoot Licensed Internal Code - * - * The source code for this program is not published or other- - * wise divested of its trade secrets, irrespective of what has - * been deposited with the U.S. Copyright Office. - * - * Origin: 30 - * - * IBM_PROLOG_END_TAG - */ -/* $Id: p8_pore_static_data.h,v 1.1 2011/08/25 12:31:51 yjkim Exp $ */ -/* $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/utils/p8_pore_static_data.h,v $ */ -/*------------------------------------------------------------------------------*/ -/* *! (C) Copyright International Business Machines Corp. 2010 */ -/* *! All Rights Reserved -- Property of IBM */ -/* *! *** IBM Confidential *** */ -/*------------------------------------------------------------------------------*/ -/* *! TITLE p8_pore_static_data */ -/* *! DESCRIPTION : Static data for PORE APIs */ -/* *! OWNER NAME : Nicole Schwartz Email: nschwart@us.ibm.com */ -/* *! BACKUP NAME : */ -/* *! ADDITIONAL COMMENTS : */ -/* */ -/*------------------------------------------------------------------------------*/ -/* Don't forget to create CVS comments when you check in your changes! */ -/*------------------------------------------------------------------------------*/ - -#ifndef _P8_PORE_STATIC_DATA_H -#define _P8_PORE_STATIC_DATA_H - -extern const p8_pore_ringInfoStruct P8_PORE_RINGINFO[]; -extern const int P8_PORE_RINGINDEX; - -#endif /* _P8_PORE_STATIC_DATA_H */ - -/* -*************** Do not edit this area *************** -This section is automatically updated by CVS when you check in this file. -Be sure to create CVS comments when you commit so that they can be included here. - -$Log: p8_pore_static_data.h,v $ -Revision 1.1 2011/08/25 12:31:51 yjkim -initial check-in - -Revision 1.2 2010/08/26 15:13:34 schwartz -Fixed more C++ style comments to C style comments - -Revision 1.1 2010/08/26 03:57:02 schwartz -Changed comments to C-style -Changed "" to <> for #includes -Moved RINGINFO struct and RINGINDEX constant into separate object file, includes created static_data.h file -Put p7p_pore in front of #defines -Removed ring length from ringInfoStruct -Renamed scom operators to have SCOM in the name -Fixed gen_scan to use SCANRD and SCANWR pore instructions -Fixed compiler warnings - - -*/ diff --git a/src/usr/hwpf/hwp/build_winkle_images/proc_slw_build/proc_slw_build.H b/src/usr/hwpf/hwp/build_winkle_images/proc_slw_build/proc_slw_build.H deleted file mode 100644 index be6d8db06..000000000 --- a/src/usr/hwpf/hwp/build_winkle_images/proc_slw_build/proc_slw_build.H +++ /dev/null @@ -1,50 +0,0 @@ -/* IBM_PROLOG_BEGIN_TAG - * This is an automatically generated prolog. - * - * $Source: src/usr/hwpf/hwp/build_winkle_images/proc_slw_build/proc_slw_build.H $ - * - * IBM CONFIDENTIAL - * - * COPYRIGHT International Business Machines Corp. 2012 - * - * p1 - * - * Object Code Only (OCO) source materials - * Licensed Internal Code Source Materials - * IBM HostBoot Licensed Internal Code - * - * The source code for this program is not published or other- - * wise divested of its trade secrets, irrespective of what has - * been deposited with the U.S. Copyright Office. - * - * Origin: 30 - * - * IBM_PROLOG_END_TAG - */ - -#include <fapi.H> - -typedef fapi::ReturnCode (*proc_slw_build_FP_t) ( const fapi::Target&, - const void*, - uint32_t, - void*, - uint32_t*); - -extern "C" -{ - // Description: FAPI HWP entry point. proc_slw_build() constructs the - // Sleep-Winkle (SLW) image in mainstore during Hostboot - // IPL. - // Parameters: i_target: Processor chip target. - // *i_imageIn: Pointer to location of input SBE-XIP image. - // i_sizeImageIn: Size of input image. - // *i_imageOut: Pointer to location of output SLW image in - // mainstore. - // *io_sizeImageOut: On input, upper limit of size of output - // image. On output, final size of output image. - fapi::ReturnCode proc_slw_build( const fapi::Target &i_target, - const void *i_imageIn, - uint32_t i_sizeImageIn, - void *i_imageOut, - uint32_t *io_sizeImageOut); -} diff --git a/src/usr/hwpf/hwp/core_activate/core_activate.C b/src/usr/hwpf/hwp/core_activate/core_activate.C index 7072b086f..a0e597bc1 100644 --- a/src/usr/hwpf/hwp/core_activate/core_activate.C +++ b/src/usr/hwpf/hwp/core_activate/core_activate.C @@ -121,6 +121,62 @@ using namespace ISTEP_ERROR; (const_cast<TARGETING::Target*> (l_cpu_target)) ); +#if 1 + // SIMICS HACK - The values written by simics are not correct - + // Write them here until we can get the actions files fixed. + // @todo RTC 41384 + const uint64_t PORE_SBE_CONTROL_0x000E0001 = 0x00000000000E0001 ; + const uint64_t MBOX_SBEVITAL_0x0005001C = 0x000000000005001C ; + fapi::ReturnCode rc; + ecmdDataBufferBase data(64); + uint32_t sbe_code = 0; + + rc = fapiGetScom( l_fapi_cpu_target, + PORE_SBE_CONTROL_0x000E0001, + data ); + if(!rc.ok()) { TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,"ERROR: reading scom" ); } + + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "DEBUG: PORE_SBE_CONTROL_0x000E0001 = 0x%lx", + data.getDoubleWord( 0 ) ); + + if ( !is_vpo() ) + { + // proc_prep_master_winkle expects bit 0 to be off (SBE running) + data.clearBit(0); + rc = fapiPutScom( l_fapi_cpu_target, + PORE_SBE_CONTROL_0x000E0001, + data ); + } + + rc = fapiGetScom( l_fapi_cpu_target, + MBOX_SBEVITAL_0x0005001C, + data ); + if(!rc.ok()) { TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,"ERROR: reading scom" ); } + + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "DEBUG: MBOX_SBEVITAL_0x0005001C = 0x%lx", + data.getDoubleWord( 0 ) ); + + + if ( !is_vpo() ) + { + // prop_prep_master_winkle expects the SBE to write F011 to + // SBE_VITAL before we get here. + sbe_code = 0xF011; + data.insertFromRight( &sbe_code, + 16, // ISTEP_NUM_BIT_POSITION + 16 ); // number of bits + rc = fapiPutScom( l_fapi_cpu_target, + MBOX_SBEVITAL_0x0005001C, + data ); + if(!rc.ok()) { TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,"ERROR: writing scom" ); } + } +#else + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "Simics has been fixed..." ); +#endif + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_host_activate_master: call proc_prep_master_winkle." ); @@ -178,6 +234,39 @@ using namespace ISTEP_ERROR; TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "Returned from Winkle." ); +#if 1 + // SIMICS HACK - The values written by simics are not correct - + // Write them here until we can get the actions files fixed. + + rc = fapiGetScom( l_fapi_cpu_target, + MBOX_SBEVITAL_0x0005001C, + data ); + if(!rc.ok()) { TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,"ERROR: reading scom" ); } + + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "DEBUG: MBOX_SBEVITAL_0x0005001C = 0x%lx", + data.getDoubleWord( 0 ) ); + + if ( !is_vpo() ) + { + // prop_stop_deadman_timer expects the SBE to write F015 to + // SBE_VITAL before we get here. + sbe_code = 0xF015; + data.insertFromRight( &sbe_code, + 16, // ISTEP_NUM_BIT_POSITION + 16 ); // number of bits + rc = fapiPutScom( l_fapi_cpu_target, + MBOX_SBEVITAL_0x0005001C, + data ); + if(!rc.ok()) { TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,"ERROR: writing scom" ); } + } + +#else + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "Simics has been fixed..." ); +#endif + + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "Call proc_stop_deadman_timer..." ); @@ -195,7 +284,7 @@ using namespace ISTEP_ERROR; else { TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, - "proc_prep_master_winkle SUCCESS" ); + "proc_stop_deadman_timer SUCCESS" ); } } while ( 0 ); diff --git a/src/usr/hwpf/hwp/core_activate/proc_prep_master_winkle/p8_istep_num.H b/src/usr/hwpf/hwp/core_activate/proc_prep_master_winkle/p8_istep_num.H index 58791a89a..5c2820bf1 100644 --- a/src/usr/hwpf/hwp/core_activate/proc_prep_master_winkle/p8_istep_num.H +++ b/src/usr/hwpf/hwp/core_activate/proc_prep_master_winkle/p8_istep_num.H @@ -1,30 +1,29 @@ -/* IBM_PROLOG_BEGIN_TAG - * This is an automatically generated prolog. - * - * $Source: src/usr/hwpf/hwp/core_activate/proc_prep_master_winkle/p8_istep_num.H $ - * - * IBM CONFIDENTIAL - * - * COPYRIGHT International Business Machines Corp. 2012 - * - * p1 - * - * Object Code Only (OCO) source materials - * Licensed Internal Code Source Materials - * IBM HostBoot Licensed Internal Code - * - * The source code for this program is not published or other- - * wise divested of its trade secrets, irrespective of what has - * been deposited with the U.S. Copyright Office. - * - * Origin: 30 - * - * IBM_PROLOG_END_TAG - */ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/hwpf/hwp/core_activate/proc_prep_master_winkle/p8_istep_num.H $ */ +/* */ +/* IBM CONFIDENTIAL */ +/* */ +/* COPYRIGHT International Business Machines Corp. 2012 */ +/* */ +/* p1 */ +/* */ +/* Object Code Only (OCO) source materials */ +/* Licensed Internal Code Source Materials */ +/* IBM HostBoot Licensed Internal Code */ +/* */ +/* The source code for this program is not published or otherwise */ +/* divested of its trade secrets, irrespective of what has been */ +/* deposited with the U.S. Copyright Office. */ +/* */ +/* Origin: 30 */ +/* */ +/* IBM_PROLOG_END_TAG */ #ifndef __P8_ISTEP_NUM_H #define __P8_ISTEP_NUM_H -// $Id: p8_istep_num.H,v 1.11 2012/08/01 02:50:49 venton Exp $ +// $Id: p8_istep_num.H,v 1.16 2012/09/14 21:11:54 mfred Exp $ /// Istep number encoding for all SEEPROM and PNOR procedures. Used to update /// the SBEVITAL register to record procedure progress and to create unique @@ -34,22 +33,23 @@ CONST_UINT64_T(proc_sbe_enable_seeprom_istep_num, ULL(0x0101)); CONST_UINT64_T(proc_sbe_tp_chiplet_init1_istep_num, ULL(0x0201)); CONST_UINT64_T(proc_sbe_tp_ld_image_istep_num, ULL(0x0202)); -CONST_UINT64_T(proc_sbe_npll_initf_istep_num, ULL(0x0203)); -CONST_UINT64_T(proc_sbe_npll_setup_istep_num, ULL(0x0204)); -CONST_UINT64_T(proc_sbe_tp_switch_gears_istep_num, ULL(0x0205)); -CONST_UINT64_T(proc_sbe_tp_chiplet_init2_istep_num, ULL(0x0206)); -CONST_UINT64_T(proc_sbe_tp_arrayinit_istep_num, ULL(0x0207)); -CONST_UINT64_T(proc_sbe_tp_chiplet_init3_istep_num, ULL(0x0208)); -CONST_UINT64_T(proc_sbe_chiplet_init_istep_num, ULL(0x0209)); -CONST_UINT64_T(proc_sbe_arrayinit_istep_num, ULL(0x020A)); -CONST_UINT64_T(proc_sbe_setup_evid_istep_num, ULL(0x020B)); -CONST_UINT64_T(proc_sbe_initf_istep_num, ULL(0x020C)); -CONST_UINT64_T(proc_sbe_pb_startclocks_istep_num, ULL(0x020D)); -CONST_UINT64_T(proc_sbe_scominit_istep_num, ULL(0x020E)); -CONST_UINT64_T(proc_sbe_fabricinit_istep_num, ULL(0x020F)); -CONST_UINT64_T(proc_sbe_check_master_istep_num, ULL(0x0210)); -CONST_UINT64_T(proc_sbe_select_ex_istep_num, ULL(0x0211)); -CONST_UINT64_T(proc_sbe_run_exinit_istep_num, ULL(0x0212)); +CONST_UINT64_T(proc_sbe_nest_skewadjust_istep_num, ULL(0x0203)); +CONST_UINT64_T(proc_sbe_npll_initf_istep_num, ULL(0x0204)); +CONST_UINT64_T(proc_sbe_npll_setup_istep_num, ULL(0x0205)); +CONST_UINT64_T(proc_sbe_tp_switch_gears_istep_num, ULL(0x0206)); +CONST_UINT64_T(proc_sbe_tp_chiplet_init2_istep_num, ULL(0x0207)); +CONST_UINT64_T(proc_sbe_tp_arrayinit_istep_num, ULL(0x0208)); +CONST_UINT64_T(proc_sbe_tp_chiplet_init3_istep_num, ULL(0x0209)); +CONST_UINT64_T(proc_sbe_chiplet_init_istep_num, ULL(0x020A)); +CONST_UINT64_T(proc_sbe_arrayinit_istep_num, ULL(0x020B)); +CONST_UINT64_T(proc_sbe_setup_evid_istep_num, ULL(0x020C)); +CONST_UINT64_T(proc_sbe_initf_istep_num, ULL(0x020D)); +CONST_UINT64_T(proc_sbe_pb_startclocks_istep_num, ULL(0x020E)); +CONST_UINT64_T(proc_sbe_scominit_istep_num, ULL(0x020F)); +CONST_UINT64_T(proc_sbe_fabricinit_istep_num, ULL(0x0210)); +CONST_UINT64_T(proc_sbe_check_master_istep_num, ULL(0x0211)); +CONST_UINT64_T(proc_sbe_select_ex_istep_num, ULL(0x0212)); +CONST_UINT64_T(proc_sbe_run_exinit_istep_num, ULL(0x0213)); CONST_UINT64_T(proc_sbe_pnor_setup_istep_num, ULL(0x0301)); @@ -57,22 +57,27 @@ CONST_UINT64_T(proc_sbe_ex_chiplet_reset_istep_num, ULL(0x0401)); CONST_UINT64_T(proc_sbe_ex_gptr_time_initf_istep_num, ULL(0x0402)); CONST_UINT64_T(proc_sbe_ex_core_gptr_time_initf_istep_num, ULL(0x0403)); CONST_UINT64_T(proc_sbe_ex_dpll_initf_istep_num, ULL(0x0404)); -CONST_UINT64_T(proc_sbe_ex_chiplet_init_istep_num, ULL(0x0405)); -CONST_UINT64_T(proc_sbe_ex_repair_initf_istep_num, ULL(0x0406)); -CONST_UINT64_T(proc_sbe_ex_core_repair_initf_istep_num, ULL(0x0407)); -CONST_UINT64_T(proc_sbe_ex_arrayinit_istep_num, ULL(0x0408)); -CONST_UINT64_T(proc_sbe_ex_initf_istep_num, ULL(0x0409)); -CONST_UINT64_T(proc_sbe_ex_core_initf_istep_num, ULL(0x040A)); -CONST_UINT64_T(proc_sbe_ex_do_manual_inits_istep_num, ULL(0x040B)); -CONST_UINT64_T(proc_sbe_ex_startclocks_istep_num, ULL(0x040C)); -CONST_UINT64_T(proc_sbe_ex_init_escape_istep_num, ULL(0x040D)); -CONST_UINT64_T(proc_sbe_ex_sp_runtime_scom_istep_num, ULL(0x040E)); -CONST_UINT64_T(proc_sbe_ex_occ_runtime_scom_istep_num, ULL(0x040F)); -CONST_UINT64_T(proc_sbe_ex_host_runtime_scom_istep_num, ULL(0x0410)); +CONST_UINT64_T(proc_sbe_ex_dpll_setup_istep_num, ULL(0x0405)); +CONST_UINT64_T(proc_sbe_ex_chiplet_init_istep_num, ULL(0x0406)); +CONST_UINT64_T(proc_sbe_ex_repair_initf_istep_num, ULL(0x0407)); +CONST_UINT64_T(proc_sbe_ex_core_repair_initf_istep_num, ULL(0x0408)); +CONST_UINT64_T(proc_sbe_ex_arrayinit_istep_num, ULL(0x0409)); +CONST_UINT64_T(proc_sbe_ex_initf_istep_num, ULL(0x040A)); +CONST_UINT64_T(proc_sbe_ex_core_initf_istep_num, ULL(0x040B)); +CONST_UINT64_T(proc_sbe_ex_do_manual_inits_istep_num, ULL(0x040C)); +CONST_UINT64_T(proc_sbe_ex_startclocks_istep_num, ULL(0x040D)); +CONST_UINT64_T(proc_sbe_ex_init_escape_istep_num, ULL(0x040E)); +CONST_UINT64_T(proc_sbe_ex_sp_runtime_scom_istep_num, ULL(0x040F)); +CONST_UINT64_T(proc_sbe_ex_occ_runtime_scom_istep_num, ULL(0x0410)); +CONST_UINT64_T(proc_sbe_ex_host_runtime_scom_istep_num, ULL(0x0411)); -CONST_UINT64_T(proc_sbe_lco_loader_istep_num, ULL(0x0500)); -CONST_UINT64_T(proc_sbe_instruct_start_istep_num, ULL(0x0501)); +CONST_UINT64_T(proc_sbe_enable_pnor_istep_num, ULL(0x0500)); +CONST_UINT64_T(proc_sbe_lco_loader_istep_num, ULL(0x0501)); +CONST_UINT64_T(proc_sbe_instruct_start_istep_num, ULL(0x0502)); CONST_UINT64_T(proc_sbe_trigger_winkle_istep_num, ULL(0x0F01)); +#define PROC_SBE_TRIGGER_WINKLE_ISTEP_NUM proc_sbe_trigger_winkle_istep_num +#define PROC_SBE_CHECK_MASTER_ISTEP_NUM proc_sbe_check_master_istep_num + #endif // __P8_ISTEP_NUM_H diff --git a/src/usr/hwpf/hwp/core_activate/proc_prep_master_winkle/proc_prep_master_winkle.C b/src/usr/hwpf/hwp/core_activate/proc_prep_master_winkle/proc_prep_master_winkle.C index bfcd48b93..2ef60754d 100644 --- a/src/usr/hwpf/hwp/core_activate/proc_prep_master_winkle/proc_prep_master_winkle.C +++ b/src/usr/hwpf/hwp/core_activate/proc_prep_master_winkle/proc_prep_master_winkle.C @@ -1,28 +1,27 @@ -/* IBM_PROLOG_BEGIN_TAG - * This is an automatically generated prolog. - * - * $Source: src/usr/hwpf/hwp/core_activate/proc_prep_master_winkle/proc_prep_master_winkle.C $ - * - * IBM CONFIDENTIAL - * - * COPYRIGHT International Business Machines Corp. 2012 - * - * p1 - * - * Object Code Only (OCO) source materials - * Licensed Internal Code Source Materials - * IBM HostBoot Licensed Internal Code - * - * The source code for this program is not published or other- - * wise divested of its trade secrets, irrespective of what has - * been deposited with the U.S. Copyright Office. - * - * Origin: 30 - * - * IBM_PROLOG_END_TAG - */ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/hwpf/hwp/core_activate/proc_prep_master_winkle/proc_prep_master_winkle.C $ */ +/* */ +/* IBM CONFIDENTIAL */ +/* */ +/* COPYRIGHT International Business Machines Corp. 2012 */ +/* */ +/* p1 */ +/* */ +/* Object Code Only (OCO) source materials */ +/* Licensed Internal Code Source Materials */ +/* IBM HostBoot Licensed Internal Code */ +/* */ +/* The source code for this program is not published or otherwise */ +/* divested of its trade secrets, irrespective of what has been */ +/* deposited with the U.S. Copyright Office. */ +/* */ +/* Origin: 30 */ +/* */ +/* IBM_PROLOG_END_TAG */ // -*- mode: C++; c-file-style: "linux"; -*- -// $Id: proc_prep_master_winkle.C,v 1.7 2012/08/01 18:58:38 jeshua Exp $ +// $Id: proc_prep_master_winkle.C,v 1.9 2012/09/11 14:06:21 jeshua Exp $ // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/proc_prep_master_winkle.C,v $ //------------------------------------------------------------------------------ // *| @@ -40,7 +39,16 @@ // *! Start SBE deadman timer // *! *Enter winkle* // *! -// *! Note: Hostboot should always run with useRealSBE = true +// *! Note: Hostboot should always run with i_useRealSBE = true +// *! +// *! Here's the flow of SBE_VITAL substeps: +// *! SBE (automatic on procedure entry): substep_proc_entry +// *! SBE : substep_sbe_ready +// *! HB (proc_prep_master_winkle) : substep_deadman_start +// *! SBE : substep_deadman_waiting_for_winkle +// *! SBE : substep_deadman_waiting_for_wakeup +// *! HB (proc_stop_deadman_timer) : substep_hostboot_alive_again +// *! SBE : (stops with error code 0xF to indicate success) //------------------------------------------------------------------------------ @@ -48,6 +56,10 @@ // Includes //------------------------------------------------------------------------------ #include "proc_prep_master_winkle.H" +#include "p8_scom_addresses.H" +#include "proc_sbe_ffdc.H" +#include "p8_istep_num.H" +#include "proc_sbe_trigger_winkle.H" //------------------------------------------------------------------------------ // Function definitions @@ -64,11 +76,15 @@ extern "C" // Start SBE deadman timer // *Enter winkle* // -// parameters: i_target => chip target +// parameters: i_target => master chip target +// i_useRealSBE => True if proc_sbe_trigger_winkle is supposed to be +// running on the real SBE (default is true), else +// false if proc_sbe_trigger_winkle is running on +// the FSP (via poreve). // returns: FAPI_RC_SUCCESS if operation was successful, else error //------------------------------------------------------------------------------ - fapi::ReturnCode proc_prep_master_winkle(const fapi::Target & i_target, - bool useRealSBE = true) + fapi::ReturnCode proc_prep_master_winkle(const fapi::Target & i_target, + bool i_useRealSBE = true) { // data buffer to hold register values ecmdDataBufferBase data(64); @@ -78,32 +94,21 @@ extern "C" fapi::ReturnCode rc; // mark function entry - FAPI_INF("Entry\n"); + FAPI_INF("Entry, useRealSBE is %s\n", i_useRealSBE? "true":"false"); do { - + // Wait for SBE ready // ie. SBE running, and istep num and substep num correct - if( useRealSBE ) - { - -// $$$$$ -// $$$$$ mww need to set up action file to fill in the SBE regs -// $$$$$ These scoms are not set to the right value. -// $$$$$ In simics, we need an action file to set them up. -// $$$$$ - FAPI_INF("mww read PORE_SBE_CONTROL_0x000E0001"); + if( i_useRealSBE ) + { rc = fapiGetScom(i_target, PORE_SBE_CONTROL_0x000E0001, data); if(!rc.ok()) { FAPI_ERR("Scom error reading SBE STATUS\n"); break; } - - // $$$$$ @todo HACK - data.clearBit( 0 ) ; - if( data.isBitSet( 0 ) ) { FAPI_ERR("SBE isn't running when it should be\n"); @@ -114,8 +119,6 @@ extern "C" } } - FAPI_INF("mww read MBOX_SBEVITAL_0x0005001C"); - rc = fapiGetScom(i_target, MBOX_SBEVITAL_0x0005001C, data); if(!rc.ok()) { @@ -123,69 +126,61 @@ extern "C" break; } - uint32_t istep_num = 0; uint8_t substep_num = 0; rc_ecmd |= data.extractToRight(&istep_num, - istep_num_bit_position, - istep_num_bit_length); + ISTEP_NUM_BIT_POSITION, + ISTEP_NUM_BIT_LENGTH); rc_ecmd |= data.extractToRight(&substep_num, - substep_num_bit_position, - substep_num_bit_length); + SUBSTEP_NUM_BIT_POSITION, + SUBSTEP_NUM_BIT_LENGTH); if(rc_ecmd) { FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", rc_ecmd); rc.setEcmdError(rc_ecmd); break; } - - // $$ @todo HACK - istep_num = 0x0f01; - substep_num = 0x01; - - if( istep_num != proc_sbe_trigger_winkle_istep_num ) + if( istep_num != PROC_SBE_TRIGGER_WINKLE_ISTEP_NUM ) { FAPI_ERR("Expected istep num %llX but found %X\n", - proc_sbe_trigger_winkle_istep_num, + PROC_SBE_TRIGGER_WINKLE_ISTEP_NUM, istep_num ); const fapi::Target & CHIP_IN_ERROR = i_target; ecmdDataBufferBase & SBE_VITAL = data; FAPI_SET_HWP_ERROR(rc, RC_PROC_PREP_MASTER_WINKLE_BAD_ISTEP_NUM); break; } - if( substep_num != substep_sbe_ready ) + if( substep_num != SUBSTEP_SBE_READY ) { FAPI_ERR("Expected substep num %X but found %X\n", - substep_sbe_ready, + SUBSTEP_SBE_READY, substep_num ); const fapi::Target & CHIP_IN_ERROR = i_target; ecmdDataBufferBase & SBE_VITAL = data; FAPI_SET_HWP_ERROR(rc, RC_PROC_PREP_MASTER_WINKLE_BAD_SUBSTEP_NUM); break; } - FAPI_INF("SBE is ready for master to enter winkle\n"); //Start the deadman timer - substep_num = substep_deadman_start; + substep_num = SUBSTEP_DEADMAN_START; rc_ecmd |= data.insertFromRight(&substep_num, - substep_num_bit_position, - substep_num_bit_length); + SUBSTEP_NUM_BIT_POSITION, + SUBSTEP_NUM_BIT_LENGTH); if(rc_ecmd) { FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", rc_ecmd); rc.setEcmdError(rc_ecmd); break; } - FAPI_INF("mww write MBOX_SBEVITAL_0x0005001C"); rc = fapiPutScom(i_target, MBOX_SBEVITAL_0x0005001C, data); if(!rc.ok()) { FAPI_ERR("Scom error updating SBE VITAL\n"); break; } - - //Enter winlke + + //Enter winkle FAPI_INF("HB should enter winkle now, FSP should execute proc_force_winkle now\n"); } while (0); diff --git a/src/usr/hwpf/hwp/core_activate/proc_prep_master_winkle/proc_prep_master_winkle.H b/src/usr/hwpf/hwp/core_activate/proc_prep_master_winkle/proc_prep_master_winkle.H index fd4048c7e..0a384b567 100644 --- a/src/usr/hwpf/hwp/core_activate/proc_prep_master_winkle/proc_prep_master_winkle.H +++ b/src/usr/hwpf/hwp/core_activate/proc_prep_master_winkle/proc_prep_master_winkle.H @@ -1,27 +1,26 @@ -/* IBM_PROLOG_BEGIN_TAG - * This is an automatically generated prolog. - * - * $Source: src/usr/hwpf/hwp/core_activate/proc_prep_master_winkle/proc_prep_master_winkle.H $ - * - * IBM CONFIDENTIAL - * - * COPYRIGHT International Business Machines Corp. 2012 - * - * p1 - * - * Object Code Only (OCO) source materials - * Licensed Internal Code Source Materials - * IBM HostBoot Licensed Internal Code - * - * The source code for this program is not published or other- - * wise divested of its trade secrets, irrespective of what has - * been deposited with the U.S. Copyright Office. - * - * Origin: 30 - * - * IBM_PROLOG_END_TAG - */ -// $Id: proc_prep_master_winkle.H,v 1.3 2012/08/01 18:37:38 jeshua Exp $ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/hwpf/hwp/core_activate/proc_prep_master_winkle/proc_prep_master_winkle.H $ */ +/* */ +/* IBM CONFIDENTIAL */ +/* */ +/* COPYRIGHT International Business Machines Corp. 2012 */ +/* */ +/* p1 */ +/* */ +/* Object Code Only (OCO) source materials */ +/* Licensed Internal Code Source Materials */ +/* IBM HostBoot Licensed Internal Code */ +/* */ +/* The source code for this program is not published or otherwise */ +/* divested of its trade secrets, irrespective of what has been */ +/* deposited with the U.S. Copyright Office. */ +/* */ +/* Origin: 30 */ +/* */ +/* IBM_PROLOG_END_TAG */ +// $Id: proc_prep_master_winkle.H,v 1.5 2012/08/24 18:32:51 jeshua Exp $ // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/proc_prep_master_winkle.H,v $ //------------------------------------------------------------------------------ // *| @@ -44,10 +43,6 @@ //------------------------------------------------------------------------------ #include <fapi.H> -#include "p8_scom_addresses.H" -#include "proc_sbe_ffdc.H" -#include "p8_istep_num.H" -#include "proc_sbe_trigger_winkle.H" //------------------------------------------------------------------------------ // Structure definitions @@ -55,7 +50,7 @@ // function pointer typedef definition for HWP call support typedef fapi::ReturnCode (*proc_prep_master_winkle_FP_t)(const fapi::Target &, - const bool &); + const bool ); //------------------------------------------------------------------------------ // Constant definitions @@ -72,12 +67,16 @@ extern "C" /** * @brief Start the auto-POR engine and the SBE * - * @param[in] i_target Reference to chip target + * @param[in] i_target Reference to master chip target + * @param[in] i_useRealSBE True if proc_sbe_trigger_winkle is supposed to be + * running on the real SBE (default is true), else + * false if proc_sbe_trigger_winkle is running on + * the FSP (via poreve). * * @return ReturnCode */ fapi::ReturnCode proc_prep_master_winkle(const fapi::Target & i_target, - const bool useRealSBE); + const bool i_useRealSBE); } // extern "C" diff --git a/src/usr/hwpf/hwp/core_activate/proc_prep_master_winkle/proc_sbe_trigger_winkle.H b/src/usr/hwpf/hwp/core_activate/proc_prep_master_winkle/proc_sbe_trigger_winkle.H index 4614bd682..3abd8a176 100644 --- a/src/usr/hwpf/hwp/core_activate/proc_prep_master_winkle/proc_sbe_trigger_winkle.H +++ b/src/usr/hwpf/hwp/core_activate/proc_prep_master_winkle/proc_sbe_trigger_winkle.H @@ -1,46 +1,42 @@ -/* IBM_PROLOG_BEGIN_TAG - * This is an automatically generated prolog. - * - * $Source: src/usr/hwpf/hwp/core_activate/proc_prep_master_winkle/proc_sbe_trigger_winkle.H $ - * - * IBM CONFIDENTIAL - * - * COPYRIGHT International Business Machines Corp. 2012 - * - * p1 - * - * Object Code Only (OCO) source materials - * Licensed Internal Code Source Materials - * IBM HostBoot Licensed Internal Code - * - * The source code for this program is not published or other- - * wise divested of its trade secrets, irrespective of what has - * been deposited with the U.S. Copyright Office. - * - * Origin: 30 - * - * IBM_PROLOG_END_TAG - */ -// $Id: proc_sbe_trigger_winkle.H,v 1.3 2012/05/11 21:16:15 jeshua Exp $ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/hwpf/hwp/core_activate/proc_prep_master_winkle/proc_sbe_trigger_winkle.H $ */ +/* */ +/* IBM CONFIDENTIAL */ +/* */ +/* COPYRIGHT International Business Machines Corp. 2012 */ +/* */ +/* p1 */ +/* */ +/* Object Code Only (OCO) source materials */ +/* Licensed Internal Code Source Materials */ +/* IBM HostBoot Licensed Internal Code */ +/* */ +/* The source code for this program is not published or otherwise */ +/* divested of its trade secrets, irrespective of what has been */ +/* deposited with the U.S. Copyright Office. */ +/* */ +/* Origin: 30 */ +/* */ +/* IBM_PROLOG_END_TAG */ +// $Id: proc_sbe_trigger_winkle.H,v 1.6 2012/09/21 19:29:25 stillgs Exp $ -/// Istep number encoding for all SEEPROM and PNOR procedures. Used to update -/// the SBEVITAL register to record procedure progress +/// Substep numbers for the proc_sbe_trigger_winkle procedure #ifndef __PROC_SBE_TRIGGER_WINKLE_H #define __PROC_SBE_TRIGGER_WINKLE_H #include "fapi_sbe_common.H" +#include "sbe_vital.H" -CONST_UINT8_T(substep_proc_entry, ULL(0x0)); -CONST_UINT8_T(substep_sbe_ready, ULL(0x1)); -CONST_UINT8_T(substep_deadman_start, ULL(0x2)); -CONST_UINT8_T(substep_deadman_waiting_for_winlke, ULL(0x3)); -CONST_UINT8_T(substep_deadman_waiting_for_wakeup, ULL(0x4)); -CONST_UINT8_T(substep_hostboot_alive_again, ULL(0x5)); +CONST_UINT8_T(SUBSTEP_PROC_ENTRY, ULL(0x0)); +CONST_UINT8_T(SUBSTEP_SBE_READY, ULL(0x1)); +CONST_UINT8_T(SUBSTEP_DEADMAN_START, ULL(0x2)); +CONST_UINT8_T(SUBSTEP_DEADMAN_WAITING_FOR_WINKLE, ULL(0x3)); +CONST_UINT8_T(SUBSTEP_DEADMAN_WAITING_FOR_WAKEUP, ULL(0x4)); +CONST_UINT8_T(SUBSTEP_DEADMAN_WAITING_FOR_HOSTBOOT, ULL(0x5)); +CONST_UINT8_T(SUBSTEP_HOSTBOOT_ALIVE_AGAIN, ULL(0x6)); -CONST_UINT8_T(istep_num_bit_position, ULL(16)); -CONST_UINT8_T(istep_num_bit_length, ULL(12)); -CONST_UINT8_T(substep_num_bit_position, ULL(28)); -CONST_UINT8_T(substep_num_bit_length, ULL(4)); #endif // __PROC_SBE_TRIGGER_WINKLE_H diff --git a/src/usr/hwpf/hwp/core_activate/proc_prep_master_winkle/sbe_vital.H b/src/usr/hwpf/hwp/core_activate/proc_prep_master_winkle/sbe_vital.H new file mode 100644 index 000000000..1289c02b3 --- /dev/null +++ b/src/usr/hwpf/hwp/core_activate/proc_prep_master_winkle/sbe_vital.H @@ -0,0 +1,40 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/hwpf/hwp/core_activate/proc_prep_master_winkle/sbe_vital.H $ */ +/* */ +/* IBM CONFIDENTIAL */ +/* */ +/* COPYRIGHT International Business Machines Corp. 2012 */ +/* */ +/* p1 */ +/* */ +/* Object Code Only (OCO) source materials */ +/* Licensed Internal Code Source Materials */ +/* IBM HostBoot Licensed Internal Code */ +/* */ +/* The source code for this program is not published or otherwise */ +/* divested of its trade secrets, irrespective of what has been */ +/* deposited with the U.S. Copyright Office. */ +/* */ +/* Origin: 30 */ +/* */ +/* IBM_PROLOG_END_TAG */ +// $Id: sbe_vital.H,v 1.1 2012/09/10 20:51:30 jeshua Exp $ + +/// Bit locations and lengths of the fields in the SBE vital register + +#ifndef __SBE_VITAL_H +#define __SBE_VITAL_H + +#include "fapi_sbe_common.H" + +CONST_UINT8_T(HALT_CODE_BIT_POSITION, ULL(12)); +CONST_UINT8_T(HALT_CODE_BIT_LENGTH, ULL(4)); +CONST_UINT8_T(ISTEP_NUM_BIT_POSITION, ULL(16)); +CONST_UINT8_T(ISTEP_NUM_BIT_LENGTH, ULL(12)); +CONST_UINT8_T(SUBSTEP_NUM_BIT_POSITION, ULL(28)); +CONST_UINT8_T(SUBSTEP_NUM_BIT_LENGTH, ULL(4)); + + +#endif // __SBE_VITAL_H diff --git a/src/usr/hwpf/hwp/core_activate/proc_stop_deadman_timer/proc_stop_deadman_timer.C b/src/usr/hwpf/hwp/core_activate/proc_stop_deadman_timer/proc_stop_deadman_timer.C index 94edaac0d..a8d992d1c 100644 --- a/src/usr/hwpf/hwp/core_activate/proc_stop_deadman_timer/proc_stop_deadman_timer.C +++ b/src/usr/hwpf/hwp/core_activate/proc_stop_deadman_timer/proc_stop_deadman_timer.C @@ -1,28 +1,27 @@ -/* IBM_PROLOG_BEGIN_TAG - * This is an automatically generated prolog. - * - * $Source: src/usr/hwpf/hwp/core_activate/proc_stop_deadman_timer/proc_stop_deadman_timer.C $ - * - * IBM CONFIDENTIAL - * - * COPYRIGHT International Business Machines Corp. 2012 - * - * p1 - * - * Object Code Only (OCO) source materials - * Licensed Internal Code Source Materials - * IBM HostBoot Licensed Internal Code - * - * The source code for this program is not published or other- - * wise divested of its trade secrets, irrespective of what has - * been deposited with the U.S. Copyright Office. - * - * Origin: 30 - * - * IBM_PROLOG_END_TAG - */ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/hwpf/hwp/core_activate/proc_stop_deadman_timer/proc_stop_deadman_timer.C $ */ +/* */ +/* IBM CONFIDENTIAL */ +/* */ +/* COPYRIGHT International Business Machines Corp. 2012 */ +/* */ +/* p1 */ +/* */ +/* Object Code Only (OCO) source materials */ +/* Licensed Internal Code Source Materials */ +/* IBM HostBoot Licensed Internal Code */ +/* */ +/* The source code for this program is not published or otherwise */ +/* divested of its trade secrets, irrespective of what has been */ +/* deposited with the U.S. Copyright Office. */ +/* */ +/* Origin: 30 */ +/* */ +/* IBM_PROLOG_END_TAG */ // -*- mode: C++; c-file-style: "linux"; -*- -// $Id: proc_stop_deadman_timer.C,v 1.4 2012/08/10 14:19:16 jeshua Exp $ +// $Id: proc_stop_deadman_timer.C,v 1.6 2012/09/21 19:35:08 stillgs Exp $ // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/proc_stop_deadman_timer.C,v $ //------------------------------------------------------------------------------ // *| @@ -38,7 +37,7 @@ // *! Overview: // *! Notify SBE that HB is alive again // *! Make sure SBE stopped -// *! +// *! // *! Here's the flow of SBE_VITAL substeps: // *! SBE (automatic on procedure entry): substep_proc_entry // *! SBE : substep_sbe_ready @@ -85,11 +84,12 @@ extern "C" fapi::ReturnCode rc; // mark function entry - FAPI_INF("Entry\n"); + FAPI_INF("Entry new\n"); do { - //Check that SBE is running the deadman timer + // Given this procedure is running, the SBE deadman function did + // its job. Check that for the SBE_VITAL being at the correct spot rc = fapiGetScom(i_target, MBOX_SBEVITAL_0x0005001C, data); if(!rc.ok()) { @@ -100,24 +100,20 @@ extern "C" uint32_t istep_num = 0; uint8_t substep_num = 0; rc_ecmd |= data.extractToRight(&istep_num, - istep_num_bit_position, - istep_num_bit_length); + ISTEP_NUM_BIT_POSITION, + ISTEP_NUM_BIT_LENGTH); rc_ecmd |= data.extractToRight(&substep_num, - substep_num_bit_position, - substep_num_bit_length); + SUBSTEP_NUM_BIT_POSITION, + SUBSTEP_NUM_BIT_LENGTH); if(rc_ecmd) { FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", rc_ecmd); rc.setEcmdError(rc_ecmd); break; } - - // $$ @todo HACK - istep_num = 0x0f01; - substep_num = 0x04; - if( istep_num != proc_sbe_trigger_winkle_istep_num ) { + FAPI_ERR("Expected istep num %llX but found %X\n", proc_sbe_trigger_winkle_istep_num, istep_num ); @@ -126,10 +122,11 @@ extern "C" FAPI_SET_HWP_ERROR(rc, RC_PROC_STOP_DEADMAN_TIMER_BAD_ISTEP_NUM); break; } - if( substep_num != substep_deadman_waiting_for_wakeup ) + + if( substep_num != SUBSTEP_DEADMAN_WAITING_FOR_HOSTBOOT ) { FAPI_ERR("Expected substep num %X but found %X\n", - substep_deadman_waiting_for_wakeup, + SUBSTEP_DEADMAN_WAITING_FOR_HOSTBOOT, substep_num ); const fapi::Target & CHIP_IN_ERROR = i_target; ecmdDataBufferBase & SBE_VITAL = data; @@ -138,10 +135,10 @@ extern "C" } //Notify SBE that HB is alive again - substep_num = substep_hostboot_alive_again; + substep_num = SUBSTEP_HOSTBOOT_ALIVE_AGAIN; rc_ecmd |= data.insertFromRight(&substep_num, - substep_num_bit_position, - substep_num_bit_length); + SUBSTEP_NUM_BIT_POSITION, + SUBSTEP_NUM_BIT_LENGTH); if(rc_ecmd) { FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", rc_ecmd); diff --git a/src/usr/hwpf/hwp/makefile b/src/usr/hwpf/hwp/makefile index abe936b44..3034d975d 100644 --- a/src/usr/hwpf/hwp/makefile +++ b/src/usr/hwpf/hwp/makefile @@ -30,7 +30,7 @@ EXTRAINCDIR += ${ROOTPATH}/src/include/usr/hwpf/plat # CompressedScanData struct needed for getRepairRings() EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/include -EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/build_winkle_images/proc_slw_build +EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build OBJS = fapiTestHwp.o \ fapiTestHwpError.o \ diff --git a/src/usr/hwpf/makefile b/src/usr/hwpf/makefile index fdfd65b52..17fca2812 100644 --- a/src/usr/hwpf/makefile +++ b/src/usr/hwpf/makefile @@ -37,20 +37,22 @@ HWP_ERROR_XML_FILES = hwp/fapiHwpErrorInfo.xml \ hwp/dram_training/memory_errors.xml \ hwp/nest_chiplets/proc_start_clocks_chiplets/proc_start_clocks_chiplets_errors.xml \ hwp/edi_ei_initialization/proc_fab_iovalid/proc_fab_smp_errors.xml \ - hwp/build_winkle_images/proc_slw_build/proc_slw_build_errors.xml \ hwp/mvpd_errors.xml \ ../pore/fapiporeve/fapiPoreVe_errors.xml \ hwp/dram_initialization/proc_setup_bars/proc_setup_bars_errors.xml \ - hwp/build_winkle_images/p8_set_pore_bar/p8_set_pore_bar_errors.xml \ - hwp/build_winkle_images/p8_pba_bar_config/p8_pba_bar_config_errors.xml \ hwp/nest_chiplets/proc_chiplet_scominit/proc_chiplet_scominit_errors.xml \ + hwp/build_winkle_images/p8_slw_build/p8_slw_build_errors.xml \ + hwp/build_winkle_images/p8_slw_build/proc_pba_bar_config_errors.xml \ hwp/nest_chiplets/proc_a_x_pci_dmi_pll_setup_errors.xml \ hwp/core_activate/proc_prep_master_winkle/proc_prep_master_winkle_errors.xml \ hwp/core_activate/proc_stop_deadman_timer/proc_stop_deadman_timer_errors.xml \ hwp/activate_powerbus/proc_build_smp/proc_build_smp_errors.xml \ hwp/activate_powerbus/proc_build_smp/proc_adu_utils_errors.xml \ hwp/thread_activate/proc_thread_control/proc_thread_control.xml \ - hwp/erepair_errors.xml + hwp/erepair_errors.xml \ + hwp/build_winkle_images/p8_set_pore_bar/p8_set_pore_bar_errors.xml \ + hwp/build_winkle_images/p8_set_pore_bar/p8_pmc_deconfig_setup_errors.xml \ + hwp/build_winkle_images/p8_set_pore_bar/p8_poreslw_errors.xml ## these get generated into obj/genfiles/AttributeIds.H @@ -72,7 +74,7 @@ HWP_ATTR_XML_FILES = hwp/memory_attributes.xml \ hwp/dram_initialization/proc_setup_bars/proc_setup_bars_mmio_attributes.xml \ hwp/activate_powerbus/proc_build_smp/proc_fab_smp_fabric_attributes.xml \ hwp/runtime_attributes/pm_plat_attributes.xml \ - hwp/runtime_attributes/pm_hwp_attributes.xml + hwp/runtime_attributes/pm_hwp_attributes.xml #------------------------------------------------------------------------------ # Initfiles |
