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author | Jacob Harvey <jlharvey@us.ibm.com> | 2017-06-09 15:16:48 -0500 |
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committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-06-13 12:26:07 -0400 |
commit | 9d2ca2037b942f29c5bb259dc9b6e68f8f50a71c (patch) | |
tree | 47c7a413f90eb1624a93b61ad358208c92676a5f /src | |
parent | 4838ba774dbe01cc72c5257a5fba5459cccbd374 (diff) | |
download | talos-hostboot-9d2ca2037b942f29c5bb259dc9b6e68f8f50a71c.tar.gz talos-hostboot-9d2ca2037b942f29c5bb259dc9b6e68f8f50a71c.zip |
Fix bug cas_latency vector
Change-Id: I610250aadf0eebf9e7d94f422ebcf6d8c7324bb5
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41637
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41640
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Reviewed-by: JACOB L. HARVEY <jlharvey@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src')
-rw-r--r-- | src/import/chips/p9/procedures/hwp/memory/p9_mss_freq.C | 14 | ||||
-rw-r--r-- | src/import/chips/p9/procedures/hwp/memory/p9_mss_freq.H | 38 |
2 files changed, 25 insertions, 27 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq.C b/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq.C index 0e7ad4969..86ef6f407 100644 --- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq.C +++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq.C @@ -40,7 +40,7 @@ // std lib #include <map> - +#include <utility> // fapi2 #include <fapi2.H> @@ -95,7 +95,7 @@ extern "C" { const auto l_mcs_index = mss::index(l_mcs); - std::vector< uint64_t > l_desired_cas_latency(mss::PORTS_PER_MCS, 0 ); + std::vector< std::pair< uint64_t, fapi2::Target<fapi2::TARGET_TYPE_MCA>> > l_desired_cas_latency; for (const auto& l_mca : mss::find_targets<TARGET_TYPE_MCA>(l_mcs) ) { @@ -111,6 +111,7 @@ extern "C" // instantiation of class that calculates CL algorithm fapi2::ReturnCode l_rc; mss::cas_latency l_cas_latency( l_mca, l_factory_caches, l_rc ); + FAPI_TRY( l_rc, "%s. Failed to initialize cas_latency ctor", mss::c_str(l_mca) ); if(l_cas_latency.iv_dimm_list_empty) @@ -125,16 +126,19 @@ extern "C" // go from clocks to time (and vice versa.) We have other bugs if there was really // no MT/s determined and there really is a DIMM installed, so this is ok. // We pick the maximum frequency supported by the system as the default. + uint64_t l_desired_cl = 0; + l_min_dimm_freq[l_mcs_index][l_index] = fapi2::ENUM_ATTR_MSS_FREQ_MT2666; uint64_t l_tCKmin = 0; // Find CAS latency using JEDEC algorithm - FAPI_TRY( l_cas_latency.find_cl(l_desired_cas_latency[l_index], - l_tCKmin) ); + FAPI_TRY( l_cas_latency.find_cl(l_desired_cl, l_tCKmin) ); FAPI_INF("%s. Result from CL algorithm, CL (nck): %d, tCK (ps): %d", - mss::c_str(l_mca), l_desired_cas_latency[l_index], l_tCKmin); + mss::c_str(l_mca), l_desired_cl, l_tCKmin); + + l_desired_cas_latency.push_back(std::make_pair(l_desired_cl, l_mca) ); // Find dimm transfer speed from selected tCK FAPI_TRY( mss::ps_to_freq(l_tCKmin, l_min_dimm_freq[l_mcs_index][l_index]), diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq.H b/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq.H index b6cc5fbc6..e4104ac25 100644 --- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq.H +++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq.H @@ -35,7 +35,7 @@ #ifndef MSS_FREQ_H_ #define MSS_FREQ_H_ - +#include <utility> #include <fapi2.H> #include <lib/freq/cas_latency.H> #include <lib/shared/mss_const.H> @@ -46,30 +46,21 @@ namespace mss /// /// @brief Sets DRAM CAS latency attributes -/// @param[in] i_target the controller target -/// @param[in] i_cas_latency vector of the two final selected CAS latencies +/// @param[in] i_target the controller target the cas_latency vector is for +/// @param[in] i_cas_latency vector of pairs. Contains the two final selected CAS latencies /// @return FAPI2_RC_SUCCESS iff ok /// inline fapi2::ReturnCode set_CL_attr(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, - const std::vector< uint64_t >& i_cas_latency) + const std::vector< std::pair< uint64_t, fapi2::Target<fapi2::TARGET_TYPE_MCA>> >& i_cas_latency) { // I wish I could do the reinterpret cast or set the pointer to the vector :( // But no can do, manual copy pasta uint8_t l_temp [mss::PORTS_PER_MCS] = {0}; - const auto l_functional_ports = find_targets<fapi2::TARGET_TYPE_MCA>(i_target); - - FAPI_ASSERT( l_functional_ports.size() == i_cas_latency.size(), - fapi2::MSS_ERROR_CALCULATING_CAS_LATENCY_VECTOR() - .set_NUM_PORTS_FUNCTIONAL(l_functional_ports.size()) - .set_NUM_CAS_LATENCIES_FOUND(i_cas_latency.size()) - .set_MCS_TARGET(i_target), - "%s Error calculating cas latencies. Found %d CLs for %d functional ports. Numbers should equal", - mss::c_str(i_target), i_cas_latency.size(), l_functional_ports.size() ); - for( const auto& p : l_functional_ports ) + for( const auto& cl : i_cas_latency ) { // Local variable instead of calling it three times. Hopefully compiler can optimize this better - const auto l_index = mss::index(p); + const auto l_index = mss::index(cl.second); if ( l_index >= PORTS_PER_MCS) { @@ -77,16 +68,19 @@ inline fapi2::ReturnCode set_CL_attr(const fapi2::Target<fapi2::TARGET_TYPE_MCS> fapi2::Assert(false); } - l_temp[l_index] = i_cas_latency[l_index]; - FAPI_ASSERT( l_temp[l_index] == i_cas_latency[l_index], + l_temp[l_index] = cl.first; + + //Check for rounding issues. Going from a uint64_t to a uint8_t + FAPI_ASSERT( l_temp[l_index] == cl.first, fapi2::MSS_BAD_CL_CAST() - .set_CL(i_cas_latency[l_index]) - .set_MCA_TARGET(p), + .set_CL(cl.first) + .set_MCA_TARGET(cl.second), "%s bad cast for cas latency from %d to %d", - mss::c_str(p), - i_cas_latency[l_index], + mss::c_str(cl.second), + cl.first, l_temp[l_index]); - FAPI_INF( "Final Chosen CL: %d for %s", l_temp[l_index], mss::c_str(p)); + + FAPI_INF( "Final Chosen CL: %d for %s", l_temp[l_index], mss::c_str(cl.second)); } // set CAS latency attribute |