Integrate mss_thermal_init into hostboot

Change-Id: Iea04963657650a711546f59ee0873f6ed2f5265a
RTC: 42178
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2460
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Tested-by: Jenkins Server

9 files changed, 3616 insertions, 34 deletions

diff --git a/src/include/usr/hwpf/istepreasoncodes.H b/src/include/usr/hwpf/istepreasoncodes.H
index 39894f4ac..83572f22e 100644
--- a/src/include/usr/hwpf/istepreasoncodes.H
+++ b/src/include/usr/hwpf/istepreasoncodes.H
@@ -103,6 +103,7 @@ enum istepModuleId
     ISTEP_PROC_PCIE_CONFIG                              = 0x36,
     ISTEP_HOST_MPIPL_SERVICE                            = 0x37,
     ISTEP_PROC_CEN_SET_INBAND_ADDR                      = 0x38,
+    ISTEP_MSS_THERMAL_INIT                              = 0x39,
 };
 
 /**
diff --git a/src/usr/hwpf/hwp/dram_initialization/dram_initialization.C b/src/usr/hwpf/hwp/dram_initialization/dram_initialization.C
index 45170890b..a5b6b61ac 100644
--- a/src/usr/hwpf/hwp/dram_initialization/dram_initialization.C
+++ b/src/usr/hwpf/hwp/dram_initialization/dram_initialization.C
@@ -48,6 +48,7 @@
 #include    <diag/attn/attn.H>
 #include    <initservice/isteps_trace.H>
 #include    <hwpisteperror.H>
+#include    <errl/errludtarget.H>
 
 //  targeting support
 #include    <targeting/common/commontargeting.H>
@@ -68,7 +69,7 @@
 #include    "mss_extent_setup/mss_extent_setup.H"
 // #include    "mss_memdiag/mss_memdiag.H"
 // #include    "mss_scrub/mss_scrub.H"
-// #include    "mss_thermal_init/mss_thermal_init.H"
+#include    "mss_thermal_init/mss_thermal_init.H"
 #include    "proc_setup_bars/mss_setup_bars.H"
 #include    "proc_setup_bars/proc_setup_bars.H"
 #include    "proc_pcie_config/proc_pcie_config.H"
@@ -86,6 +87,7 @@ namespace   DRAM_INITIALIZATION
 
 using   namespace   ISTEP;
 using   namespace   ISTEP_ERROR;
+using   namespace   ERRORLOG;
 using   namespace   TARGETING;
 using   namespace   EDI_EI_INITIALIZATION;
 using   namespace   fapi;
@@ -117,7 +119,8 @@ void*    call_host_startPRD_dram( void    *io_pArgs )
     const fapi::Target l_fapi_@targetN_target(
                     TARGET_TYPE_MEMBUF_CHIP,
                     reinterpret_cast<void *>
-                        (const_cast<TARGETING::Target*>(l_@targetN_target)) );
+                        (const_cast<TARGETING::
+                         Target*>(l_@targetN_target)) );
 
     //  call the HWP with each fapi::Target
     FAPI_INVOKE_HWP( l_errl, host_startPRD_dram, _args_...);
@@ -329,47 +332,86 @@ void*    call_mss_thermal_init( void    *io_pArgs )
 {
     errlHndl_t  l_errl  =   NULL;
 
-    TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+    IStepError  l_StepError;
+
+    TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
                "call_mss_thermal_init entry" );
 
-#if 0
-    // @@@@@    CUSTOM BLOCK:   @@@@@
-    //  figure out what targets we need
-    //  customize any other inputs
-    //  set up loops to go through all targets (if parallel, spin off a task)
+    // Get all Centaur targets
+    TARGETING::TargetHandleList l_memBufTargetList;
+    getAllChips(l_memBufTargetList, TYPE_MEMBUF );
+
+    //  --------------------------------------------------------------------
+    //  run mss_thermal_init on all Centaurs
+    //  --------------------------------------------------------------------
+    for (TargetHandleList::iterator l_iter = l_memBufTargetList.begin();
+            l_iter != l_memBufTargetList.end();
+            ++l_iter)
+    {
+        //  make a local copy of the target for ease of use
+        const TARGETING::Target*  l_pCentaur = *l_iter;
 
-    //  dump physical path to targets
-    EntityPath l_path;
-    l_path  =   l_@targetN_target->getAttr<ATTR_PHYS_PATH>();
-    l_path.dump();
+        //  dump physical path to targets
+        EntityPath l_path;
+        l_path  =   l_pCentaur->getAttr<ATTR_PHYS_PATH>();
+        l_path.dump();
 
-    // cast OUR type of target to a FAPI type of target.
-    const fapi::Target l_fapi_@targetN_target(
-                    TARGET_TYPE_MEMBUF_CHIP,
-                    reinterpret_cast<void *>
-                        (const_cast<TARGETING::Target*>(l_@targetN_target)) );
+        // cast OUR type of target to a FAPI type of target.
+        const fapi::Target l_fapi_pCentaur(
+                TARGET_TYPE_MEMBUF_CHIP,
+                reinterpret_cast<void *>
+                (const_cast<TARGETING::Target*>(l_pCentaur)) );
+
+        //  call the HWP with each fapi::Target
+        FAPI_INVOKE_HWP( l_errl, mss_thermal_init, l_fapi_pCentaur );
+
+        if ( l_errl )
+        {
+            TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+                    "ERROR 0x%.8X: mss_thermal_init HWP returns error",
+                    l_errl->reasonCode());
+
+            ErrlUserDetailsTarget myDetails(l_pCentaur);
+
+            // capture the target data in the elog
+            myDetails.addToLog( l_errl );
+
+            /*@
+             * @errortype
+             * @reasoncode       ISTEP_DRAM_INITIALIZATION_FAILED
+             * @severity         ERRORLOG::ERRL_SEV_UNRECOVERABLE
+             * @moduleid         ISTEP_MSS_THERMAL_INIT
+             * @userdata1        bytes 0-1: plid identifying first error
+             *                   bytes 2-3: reason code of first error
+             * @userdata2        bytes 0-1: total number of elogs included
+             *                   bytes 2-3: N/A
+             * @devdesc          call to mss_thermal_init has failed
+             *                   see error log in the user details section for
+             *                   additional details.
+             */
+            l_StepError.addErrorDetails(ISTEP_DRAM_INITIALIZATION_FAILED,
+                                        ISTEP_MSS_THERMAL_INIT,
+                                        l_errl );
+
+            errlCommit( l_errl, HWPF_COMP_ID );
+
+            break;
+        }
 
-    //  call the HWP with each fapi::Target
-    FAPI_INVOKE_HWP( l_errl, mss_thermal_init, _args_...);
-    if ( l_errl )
-    {
-        TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
-                  "ERROR : .........." );
-        errlCommit( l_errl, HWPF_COMP_ID );
     }
-    else
+
+    if(l_StepError.isNull())
     {
         TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
-                   "SUCCESS : .........." );
+                   "SUCCESS : call_mss_thermal_init" );
     }
-    // @@@@@    END CUSTOM BLOCK:   @@@@@
-#endif
 
-    TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+
+    TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
                "call_mss_thermal_init exit" );
 
     // end task, returning any errorlogs to IStepDisp
-    return l_errl;
+    return l_StepError.getErrorHandle();
 }
 
 
@@ -393,9 +435,9 @@ void*    call_proc_setup_bars( void    *io_pArgs )
     TARGETING::TargetHandleList l_cpuTargetList;
     getAllChips(l_cpuTargetList, TYPE_PROC );
 
-    //  -----------------------------------------------------------------------
+    //  --------------------------------------------------------------------
     //  run mss_setup_bars on all CPUs.
-    //  -----------------------------------------------------------------------
+    //  --------------------------------------------------------------------
     for ( size_t i = 0; i < l_cpuTargetList.size(); i++ )
     {
         //  make a local copy of the target for ease of use
diff --git a/src/usr/hwpf/hwp/dram_initialization/makefile b/src/usr/hwpf/hwp/dram_initialization/makefile
index a1868d032..9e1f6e2f3 100644
--- a/src/usr/hwpf/hwp/dram_initialization/makefile
+++ b/src/usr/hwpf/hwp/dram_initialization/makefile
@@ -47,6 +47,7 @@ EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/dram_initialization/proc_setup_bars
 EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/dram_initialization/mss_memdiag
 EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/dram_initialization/proc_pcie_config
 EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/dram_initialization/host_mpipl_service
+EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/dram_initialization/mss_thermal_init
 
 
 ##  NOTE: add new object files when you add a new HWP
@@ -59,7 +60,8 @@ OBJS =  dram_initialization.o \
         mss_maint_cmds.o \
         proc_pcie_config.o \
         proc_mpipl_ex_cleanup.o \
-        proc_mpipl_chip_cleanup.o
+        proc_mpipl_chip_cleanup.o \
+        mss_thermal_init.o
 
 
 ##  NOTE: add a new directory onto the vpaths when you add a new HWP
@@ -71,6 +73,7 @@ VPATH += ${ROOTPATH}/src/usr/hwpf/hwp/dram_initialization/proc_setup_bars
 VPATH += ${ROOTPATH}/src/usr/hwpf/hwp/dram_initialization/mss_memdiag
 VPATH += ${ROOTPATH}/src/usr/hwpf/hwp/dram_initialization/proc_pcie_config
 VPATH += ${ROOTPATH}/src/usr/hwpf/hwp/dram_initialization/host_mpipl_service
+VPATH += ${ROOTPATH}/src/usr/hwpf/hwp/dram_initialization/mss_thermal_init
 
 
 include ${ROOTPATH}/config.mk
diff --git a/src/usr/hwpf/hwp/dram_initialization/mss_thermal_init/mss_thermal_init.C b/src/usr/hwpf/hwp/dram_initialization/mss_thermal_init/mss_thermal_init.C
new file mode 100644
index 000000000..7416c9170
--- /dev/null
+++ b/src/usr/hwpf/hwp/dram_initialization/mss_thermal_init/mss_thermal_init.C
@@ -0,0 +1,403 @@
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: src/usr/hwpf/hwp/dram_initialization/mss_thermal_init/mss_thermal_init.C $ */
+/*                                                                        */
+/* IBM CONFIDENTIAL                                                       */
+/*                                                                        */
+/* COPYRIGHT International Business Machines Corp. 2012                   */
+/*                                                                        */
+/* p1                                                                     */
+/*                                                                        */
+/* Object Code Only (OCO) source materials                                */
+/* Licensed Internal Code Source Materials                                */
+/* IBM HostBoot Licensed Internal Code                                    */
+/*                                                                        */
+/* The source code for this program is not published or otherwise         */
+/* divested of its trade secrets, irrespective of what has been           */
+/* deposited with the U.S. Copyright Office.                              */
+/*                                                                        */
+/* Origin: 30                                                             */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
+// $Id: mss_thermal_init.C,v 1.6 2012/11/28 15:22:20 joabhend Exp $
+// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/centaur/working/procedures/ipl/fapi/mss_thermal_init.C,v $
+//------------------------------------------------------------------------------
+// *! (C) Copyright International Business Machines Corp. 2011
+// *! All Rights Reserved -- Property of IBM
+// *! *** IBM Confidential ***
+//------------------------------------------------------------------------------
+// *! TITLE       : mss_thermal_init
+// *! DESCRIPTION : see additional comments below
+// *! OWNER NAME  : Joab Henderson    Email: joabhend@us.ibm.com
+// *! BACKUP NAME : Michael Pardeik   Email: pardeik@us.ibm.com
+// *! ADDITIONAL COMMENTS :
+//
+// DESCRIPTION:
+// The purpose of this procedure is to configure and start the OCC cache and Centaur thermal cache
+//
+// TODO:
+//
+//------------------------------------------------------------------------------
+// Don't forget to create CVS comments when you check in your changes!
+//------------------------------------------------------------------------------
+// CHANGE HISTORY:
+//------------------------------------------------------------------------------
+// Version:|  Author: |  Date:  | Comment:
+//---------|----------|---------|-----------------------------------------------
+//   1.6   | joabhend |28-NOV-12| Corrected procedure_name from char* to const char*
+//   1.5   | joabhend |16-NOV-12| Updated code to reflect review output
+//   1.4   | joabhend |02-NOV-12| Corrected scom call from SCAC_FIRMASK to SCAC_ADDRMAP
+//   1.3   | joabhend |10-OCT-12| Added section for emergency throttle disable, removed FIR bit 33 handling
+//   1.2   | gollub   |05-SEP-12| Calling mss_unmask_fetch_errors after mss_thermal_init_cloned
+//   1.1   | joabhend |30-APR-12| First Draft
+
+
+
+//----------------------------------------------------------------------
+//  Includes
+//----------------------------------------------------------------------
+#include <mss_thermal_init.H>
+#include <fapi.H>
+#include <mss_unmask_errors.H>
+
+extern "C" {
+
+   using namespace fapi;
+
+
+   // Procedures in this file
+   fapi::ReturnCode mss_thermal_init(const fapi::Target & i_target);
+   fapi::ReturnCode mss_thermal_init_cloned(const fapi::Target & i_target);
+   
+   
+//******************************************************************************
+//
+//******************************************************************************
+   
+fapi::ReturnCode mss_thermal_init(const fapi::Target & i_target)
+{
+    // Target is centaur.mba
+    
+    fapi::ReturnCode l_rc;
+    
+    l_rc = mss_thermal_init_cloned(i_target);
+    
+	// If mss_unmask_fetch_errors gets it's own bad rc,
+	// it will commit the passed in rc (if non-zero), and return it's own bad rc.
+	// Else if mss_unmask_fetch_errors runs clean, 
+	// it will just return the passed in rc.
+	l_rc = mss_unmask_fetch_errors(i_target, l_rc);
+
+	return l_rc;
+}
+   
+
+//******************************************************************************
+//
+//******************************************************************************
+
+   fapi::ReturnCode mss_thermal_init_cloned(const fapi::Target & i_target)
+   {
+
+      fapi::ReturnCode l_rc;
+      uint32_t l_ecmd_rc = 0;
+
+      const char *procedure_name = "mss_thermal_init";
+      FAPI_INF("*** Running %s ***", procedure_name);
+
+      // Constant declaration
+      const uint8_t l_NUM_MBAS = 2;                                     // Number of MBAs per Centaur
+      const uint8_t l_NUM_PORTS = 2;					// Number of ports per MBA
+      const uint8_t l_NUM_DIMMS = 2;					// Number of dimms per MBA port
+
+      const uint64_t SCAC_FIRMASK = 0x020115c3;
+      const uint64_t SCAC_ADDRMAP = 0x020115cd;
+      const uint64_t SCAC_CONFIG = 0x020115ce;
+      const uint64_t SCAC_ENABLE = 0x020115cc;
+      const uint64_t SCAC_I2CMCTRL = 0x020115d1;
+      //const uint64_t SCAC_LFIR = 0x020115c0;
+      const uint64_t SCAC_PIBTARGET = 0x020115d2;
+
+      const uint64_t MBS_EMER_THROT = 0x0201142d;
+      const uint64_t MBS_FIR_REG = 0x02011400;
+
+      const uint32_t PRIMARY_I2C_BASE_ADDR = 0x000A0000;
+      const uint32_t SPARE_I2C_BASE_ADDR = 0x000A0020;
+      const uint32_t I2C_SETUP_UPPER_HALF = 0x92314009;
+      const uint32_t I2C_SETUP_LOWER_HALF = 0x00000000;
+      const uint32_t CONFIG_INTERVAL_TIMER = 0;
+      const uint32_t CONFIG_STALE_TIMER = 0;
+
+      // Variable declaration
+      uint8_t l_dimm_ranks_array[l_NUM_MBAS][l_NUM_PORTS][l_NUM_DIMMS];	// Number of ranks for each configured DIMM in each MBA
+      uint8_t l_dimm_type_array[l_NUM_MBAS];				// Type of DIMMs in each MBA
+      uint8_t l_mba_pos = 0;						// Current MBA for populating rank array
+      ecmdDataBufferBase l_data(64);
+
+      // Get input attributes from MBAs
+      std::vector<fapi::Target> l_target_mba_array;
+      l_rc = fapiGetChildChiplets(i_target, fapi::TARGET_TYPE_MBA_CHIPLET, l_target_mba_array);
+      if (l_rc) return l_rc;
+
+      for (uint8_t mba_index = 0; mba_index < l_target_mba_array.size(); mba_index++){
+         l_rc = FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS, &l_target_mba_array[mba_index], l_mba_pos);
+	 if (l_rc) return l_rc;
+	 FAPI_INF("MBA_POS: %d", l_mba_pos);
+
+	 l_rc = FAPI_ATTR_GET(ATTR_EFF_NUM_RANKS_PER_DIMM, &l_target_mba_array[mba_index], l_dimm_ranks_array[l_mba_pos]);
+	 if (l_rc) return l_rc;
+	 FAPI_INF("EFF_NUM_RANKS: %d:%d:%d:%d", l_dimm_ranks_array[l_mba_pos][0][0], l_dimm_ranks_array[l_mba_pos][0][1], l_dimm_ranks_array[l_mba_pos][1][0], l_dimm_ranks_array[l_mba_pos][1][1]);
+
+	 l_rc = FAPI_ATTR_GET(ATTR_EFF_DIMM_TYPE, &l_target_mba_array[mba_index], l_dimm_type_array[l_mba_pos]);
+	 if (l_rc) return l_rc;
+	 FAPI_INF("ATTR_EFF_DIMM_TYPE: %d", l_dimm_type_array[l_mba_pos]);
+      }
+
+      // Configure Centaur Thermal Cache
+
+      // ---------------------------------
+      // Clear the master enable bit
+      // ---------------------------------
+
+      l_rc = fapiGetScom(i_target, SCAC_CONFIG, l_data);
+      if (l_rc) return l_rc;
+
+      l_ecmd_rc |= l_data.clearBit(0); //Master enable is bit 0
+      if(l_ecmd_rc) {
+         l_rc.setEcmdError(l_ecmd_rc);
+         return l_rc;
+      }
+
+      l_rc = fapiPutScom(i_target, SCAC_CONFIG, l_data);
+      if (l_rc) return l_rc;
+
+      // ---------------------------------
+      // Mask FIR bit 33 
+      // Sets if any sensor cache addresses are written while the master enable is set
+      // ---------------------------------
+
+      l_rc = fapiGetScom(i_target, SCAC_FIRMASK, l_data);
+      if (l_rc) return l_rc;
+
+      l_ecmd_rc |= l_data.setBit(33);
+      if(l_ecmd_rc) {
+         l_rc.setEcmdError(l_ecmd_rc);
+         return l_rc;
+      }
+
+      l_rc = fapiPutScom(i_target, SCAC_FIRMASK, l_data);
+      if (l_rc) return l_rc;
+
+      // ---------------------------------
+      // Program SensorAddressMap Register
+      // ---------------------------------
+
+      uint32_t l_addr_map_data_int;
+
+      l_rc = fapiGetScom(i_target, SCAC_ADDRMAP, l_data);
+      if (l_rc) return l_rc;
+
+      if (l_dimm_type_array[0] == fapi::ENUM_ATTR_EFF_DIMM_TYPE_CDIMM && l_dimm_type_array[1] == fapi::ENUM_ATTR_EFF_DIMM_TYPE_CDIMM){
+	 l_addr_map_data_int = 0x012389ab;
+      }
+      else{
+	 l_addr_map_data_int = 0x01234567;
+      }
+
+      ecmdDataBufferBase l_addr_map_data(32);
+      l_ecmd_rc |= l_addr_map_data.flushTo0();
+      l_ecmd_rc |= l_addr_map_data.insert(l_addr_map_data_int, 0, 32, 0);
+      l_ecmd_rc |= l_data.insert(l_addr_map_data, 0, 32, 0);
+      if(l_ecmd_rc) {
+         l_rc.setEcmdError(l_ecmd_rc);
+	 return l_rc;
+      }
+      l_rc = fapiPutScom(i_target, SCAC_ADDRMAP, l_data);
+      if (l_rc) return l_rc;
+
+      // ---------------------------------
+      // Program PibTarget Register
+      // ---------------------------------
+
+      l_rc = fapiGetScom(i_target, SCAC_PIBTARGET, l_data);
+      if (l_rc) return l_rc;
+
+      ecmdDataBufferBase l_primary_i2cm_addr(32);
+      ecmdDataBufferBase l_spare_i2cm_addr(32);
+
+      l_ecmd_rc |= l_primary_i2cm_addr.flushTo0();
+      l_ecmd_rc |= l_primary_i2cm_addr.insert(PRIMARY_I2C_BASE_ADDR, 0, 32, 0);
+
+      l_ecmd_rc |= l_spare_i2cm_addr.flushTo0();
+      l_ecmd_rc |= l_spare_i2cm_addr.insert(SPARE_I2C_BASE_ADDR, 0, 32, 0);
+
+      l_ecmd_rc |= l_data.insert(l_primary_i2cm_addr, 0, 32, 0);
+      l_ecmd_rc |= l_data.insert(l_spare_i2cm_addr, 32, 32, 0);
+      if(l_ecmd_rc) {
+         l_rc.setEcmdError(l_ecmd_rc);
+	 return l_rc;
+      }
+      l_rc = fapiPutScom(i_target, SCAC_PIBTARGET, l_data);
+      if (l_rc) return l_rc;
+
+      // ---------------------------------
+      // Program I2CMCtrl Register
+      // TODO: Check if this can be setup at scan time, since it should be constant
+      // ---------------------------------
+
+      l_rc = fapiGetScom(i_target, SCAC_I2CMCTRL, l_data);
+      if (l_rc) return l_rc;
+
+      ecmdDataBufferBase l_i2c_ctrl_upper_half(32);
+      ecmdDataBufferBase l_i2c_ctrl_lower_half(32);
+
+      l_ecmd_rc |= l_i2c_ctrl_upper_half.flushTo0();
+      l_ecmd_rc |= l_i2c_ctrl_upper_half.insert(I2C_SETUP_UPPER_HALF, 0, 32, 0);
+
+      l_ecmd_rc |= l_i2c_ctrl_lower_half.flushTo0();
+      l_ecmd_rc |= l_i2c_ctrl_lower_half.insert(I2C_SETUP_LOWER_HALF, 0, 32, 0);
+
+      l_ecmd_rc |= l_data.insert(l_i2c_ctrl_upper_half, 0, 32, 0);
+      l_ecmd_rc |= l_data.insert(l_i2c_ctrl_lower_half, 32, 0, 0);
+      if(l_ecmd_rc) {
+         l_rc.setEcmdError(l_ecmd_rc);
+	 return l_rc;
+      }
+      l_rc = fapiPutScom(i_target, SCAC_I2CMCTRL, l_data);
+      if (l_rc) return l_rc;
+
+      // ---------------------------------
+      // Program SensorCacheConfiguration Register
+      // ---------------------------------
+
+      l_rc = fapiGetScom(i_target, SCAC_CONFIG, l_data);
+      if (l_rc) return l_rc;
+
+      ecmdDataBufferBase l_interval_timer(32);
+      ecmdDataBufferBase l_stale_timer(32);
+
+      l_ecmd_rc |= l_interval_timer.flushTo0();
+      l_ecmd_rc |= l_interval_timer.insert(CONFIG_INTERVAL_TIMER, 0, 32, 0);
+
+      l_ecmd_rc |= l_stale_timer.flushTo0();
+      l_ecmd_rc |= l_stale_timer.insert(CONFIG_STALE_TIMER, 0, 32, 0);
+
+      l_ecmd_rc |= l_data.setBit(1);   //Sync to OCC_Read signal
+      l_ecmd_rc |= l_data.insert(l_interval_timer, 11, 5, 32-5);
+      l_ecmd_rc |= l_data.insert(l_stale_timer, 16, 8, 32-8);
+      if(l_ecmd_rc) {
+         l_rc.setEcmdError(l_ecmd_rc);
+	 return l_rc;
+      }
+      l_rc = fapiPutScom(i_target, SCAC_CONFIG, l_data);
+      if (l_rc) return l_rc;
+
+      // ---------------------------------
+      // Program SensorCacheEnable Register
+      // ---------------------------------
+
+      l_rc = fapiGetScom(i_target, SCAC_ENABLE, l_data);
+      if (l_rc) return l_rc;
+
+      if (l_dimm_type_array[0] == fapi::ENUM_ATTR_EFF_DIMM_TYPE_CDIMM && l_dimm_type_array[1] == fapi::ENUM_ATTR_EFF_DIMM_TYPE_CDIMM){
+         l_ecmd_rc |= l_data.setBit(0);
+	 l_ecmd_rc |= l_data.setBit(4);
+      }
+      else{
+         // Iterate through the num_ranks array to determine what DIMMs are plugged
+	 // Enable sensor monitoring for each plugged DIMM
+         uint32_t l_iterator = 0;
+         for (uint32_t i = 0; i < 2; i++){
+	    if (l_dimm_ranks_array[i][0][0] != 0){
+	       l_ecmd_rc |= l_data.setBit(l_iterator);
+	    }
+	    l_iterator++;
+	    if (l_dimm_ranks_array[i][0][1] != 0){
+	       l_ecmd_rc |= l_data.setBit(l_iterator);
+	    }
+	    l_iterator++;
+	    if (l_dimm_ranks_array[i][1][0] != 0){
+	       l_ecmd_rc |= l_data.setBit(l_iterator);
+	    }
+	    l_iterator++;
+	    if (l_dimm_ranks_array[i][1][1] != 0){
+	       l_ecmd_rc |= l_data.setBit(l_iterator);
+	    }
+	    l_iterator++;
+	 }
+      }
+
+      if(l_ecmd_rc) {
+         l_rc.setEcmdError(l_ecmd_rc);
+	 return l_rc;
+      }
+
+      l_rc = fapiPutScom(i_target, SCAC_ENABLE, l_data);
+      if (l_rc) return l_rc;
+
+
+      // ---------------------------------
+      // Set the master enable bit
+      // ---------------------------------
+
+      l_rc = fapiGetScom(i_target, SCAC_CONFIG, l_data);
+      if (l_rc) return l_rc;
+
+      l_ecmd_rc |= l_data.setBit(0);
+      if(l_ecmd_rc) {
+         l_rc.setEcmdError(l_ecmd_rc);
+	 return l_rc;
+      }
+
+      l_rc = fapiPutScom(i_target, SCAC_CONFIG, l_data);
+      if (l_rc) return l_rc;
+
+      // Configure Centaur Thermal Cache COMPLETED
+
+
+
+      // Disable Emergency Throttles
+
+      // ---------------------------------
+      // Clear the emergency throttle FIR bit (MBS FIR 21)
+      // ---------------------------------
+
+      l_rc = fapiGetScom(i_target, MBS_FIR_REG, l_data);
+      if (l_rc) return l_rc;
+
+      l_ecmd_rc |= l_data.clearBit(21);
+      if(l_ecmd_rc) {
+         l_rc.setEcmdError(l_ecmd_rc);
+	 return l_rc;
+      }
+
+      l_rc = fapiPutScom(i_target, MBS_FIR_REG, l_data);
+      if (l_rc) return l_rc;
+
+
+      // ---------------------------------
+      // Reset emergency throttle in progress bit (EMER THROT 0)
+      // ---------------------------------
+
+      l_rc = fapiGetScom(i_target, MBS_EMER_THROT, l_data);
+      if (l_rc) return l_rc;
+
+      l_ecmd_rc |= l_data.clearBit(0);
+      if(l_ecmd_rc) {
+         l_rc.setEcmdError(l_ecmd_rc);
+	 return l_rc;
+      }
+
+      l_rc = fapiPutScom(i_target, MBS_EMER_THROT, l_data);
+      if (l_rc) return l_rc;
+
+      // Disable Emergency Throttles COMPLETED
+
+      FAPI_INF("*** %s COMPLETE ***", procedure_name);
+      return l_rc;
+
+   } //end mss_thermal_init
+
+} //end extern C
+
diff --git a/src/usr/hwpf/hwp/dram_initialization/mss_thermal_init/mss_thermal_init.H b/src/usr/hwpf/hwp/dram_initialization/mss_thermal_init/mss_thermal_init.H
new file mode 100644
index 000000000..b00d18e55
--- /dev/null
+++ b/src/usr/hwpf/hwp/dram_initialization/mss_thermal_init/mss_thermal_init.H
@@ -0,0 +1,86 @@
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: src/usr/hwpf/hwp/dram_initialization/mss_thermal_init/mss_thermal_init.H $ */
+/*                                                                        */
+/* IBM CONFIDENTIAL                                                       */
+/*                                                                        */
+/* COPYRIGHT International Business Machines Corp. 2012                   */
+/*                                                                        */
+/* p1                                                                     */
+/*                                                                        */
+/* Object Code Only (OCO) source materials                                */
+/* Licensed Internal Code Source Materials                                */
+/* IBM HostBoot Licensed Internal Code                                    */
+/*                                                                        */
+/* The source code for this program is not published or otherwise         */
+/* divested of its trade secrets, irrespective of what has been           */
+/* deposited with the U.S. Copyright Office.                              */
+/*                                                                        */
+/* Origin: 30                                                             */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
+// $Id: mss_thermal_init.H,v 1.1 2012/09/05 18:11:58 joabhend Exp $
+// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/centaur/working/procedures/ipl/fapi/mss_thermal_init.H,v $
+//------------------------------------------------------------------------------
+// *! (C) Copyright International Business Machines Corp. 2011
+// *! All Rights Reserved -- Property of IBM
+// *! *** IBM Confidential ***
+//------------------------------------------------------------------------------
+// *! TITLE       : mss_throttle_to_power.H
+// *! DESCRIPTION : see additional comments below
+// *! OWNER NAME  : Joab Henderson    Email: joabhend@us.ibm.com
+// *! BACKUP NAME : Michael Pardeik   Email: pardeik@us.ibm.com
+// *! ADDITIONAL COMMENTS :
+//
+// Header file for mss_thermal_init.
+//
+//------------------------------------------------------------------------------
+// Don't forget to create CVS comments when you check in your changes!
+//------------------------------------------------------------------------------
+// CHANGE HISTORY:
+//------------------------------------------------------------------------------
+// Version:|  Author: |  Date:  | Comment:
+//---------|----------|---------|-----------------------------------------------
+//   1.1   | joabhend |30-APR-12| First Draft.
+
+
+
+#ifndef MSS_THERMAL_INIT_H_
+#define MSS_THERMAL_INIT_H_
+
+//----------------------------------------------------------------------
+//  Includes
+//----------------------------------------------------------------------
+#include <fapi.H>
+
+//----------------------------------------------------------------------
+//  Defines
+//----------------------------------------------------------------------
+
+//----------------------------------------------------------------------
+//  ENUMs
+//----------------------------------------------------------------------
+
+//----------------------------------------------------------------------
+//  Data Types
+//----------------------------------------------------------------------
+
+typedef fapi::ReturnCode (*mss_thermal_init_FP_t)(const fapi::Target & i_target);
+
+extern "C"
+{
+
+/**
+ * @brief mss_thermal_init procedure. Configure and start the OCC cache and Centaur thermal cache
+ *
+ * @param[in]  i_target  Reference to centaur target
+ *
+ * @return ReturnCode
+ */
+
+    fapi::ReturnCode mss_thermal_init(const fapi::Target & i_target);
+
+} // extern "C"
+
+#endif // MSS_THERMAL_INIT_H_
diff --git a/src/usr/hwpf/hwp/include/mss_unmask_errors.H b/src/usr/hwpf/hwp/include/mss_unmask_errors.H
new file mode 100644
index 000000000..1060509a1
--- /dev/null
+++ b/src/usr/hwpf/hwp/include/mss_unmask_errors.H
@@ -0,0 +1,275 @@
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: src/usr/hwpf/hwp/dram_initialization/mss_thermal_init/mss_unmask_errors.H $ */
+/*                                                                        */
+/* IBM CONFIDENTIAL                                                       */
+/*                                                                        */
+/* COPYRIGHT International Business Machines Corp. 2012                   */
+/*                                                                        */
+/* p1                                                                     */
+/*                                                                        */
+/* Object Code Only (OCO) source materials                                */
+/* Licensed Internal Code Source Materials                                */
+/* IBM HostBoot Licensed Internal Code                                    */
+/*                                                                        */
+/* The source code for this program is not published or otherwise         */
+/* divested of its trade secrets, irrespective of what has been           */
+/* deposited with the U.S. Copyright Office.                              */
+/*                                                                        */
+/* Origin: 30                                                             */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
+// $Id: mss_unmask_errors.H,v 1.1 2012/09/05 21:04:20 gollub Exp $
+//------------------------------------------------------------------------------
+// Don't forget to create CVS comments when you check in your changes!
+//------------------------------------------------------------------------------
+// CHANGE HISTORY:
+//------------------------------------------------------------------------------
+// Version:|   Date:  | Author: | Comment:
+//---------|----------|---------|-----------------------------------------------
+//   1.1   | 09/05/12 | gollub  | Created
+
+#ifndef _MSS_UNMASK_ERRORS_H
+#define _MSS_UNMASK_ERRORS_H
+
+/** @file  mss_unmask_errors.H
+ *  @brief Utility functions to set action regs and unmask FIR bits 
+ *         at the end of various mss IPL procedures.
+ */
+
+
+//------------------------------------------------------------------------------
+//  Includes
+//------------------------------------------------------------------------------
+
+#include <fapi.H>
+#include <ecmdDataBufferBase.H>
+
+
+
+//------------------------------------------------------------------------------
+// Constants and enums
+//------------------------------------------------------------------------------
+
+
+
+
+
+
+//------------------------------------------------------------------------------
+// mss_unmask_inband_errors
+//------------------------------------------------------------------------------
+
+
+/**
+ * @brief  To be called at the end of proc_cen_set_inband_addr.C
+ *         Sets action regs and mask settings for inband errors to their 
+ *         runtime settings.
+ *
+ * @param  i_target         Centaur target
+ * @param  i_bad_rc         If proc_cen_set_inband_addr.C already has a bad rc
+ *                          before it calls this function, we pass it in as 
+ *                          i_bad_rc. If this function gets it's own bad local 
+ *                          l_rc, i_bad_rc will be commited, and l_rc will be 
+ *                          passed back as return value. Else if no l_rc, 
+ *                          i_bad_rc will be be passed back as return value.
+ * @return Non-SUCCESS if i_bad_rc Non_SUCCESS, or if internal function fails, 
+ *         SUCCESS otherwise.
+ */
+fapi::ReturnCode mss_unmask_inband_errors( const fapi::Target & i_target,
+                                           fapi::ReturnCode i_bad_rc );
+
+
+//------------------------------------------------------------------------------
+// mss_unmask_ddrphy_errors
+//------------------------------------------------------------------------------
+
+
+/**
+ * @brief  To be called at the end of mss_ddr_phy_reset.C.
+ *         Sets action regs and mask settings for ddr phy errors to their 
+ *         runtime settings.
+ *
+ * @param  i_target         MBA target
+ * @param  i_bad_rc         If mss_ddr_phy_reset.C already has a bad rc
+ *                          before it calls this function, we pass it in as 
+ *                          i_bad_rc. If this function gets it's own bad local 
+ *                          l_rc, i_bad_rc will be commited, and l_rc will be 
+ *                          passed back as return value. Else if no l_rc, 
+ *                          i_bad_rc will be be passed back as return value.
+ * @return Non-SUCCESS if i_bad_rc Non_SUCCESS, or if internal function fails, 
+ *         SUCCESS otherwise.
+ */
+fapi::ReturnCode mss_unmask_ddrphy_errors( const fapi::Target & i_target,
+                                           fapi::ReturnCode i_bad_rc );
+
+
+//------------------------------------------------------------------------------
+// mss_unmask_draminit_errors
+//------------------------------------------------------------------------------
+
+
+/**
+ * @brief  To be called at the end of mss_draminit.C.
+ *         Sets MBACALFIR action regs to their runtime settings, and unmasks
+ *         errors that are valid for PRD to handle after mss_draminit procedure.
+ *
+ * @param  i_target         MBA target
+ * @param  i_bad_rc         If mss_draminit.C already has a bad rc
+ *                          before it calls this function, we pass it in as 
+ *                          i_bad_rc. If this function gets it's own bad local 
+ *                          l_rc, i_bad_rc will be commited, and l_rc will be 
+ *                          passed back as return value. Else if no l_rc, 
+ *                          i_bad_rc will be be passed back as return value.
+ * @return Non-SUCCESS if i_bad_rc Non_SUCCESS, or if internal function fails, 
+ *         SUCCESS otherwise.
+ */
+fapi::ReturnCode mss_unmask_draminit_errors( const fapi::Target & i_target,
+                                             fapi::ReturnCode i_bad_rc );
+
+
+//------------------------------------------------------------------------------
+// mss_unmask_draminit_training_errors
+//------------------------------------------------------------------------------
+
+
+/**
+ * @brief  To be called at the end of mss_draminit_training.C.
+ *         Unmasks MBACALFIR errors that are valid for PRD to handle after
+ *         mss_draminit_training procedure.
+ *
+ * @param  i_target         MBA target
+ * @param  i_bad_rc         If mss_draminit_training.C already has a bad rc
+ *                          before it calls this function, we pass it in as 
+ *                          i_bad_rc. If this function gets it's own bad local 
+ *                          l_rc, i_bad_rc will be commited, and l_rc will be 
+ *                          passed back as return value. Else if no l_rc, 
+ *                          i_bad_rc will be be passed back as return value.
+ * @return Non-SUCCESS if i_bad_rc Non_SUCCESS, or if internal function fails, 
+ *         SUCCESS otherwise.
+ */
+fapi::ReturnCode mss_unmask_draminit_training_errors( 
+                                            const fapi::Target & i_target,
+                                            fapi::ReturnCode i_bad_rc );
+
+
+//------------------------------------------------------------------------------
+// mss_unmask_draminit_training_advanced_errors
+//------------------------------------------------------------------------------
+
+
+/**
+ * @brief  To be called at the end of mss_draminit_training_advanced.C.
+ *         Unmasks MBACALFIR errors that are valid for PRD to handle after
+ *         mss_draminit_training_advanced procedure.
+ *
+ * @param  i_target         MBA target
+ * @param  i_bad_rc         If mss_draminit_training_advanced.C already has a 
+ *                          bad rc before it calls this function, we pass it in 
+ *                          as i_bad_rc. If this function gets it's own bad  
+ *                          local l_rc, i_bad_rc will be commited, and l_rc will 
+ *                          be passed back as return value. Else if no l_rc, 
+ *                          i_bad_rc will be be passed back as return value.
+ * @return Non-SUCCESS if i_bad_rc Non_SUCCESS, or if internal function fails, 
+ *         SUCCESS otherwise.
+ */
+fapi::ReturnCode mss_unmask_draminit_training_advanced_errors( 
+                                            const fapi::Target & i_target,
+                                            fapi::ReturnCode i_bad_rc );
+
+
+//------------------------------------------------------------------------------
+// mss_unmask_maint_errors
+//------------------------------------------------------------------------------
+
+
+/**
+ * @brief  To be called at the end of mss_draminit_mc.C.
+ *         Sets action regs and unmasks maint errors prior to the maint logic
+ *         being used in memdiags so that PRD will be able to handle them 
+ *         if they happen during memdiags.
+ *
+ * @param  i_target         MBA target
+ * @param  i_bad_rc         If mss_draminit_mc already has a 
+ *                          bad rc before it calls this function, we pass it in 
+ *                          as i_bad_rc. If this function gets it's own bad  
+ *                          local l_rc, i_bad_rc will be commited, and l_rc will 
+ *                          be passed back as return value. Else if no l_rc, 
+ *                          i_bad_rc will be be passed back as return value.
+ * @return Non-SUCCESS if i_bad_rc Non_SUCCESS, or if internal function fails, 
+ *         SUCCESS otherwise.
+ */
+fapi::ReturnCode mss_unmask_maint_errors(const fapi::Target & i_target,
+                                         fapi::ReturnCode i_bad_rc );
+
+
+//------------------------------------------------------------------------------
+// mss_unmask_fetch_errors
+//------------------------------------------------------------------------------
+
+
+/**
+ * @brief  To be called at the end of mss_thermal_init.C.
+ *         Sets action regs and unmasks fetch errors prior to the start of
+ *         mainline traffic.
+ *
+ * @param  i_target         Centaur target
+ * @param  i_bad_rc         If mss_thermal_init already has a 
+ *                          bad rc before it calls this function, we pass it in 
+ *                          as i_bad_rc. If this function gets it's own bad  
+ *                          local l_rc, i_bad_rc will be commited, and l_rc will 
+ *                          be passed back as return value. Else if no l_rc, 
+ *                          i_bad_rc will be be passed back as return value.
+ * @return Non-SUCCESS if i_bad_rc Non_SUCCESS, or if internal function fails, 
+ *         SUCCESS otherwise.
+ */
+fapi::ReturnCode mss_unmask_fetch_errors(const fapi::Target & i_target,
+                                         fapi::ReturnCode i_bad_rc );
+
+
+
+//------------------------------------------------------------------------------
+// fapiGetScom_w_retry
+//------------------------------------------------------------------------------
+
+/**
+ * @brief     Reads a SCOM register from a Chip and retries once if SCOM fails.
+ *            Retry is done with assumption that hostboot will switch from
+ *            inband SCOM to FSI, so if inband failed due to channel fail,
+ *            FSI may still work.
+ * @param[in] i_target      Target to operate on
+ * @param[in] i_address     Scom address to read from
+ * @param[out] o_data       ecmdDataBufferBase object that holds data read from
+ *                             address
+ * @return ReturnCode. Zero on success, else platform specified error
+ */
+fapi::ReturnCode fapiGetScom_w_retry(const fapi::Target& i_target,
+                                     const uint64_t i_address,
+                                     ecmdDataBufferBase & o_data);
+
+//------------------------------------------------------------------------------
+// fapiPutScom_w_retry
+//------------------------------------------------------------------------------
+
+/**
+ * @brief     Writes a SCOM register on a Chip and retries once if SCOM fails.
+ *            Retry is done with assumption that hostboot will switch from
+ *            inband SCOM to FSI, so if inband failed due to channel fail,
+ *            FSI may still work.
+ * @param[in] i_target Target to operate on
+ * @param[in] i_address Scom address to write to
+ * @param[in] i_data ecmdDataBufferBase object that holds data to write into
+ *                   address
+ * @return ReturnCode. Zero on success, else platform specified error
+ */
+fapi::ReturnCode fapiPutScom_w_retry(const fapi::Target& i_target,
+                                     const uint64_t i_address,
+                                     ecmdDataBufferBase & i_data);
+
+
+
+
+
+
+#endif /* _MSS_UNMASK_ERRORS_H */
diff --git a/src/usr/hwpf/hwp/makefile b/src/usr/hwpf/hwp/makefile
index 564433632..487414b81 100644
--- a/src/usr/hwpf/hwp/makefile
+++ b/src/usr/hwpf/hwp/makefile
@@ -45,12 +45,13 @@ OBJS = fapiTestHwp.o \
        hwpisteperror.o  \
        hwpistepud.o
 
-SUBDIRS	=	dmi_training.d  sbe_centaur_init.d mc_config.d \
+SUBDIRS	=   dmi_training.d  sbe_centaur_init.d mc_config.d \
             dram_training.d activate_powerbus.d build_winkle_images.d \
             core_activate.d dram_initialization.d edi_ei_initialization.d \
             establish_system_smp.d bus_training.d \
             nest_chiplets.d start_payload.d thread_activate.d slave_sbe.d
 
 include mvpd_accessors/mvpd.mk
+include utility_procedures/utils.mk
 
 include ${ROOTPATH}/config.mk
diff --git a/src/usr/hwpf/hwp/utility_procedures/mss_unmask_errors.C b/src/usr/hwpf/hwp/utility_procedures/mss_unmask_errors.C
new file mode 100644
index 000000000..f91e37c77
--- /dev/null
+++ b/src/usr/hwpf/hwp/utility_procedures/mss_unmask_errors.C
@@ -0,0 +1,2743 @@
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: src/usr/hwpf/hwp/dram_initialization/mss_thermal_init/mss_unmask_errors.C $ */
+/*                                                                        */
+/* IBM CONFIDENTIAL                                                       */
+/*                                                                        */
+/* COPYRIGHT International Business Machines Corp. 2012                   */
+/*                                                                        */
+/* p1                                                                     */
+/*                                                                        */
+/* Object Code Only (OCO) source materials                                */
+/* Licensed Internal Code Source Materials                                */
+/* IBM HostBoot Licensed Internal Code                                    */
+/*                                                                        */
+/* The source code for this program is not published or otherwise         */
+/* divested of its trade secrets, irrespective of what has been           */
+/* deposited with the U.S. Copyright Office.                              */
+/*                                                                        */
+/* Origin: 30                                                             */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
+// $Id: mss_unmask_errors.C,v 1.1 2012/09/05 21:04:52 gollub Exp $
+//------------------------------------------------------------------------------
+// Don't forget to create CVS comments when you check in your changes!
+//------------------------------------------------------------------------------
+// CHANGE HISTORY:
+//------------------------------------------------------------------------------
+// Version:|   Date:  | Author: | Comment:
+//---------|----------|---------|-----------------------------------------------
+//   1.1   | 09/05/12 | gollub  | Created
+
+
+//------------------------------------------------------------------------------
+//  Includes
+//------------------------------------------------------------------------------
+
+#include <mss_unmask_errors.H>
+#include <cen_scom_addresses.H>
+using namespace fapi;
+
+
+//------------------------------------------------------------------------------
+// Constants and enums
+//------------------------------------------------------------------------------
+        
+
+//------------------------------------------------------------------------------
+// mss_unmask_inband_errors
+//------------------------------------------------------------------------------
+                                           
+fapi::ReturnCode mss_unmask_inband_errors( const fapi::Target & i_target,
+                                           fapi::ReturnCode i_bad_rc )
+                                           
+{
+
+    FAPI_INF("ENTER mss_unmask_inband_errors()"); 
+    
+    fapi::ReturnCode l_rc;
+    uint32_t l_ecmd_rc = 0;            
+
+    //*************************
+    //*************************
+    // MBS_FIR_REG
+    //*************************
+    //*************************
+
+    ecmdDataBufferBase l_mbs_fir_mask(64);
+    ecmdDataBufferBase l_mbs_fir_mask_or(64);    
+    ecmdDataBufferBase l_mbs_fir_mask_and(64);
+    ecmdDataBufferBase l_mbs_fir_action0(64);
+    ecmdDataBufferBase l_mbs_fir_action1(64);
+    
+    // Read mask 
+    l_rc = fapiGetScom_w_retry(i_target, MBS_FIR_MASK_REG_0x02011403, l_mbs_fir_mask); 
+    if(l_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+        return l_rc;
+    }    
+    
+    // TODO: Here is where I could clear bits that were bogus, before I unmask 
+    //       them. But typically we are expecting the bit set at this point
+    //       to be valid errors for PRD to log.
+
+
+    //(Action0, Action1, Mask)
+    //
+    // (0,0,0) = checkstop
+    // (0,1,0) = recoverable error
+    // (1,0,0) = report unused
+    // (1,1,0) = machine check
+    // (x,x,1) = error is masked
+
+    l_ecmd_rc |= l_mbs_fir_action0.flushTo0();
+    l_ecmd_rc |= l_mbs_fir_action1.flushTo0();
+    l_ecmd_rc |= l_mbs_fir_mask_or.flushTo0();
+    l_ecmd_rc |= l_mbs_fir_mask_and.flushTo1();
+
+    // 0    host_protocol_error     channel checkstop   unmask
+    l_ecmd_rc |= l_mbs_fir_action0.clearBit(0);            
+    l_ecmd_rc |= l_mbs_fir_action1.clearBit(0);
+    l_ecmd_rc |= l_mbs_fir_mask_and.clearBit(0);
+    
+    // 1    int_protocol_error      channel checkstop   unmask
+    l_ecmd_rc |= l_mbs_fir_action0.clearBit(1);            
+    l_ecmd_rc |= l_mbs_fir_action1.clearBit(1);
+    l_ecmd_rc |= l_mbs_fir_mask_and.clearBit(1);
+    
+    // 2    invalid_address_error   channel checkstop   mask (until unmask_fetch_errors)
+    l_ecmd_rc |= l_mbs_fir_action0.clearBit(2);            
+    l_ecmd_rc |= l_mbs_fir_action1.clearBit(2);
+    l_ecmd_rc |= l_mbs_fir_mask_or.setBit(2);
+
+    // 3    external_timeout        channel checkstop   mask (until unmask_fetch_errors)
+    l_ecmd_rc |= l_mbs_fir_action0.clearBit(3);            
+    l_ecmd_rc |= l_mbs_fir_action1.clearBit(3);
+    l_ecmd_rc |= l_mbs_fir_mask_or.setBit(3);
+    
+    // 4    internal_timeout        channel checkstop   mask (until unmask_fetch_errors)
+    l_ecmd_rc |= l_mbs_fir_action0.clearBit(4);            
+    l_ecmd_rc |= l_mbs_fir_action1.clearBit(4);
+    l_ecmd_rc |= l_mbs_fir_mask_or.setBit(4);
+
+    // 5    int_buffer_ce           recoverable         unmask
+    l_ecmd_rc |= l_mbs_fir_action0.clearBit(5);            
+    l_ecmd_rc |= l_mbs_fir_action1.setBit(5);
+    l_ecmd_rc |= l_mbs_fir_mask_and.clearBit(5);
+
+    // 6    int_buffer_ue           recoverable         unmask
+    l_ecmd_rc |= l_mbs_fir_action0.clearBit(6);            
+    l_ecmd_rc |= l_mbs_fir_action1.setBit(6);
+    l_ecmd_rc |= l_mbs_fir_mask_and.clearBit(6);
+
+    // 7    int_buffer_sue          recoverable         mask (forever)
+    l_ecmd_rc |= l_mbs_fir_action0.clearBit(7);            
+    l_ecmd_rc |= l_mbs_fir_action1.setBit(7);
+    l_ecmd_rc |= l_mbs_fir_mask_or.setBit(7);
+
+    // 8    int_parity_error        channel checkstop   unmask
+    l_ecmd_rc |= l_mbs_fir_action0.clearBit(8); 
+    l_ecmd_rc |= l_mbs_fir_action1.clearBit(8); 
+    l_ecmd_rc |= l_mbs_fir_mask_and.clearBit(8);
+
+    // 9    cache_srw_ce            recoverable         mask (until unmask_fetch_errors)
+    l_ecmd_rc |= l_mbs_fir_action0.clearBit(9);            
+    l_ecmd_rc |= l_mbs_fir_action1.setBit(9);
+    l_ecmd_rc |= l_mbs_fir_mask_or.setBit(9);
+
+    // 10    cache_srw_ue           recoverable         mask (until unmask_fetch_errors)
+    l_ecmd_rc |= l_mbs_fir_action0.clearBit(10);            
+    l_ecmd_rc |= l_mbs_fir_action1.setBit(10);
+    l_ecmd_rc |= l_mbs_fir_mask_or.setBit(10);
+
+    // 11    cache_srw_sue          recoverable         mask (forever)
+    l_ecmd_rc |= l_mbs_fir_action0.clearBit(11);            
+    l_ecmd_rc |= l_mbs_fir_action1.setBit(11);
+    l_ecmd_rc |= l_mbs_fir_mask_or.setBit(11);
+
+    // 12    cache_co_ce            recoverable         mask (until unmask_fetch_errors)
+    l_ecmd_rc |= l_mbs_fir_action0.clearBit(12);            
+    l_ecmd_rc |= l_mbs_fir_action1.setBit(12);
+    l_ecmd_rc |= l_mbs_fir_mask_or.setBit(12);
+
+    // 13    cache_co_ue            recoverable         mask (until unmask_fetch_errors)
+    l_ecmd_rc |= l_mbs_fir_action0.clearBit(13);            
+    l_ecmd_rc |= l_mbs_fir_action1.setBit(13);
+    l_ecmd_rc |= l_mbs_fir_mask_or.setBit(13);
+
+    // 14    cache_co_sue           recoverable         mask (forever)
+    l_ecmd_rc |= l_mbs_fir_action0.clearBit(14);            
+    l_ecmd_rc |= l_mbs_fir_action1.setBit(14);
+    l_ecmd_rc |= l_mbs_fir_mask_or.setBit(14);
+
+    // 15    dir_ce                 recoverable         mask (until unmask_fetch_errors)
+    l_ecmd_rc |= l_mbs_fir_action0.clearBit(15);            
+    l_ecmd_rc |= l_mbs_fir_action1.setBit(15);
+    l_ecmd_rc |= l_mbs_fir_mask_or.setBit(15);
+
+    // 16    dir_ue                 channel checkstop   mask (until unmask_fetch_errors)
+    l_ecmd_rc |= l_mbs_fir_action0.clearBit(16);            
+    l_ecmd_rc |= l_mbs_fir_action1.clearBit(16);
+    l_ecmd_rc |= l_mbs_fir_mask_or.setBit(16);
+
+    // 17    dir_member_deleted     recoverable         mask (forever)
+    l_ecmd_rc |= l_mbs_fir_action0.clearBit(17);            
+    l_ecmd_rc |= l_mbs_fir_action1.setBit(17);
+    l_ecmd_rc |= l_mbs_fir_mask_or.setBit(17);
+
+    // 18    dir_all_members_deleted channel checkstop  mask (until unmask_fetch_errors)
+    l_ecmd_rc |= l_mbs_fir_action0.clearBit(18);            
+    l_ecmd_rc |= l_mbs_fir_action1.clearBit(18);
+    l_ecmd_rc |= l_mbs_fir_mask_or.setBit(18);
+
+    // 19    lru_error               recoverable        mask (until unmask_fetch_errors)
+    l_ecmd_rc |= l_mbs_fir_action0.clearBit(19);            
+    l_ecmd_rc |= l_mbs_fir_action1.setBit(19);
+    l_ecmd_rc |= l_mbs_fir_mask_or.setBit(19);
+
+    // 20    eDRAM error             channel checkstop  mask (until unmask_fetch_errors)
+    l_ecmd_rc |= l_mbs_fir_action0.clearBit(20);            
+    l_ecmd_rc |= l_mbs_fir_action1.clearBit(20);
+    l_ecmd_rc |= l_mbs_fir_mask_or.setBit(20);
+
+    // 21    emergency_throttle_set  recoverable        mask (forever)
+    l_ecmd_rc |= l_mbs_fir_action0.clearBit(21);            
+    l_ecmd_rc |= l_mbs_fir_action1.setBit(21);
+    l_ecmd_rc |= l_mbs_fir_mask_or.setBit(21);
+
+    // 22    Host Inband Read Error  recoverable        mask (forever)
+    l_ecmd_rc |= l_mbs_fir_action0.clearBit(22);            
+    l_ecmd_rc |= l_mbs_fir_action1.setBit(22);
+    l_ecmd_rc |= l_mbs_fir_mask_or.setBit(22);
+
+    // 23    Host Inband Write Error recoverable        mask (forever)
+    l_ecmd_rc |= l_mbs_fir_action0.clearBit(23);            
+    l_ecmd_rc |= l_mbs_fir_action1.setBit(23);
+    l_ecmd_rc |= l_mbs_fir_mask_or.setBit(23);
+
+    // 24    OCC Inband Read Error   recoverable        mask (forever)
+    l_ecmd_rc |= l_mbs_fir_action0.clearBit(24);            
+    l_ecmd_rc |= l_mbs_fir_action1.setBit(24);
+    l_ecmd_rc |= l_mbs_fir_mask_or.setBit(24);
+
+    // 25    OCC Inband Write Error  recoverable        mask (forever)
+    l_ecmd_rc |= l_mbs_fir_action0.clearBit(25);            
+    l_ecmd_rc |= l_mbs_fir_action1.setBit(25);
+    l_ecmd_rc |= l_mbs_fir_mask_or.setBit(25);
+
+    // 26    srb_buffer_ce           recoverable        mask (until unmask_fetch_errors)
+    l_ecmd_rc |= l_mbs_fir_action0.clearBit(26);            
+    l_ecmd_rc |= l_mbs_fir_action1.setBit(26);
+    l_ecmd_rc |= l_mbs_fir_mask_or.setBit(26);
+
+    // 27    srb_buffer_ue           recoverable         mask (until unmask_fetch_errors)
+    l_ecmd_rc |= l_mbs_fir_action0.clearBit(27);            
+    l_ecmd_rc |= l_mbs_fir_action1.setBit(27);
+    l_ecmd_rc |= l_mbs_fir_mask_or.setBit(27);
+
+    // 28    srb_buffer_sue          recoverable         mask (forever)
+    l_ecmd_rc |= l_mbs_fir_action0.clearBit(28);            
+    l_ecmd_rc |= l_mbs_fir_action1.setBit(28);
+    l_ecmd_rc |= l_mbs_fir_mask_or.setBit(28);
+
+    // 29    internal_scom_error     recoverable         mask (tbd)
+    l_ecmd_rc |= l_mbs_fir_action0.clearBit(29);            
+    l_ecmd_rc |= l_mbs_fir_action1.setBit(29);
+    l_ecmd_rc |= l_mbs_fir_mask_or.setBit(29);
+
+    // 30    internal_scom_error_copy recoverable        mask (tbd)
+    l_ecmd_rc |= l_mbs_fir_action0.clearBit(30);            
+    l_ecmd_rc |= l_mbs_fir_action1.setBit(30);
+    l_ecmd_rc |= l_mbs_fir_mask_or.setBit(30);
+
+    // 31:63    Reserved                not implemented, so won't touch these
+    
+    if(l_ecmd_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+
+        l_rc.setEcmdError(l_ecmd_rc);
+        return l_rc;
+    }                                                                              
+
+    // Write action0
+    l_rc = fapiPutScom_w_retry(i_target, MBS_FIR_ACTION0_REG_0x02011406, l_mbs_fir_action0);
+    if(l_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+        return l_rc;
+    }
+
+    // Write action1
+    l_rc = fapiPutScom_w_retry(i_target, MBS_FIR_ACTION1_REG_0x02011407, l_mbs_fir_action1);
+    if(l_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+        return l_rc;
+    }
+
+    
+    // Write mask OR
+    l_rc = fapiPutScom_w_retry(i_target, MBS_FIR_MASK_REG_OR_0x02011405, l_mbs_fir_mask_or); 
+    if(l_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+        return l_rc;
+    }
+
+    // Write mask AND
+    l_rc = fapiPutScom_w_retry(i_target, MBS_FIR_MASK_REG_AND_0x02011404, l_mbs_fir_mask_and); 
+    if(l_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+        return l_rc;
+    }
+
+
+    //************************************************    
+    // DEBUG: read them all back to verify
+    l_rc = fapiGetScom_w_retry(i_target, MBS_FIR_ACTION0_REG_0x02011406, l_mbs_fir_action0); 
+    if(l_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+        return l_rc;
+    }
+    l_rc = fapiGetScom_w_retry(i_target, MBS_FIR_ACTION1_REG_0x02011407, l_mbs_fir_action1); 
+    if(l_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+        return l_rc;
+    }
+    l_rc = fapiGetScom_w_retry(i_target, MBS_FIR_MASK_REG_0x02011403, l_mbs_fir_mask); 
+    if(l_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+        return l_rc;
+    }
+
+    //************************************************    
+    
+    
+    FAPI_INF("EXIT mss_unmask_inband_errors()"); 
+
+    return i_bad_rc;
+}
+
+
+
+//------------------------------------------------------------------------------
+// mss_unmask_ddrphy_errors
+//------------------------------------------------------------------------------
+                                           
+fapi::ReturnCode mss_unmask_ddrphy_errors( const fapi::Target & i_target,
+                                           fapi::ReturnCode i_bad_rc )
+                                           
+{
+
+    FAPI_INF("ENTER mss_unmask ddrphy_errors()"); 
+    
+    fapi::ReturnCode l_rc;
+    uint32_t l_ecmd_rc = 0;            
+
+    //*************************
+    //*************************
+    // DDRPHY_FIR_REG
+    //*************************
+    //*************************
+
+    ecmdDataBufferBase l_ddrphy_fir_mask(64);
+    ecmdDataBufferBase l_ddrphy_fir_mask_or(64);
+    ecmdDataBufferBase l_ddrphy_fir_mask_and(64);        
+    ecmdDataBufferBase l_ddrphy_fir_action0(64);
+    ecmdDataBufferBase l_ddrphy_fir_action1(64);
+
+    
+    // TODO: Here is where I could clear bits that were bogus, before I unmask 
+    //       them. But typically we are expecting the bit set at this point
+    //       to be valid errors for PRD to log.
+
+
+    //(Action0, Action1, Mask)
+    //
+    // (0,0,0) = checkstop
+    // (0,1,0) = recoverable error
+    // (1,0,0) = report unused
+    // (1,1,0) = machine check
+    // (x,x,1) = error is masked
+        
+    l_ecmd_rc |= l_ddrphy_fir_action0.flushTo0();
+    l_ecmd_rc |= l_ddrphy_fir_action1.flushTo0();
+    l_ecmd_rc |= l_ddrphy_fir_mask_or.flushTo0();
+    l_ecmd_rc |= l_ddrphy_fir_mask_and.flushTo0();
+    l_ecmd_rc |= l_ddrphy_fir_mask_and.setBit(48,16);
+        
+    // 0:47 Reserved                not implemented, so won't touch these
+    
+    // 48   ddr0_fsm_ckstp          channel checkstop   unmask
+    l_ecmd_rc |= l_ddrphy_fir_action0.clearBit(48);            
+    l_ecmd_rc |= l_ddrphy_fir_action1.clearBit(48);
+    l_ecmd_rc |= l_ddrphy_fir_mask_and.clearBit(48);
+    
+    // 49   ddr0_parity_ckstp       channel checkstop   unmask
+    l_ecmd_rc |= l_ddrphy_fir_action0.clearBit(49);            
+    l_ecmd_rc |= l_ddrphy_fir_action1.clearBit(49);
+    l_ecmd_rc |= l_ddrphy_fir_mask_and.clearBit(49);
+
+    // 50   ddr0_calibration_error  recoverable         mask (forever)
+    l_ecmd_rc |= l_ddrphy_fir_action0.clearBit(50);            
+    l_ecmd_rc |= l_ddrphy_fir_action1.setBit(50);
+    l_ecmd_rc |= l_ddrphy_fir_mask_or.setBit(50);
+
+    // 51   ddr0_fsm_err            recoverable         unmask
+    l_ecmd_rc |= l_ddrphy_fir_action0.clearBit(51);            
+    l_ecmd_rc |= l_ddrphy_fir_action1.setBit(51);
+    l_ecmd_rc |= l_ddrphy_fir_mask_and.clearBit(51);
+
+    // 52   ddr0_parity_err         recoverable         unmask
+    l_ecmd_rc |= l_ddrphy_fir_action0.clearBit(52);            
+    l_ecmd_rc |= l_ddrphy_fir_action1.setBit(52);
+    l_ecmd_rc |= l_ddrphy_fir_mask_and.clearBit(52);
+
+    // 53   ddr01_fir_parity_err    recoverable         mask (forever)
+    l_ecmd_rc |= l_ddrphy_fir_action0.clearBit(53);            
+    l_ecmd_rc |= l_ddrphy_fir_action1.setBit(53);
+    l_ecmd_rc |= l_ddrphy_fir_mask_or.setBit(53);
+    
+    // 54   Reserved                recoverable         mask (forever)
+    l_ecmd_rc |= l_ddrphy_fir_action0.clearBit(54);            
+    l_ecmd_rc |= l_ddrphy_fir_action1.setBit(54);
+    l_ecmd_rc |= l_ddrphy_fir_mask_or.setBit(54);
+
+    // 55   Reserved                recoverable         mask (forever)
+    l_ecmd_rc |= l_ddrphy_fir_action0.clearBit(55);            
+    l_ecmd_rc |= l_ddrphy_fir_action1.setBit(55);
+    l_ecmd_rc |= l_ddrphy_fir_mask_or.setBit(55);
+
+    // 56   ddr1_fsm_ckstp          channel checkstop   unmask
+    l_ecmd_rc |= l_ddrphy_fir_action0.clearBit(56);            
+    l_ecmd_rc |= l_ddrphy_fir_action1.clearBit(56);
+    l_ecmd_rc |= l_ddrphy_fir_mask_and.clearBit(56);
+    
+    // 57   ddr1_parity_ckstp       channel checkstop   unmask
+    l_ecmd_rc |= l_ddrphy_fir_action0.clearBit(57);            
+    l_ecmd_rc |= l_ddrphy_fir_action1.clearBit(57);
+    l_ecmd_rc |= l_ddrphy_fir_mask_and.clearBit(57);
+
+    // 58   ddr1_calibration_error  recoverable         mask (forever)
+    l_ecmd_rc |= l_ddrphy_fir_action0.clearBit(58);            
+    l_ecmd_rc |= l_ddrphy_fir_action1.setBit(58);
+    l_ecmd_rc |= l_ddrphy_fir_mask_or.setBit(58);
+
+    // 59   ddr1_fsm_err            recoverable         unmask
+    l_ecmd_rc |= l_ddrphy_fir_action0.clearBit(59);            
+    l_ecmd_rc |= l_ddrphy_fir_action1.setBit(59);
+    l_ecmd_rc |= l_ddrphy_fir_mask_and.clearBit(59);
+
+    // 60   ddr1_parity_err         recoverable         unmask
+    l_ecmd_rc |= l_ddrphy_fir_action0.clearBit(60);            
+    l_ecmd_rc |= l_ddrphy_fir_action1.setBit(60);
+    l_ecmd_rc |= l_ddrphy_fir_mask_and.clearBit(60);
+
+    // 61   Reserved                recoverable         mask (forever)
+    l_ecmd_rc |= l_ddrphy_fir_action0.clearBit(61);            
+    l_ecmd_rc |= l_ddrphy_fir_action1.setBit(61);
+    l_ecmd_rc |= l_ddrphy_fir_mask_or.setBit(61);
+
+    // 62   Reserved                recoverable         mask (forever)
+    l_ecmd_rc |= l_ddrphy_fir_action0.clearBit(62);            
+    l_ecmd_rc |= l_ddrphy_fir_action1.setBit(62);
+    l_ecmd_rc |= l_ddrphy_fir_mask_or.setBit(62);
+
+    // 63   Reserved                recoverable         mask (forever)
+    l_ecmd_rc |= l_ddrphy_fir_action0.clearBit(63);            
+    l_ecmd_rc |= l_ddrphy_fir_action1.setBit(63);
+    l_ecmd_rc |= l_ddrphy_fir_mask_or.setBit(63);
+
+
+
+    if(l_ecmd_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+
+        l_rc.setEcmdError(l_ecmd_rc);
+        return l_rc;
+    }                                                                              
+
+    // Write action0
+    l_rc = fapiPutScom_w_retry(i_target, PHY01_DDRPHY_FIR_ACTION0_REG_0x800200960301143f, l_ddrphy_fir_action0);
+    if(l_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+        return l_rc;
+    }
+
+    // Write action1
+    l_rc = fapiPutScom_w_retry(i_target, PHY01_DDRPHY_FIR_ACTION1_REG_0x800200970301143f, l_ddrphy_fir_action1);
+    if(l_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+        return l_rc;
+    }
+
+    
+    // Write mask OR
+    l_rc = fapiPutScom_w_retry(i_target, PHY01_DDRPHY_FIR_MASK_REG_OR_0x800200950301143f, l_ddrphy_fir_mask_or); 
+    if(l_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+        return l_rc;
+    }
+
+    // Write mask AND
+    l_rc = fapiPutScom_w_retry(i_target, PHY01_DDRPHY_FIR_MASK_REG_AND_0x800200940301143f, l_ddrphy_fir_mask_and); 
+    if(l_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+        return l_rc;
+    }
+
+
+    //************************************************    
+    // DEBUG: read them all back to verify
+    l_rc = fapiGetScom_w_retry(i_target, PHY01_DDRPHY_FIR_ACTION0_REG_0x800200960301143f, l_ddrphy_fir_action0); 
+    if(l_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+        return l_rc;
+    }
+    l_rc = fapiGetScom_w_retry(i_target, PHY01_DDRPHY_FIR_ACTION1_REG_0x800200970301143f, l_ddrphy_fir_action1); 
+    if(l_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+        return l_rc;
+    }
+    l_rc = fapiGetScom_w_retry(i_target, PHY01_DDRPHY_FIR_MASK_REG_0x800200930301143f, l_ddrphy_fir_mask); 
+    if(l_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+        return l_rc;
+    }
+
+    //************************************************    
+    
+    
+    //*************************
+    //*************************
+    // MBAFIR
+    //*************************
+    //*************************
+    
+    ecmdDataBufferBase l_mbafir_mask(64);
+    ecmdDataBufferBase l_mbafir_mask_or(64);
+    ecmdDataBufferBase l_mbafir_mask_and(64);
+    ecmdDataBufferBase l_mbafir_action0(64);
+    ecmdDataBufferBase l_mbafir_action1(64);
+            
+    
+    // Read mask
+    l_rc = fapiGetScom_w_retry(i_target,
+                               MBA01_MBAFIRMASK_0x03010603,
+                               l_mbafir_mask); 
+    if(l_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+        return l_rc;
+    }
+    
+    // TODO: Here is where I could clear bits that were bogus, before I unmask 
+    //       them. But typically we are expecting the bit set at this point
+    //       to be valid errors for PRD to log.
+
+
+    //(Action0, Action1, Mask)
+    //
+    // (0,0,0) = checkstop
+    // (0,1,0) = recoverable error
+    // (1,0,0) = report unused
+    // (1,1,0) = machine check
+    // (x,x,1) = error is masked
+                
+    l_ecmd_rc |= l_mbafir_action0.flushTo0();
+    l_ecmd_rc |= l_mbafir_action1.flushTo0();
+    l_ecmd_rc |= l_mbafir_mask_or.flushTo0();
+    l_ecmd_rc |= l_mbafir_mask_and.flushTo1();
+
+
+    // 0	Invalid_Maint_Cmd           recoverable         masked (forever)
+    l_ecmd_rc |= l_mbafir_action0.clearBit(0);            
+    l_ecmd_rc |= l_mbafir_action1.setBit(0);
+    l_ecmd_rc |= l_mbafir_mask_or.setBit(0);
+    
+    // 1	Invalid_Maint_Address       recoverable         masked (forever)
+    l_ecmd_rc |= l_mbafir_action0.clearBit(1);            
+    l_ecmd_rc |= l_mbafir_action1.setBit(1);
+    l_ecmd_rc |= l_mbafir_mask_or.setBit(1);
+
+    // 2	Multi_address_Maint_timeout recoverable         masked (until mss_unmask_maint_errors)
+    l_ecmd_rc |= l_mbafir_action0.clearBit(2);            
+    l_ecmd_rc |= l_mbafir_action1.setBit(2);
+    l_ecmd_rc |= l_mbafir_mask_or.setBit(2);
+
+    // 3	Internal_fsm_error          recoverable         unmask
+    l_ecmd_rc |= l_mbafir_action0.clearBit(3);            
+    l_ecmd_rc |= l_mbafir_action1.setBit(3);
+    l_ecmd_rc |= l_mbafir_mask_and.clearBit(3);
+
+    // 4	MCBIST_Error                recoverable         mask (forever)
+    l_ecmd_rc |= l_mbafir_action0.clearBit(4);            
+    l_ecmd_rc |= l_mbafir_action1.setBit(4);
+    l_ecmd_rc |= l_mbafir_mask_or.setBit(4);
+    
+    // 5	scom_cmd_reg_pe             recoverable         unmask
+    l_ecmd_rc |= l_mbafir_action0.clearBit(5);            
+    l_ecmd_rc |= l_mbafir_action1.setBit(5);
+    l_ecmd_rc |= l_mbafir_mask_and.clearBit(5);
+
+    // 6	channel_chkstp_err          channel checkstop   unmask
+    l_ecmd_rc |= l_mbafir_action0.clearBit(6);            
+    l_ecmd_rc |= l_mbafir_action1.clearBit(6);
+    l_ecmd_rc |= l_mbafir_mask_and.clearBit(6);
+
+    // 7	wrd_caw2_data_ce_ue_err     recoverable         masked (until mss_unmask_maint_errors)
+    l_ecmd_rc |= l_mbafir_action0.clearBit(7);            
+    l_ecmd_rc |= l_mbafir_action1.setBit(7);
+    l_ecmd_rc |= l_mbafir_mask_or.setBit(7);
+
+    // 8:14	RESERVED                    recoverable         mask (forever)
+    l_ecmd_rc |= l_mbafir_action0.clearBit(8,7);            
+    l_ecmd_rc |= l_mbafir_action1.setBit(8,7);
+    l_ecmd_rc |= l_mbafir_mask_or.setBit(8,7);
+
+    // 15	internal scom error         recoverable         mask (tbd)
+    l_ecmd_rc |= l_mbafir_action0.clearBit(15);            
+    l_ecmd_rc |= l_mbafir_action1.setBit(15);
+    l_ecmd_rc |= l_mbafir_mask_or.setBit(15);
+
+    // 16	internal scom error clone   recoverable         mask (tbd)
+    l_ecmd_rc |= l_mbafir_action0.clearBit(16);            
+    l_ecmd_rc |= l_mbafir_action1.setBit(16);
+    l_ecmd_rc |= l_mbafir_mask_or.setBit(16);
+
+
+    // 17:63 RESERVED           not implemented, so won't touch these
+
+    if(l_ecmd_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+
+        l_rc.setEcmdError(l_ecmd_rc);
+        return l_rc;
+    }                                                                              
+
+    // Write action0
+    l_rc = fapiPutScom_w_retry(i_target,
+                               MBA01_MBAFIRACT0_0x03010606,
+                               l_mbafir_action0);
+    if(l_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+        return l_rc;
+    }
+
+    // Write action1
+    l_rc = fapiPutScom_w_retry(i_target,
+                               MBA01_MBAFIRACT1_0x03010607,
+                               l_mbafir_action1);
+    if(l_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+        return l_rc;
+    }
+
+    
+    // Write mask OR
+    l_rc = fapiPutScom_w_retry(i_target,
+                               MBA01_MBAFIRMASK_OR_0x03010605,
+                               l_mbafir_mask_or); 
+    if(l_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+        return l_rc;
+    }
+
+
+    // Write mask AND
+    l_rc = fapiPutScom_w_retry(i_target,
+                               MBA01_MBAFIRMASK_AND_0x03010604,
+                               l_mbafir_mask_and); 
+    if(l_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+        return l_rc;
+    }
+
+
+    //************************************************    
+    // DEBUG: read them all back to verify
+    l_rc = fapiGetScom_w_retry(i_target,
+                               MBA01_MBAFIRACT0_0x03010606,
+                               l_mbafir_action0); 
+    if(l_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+        return l_rc;
+    }
+    l_rc = fapiGetScom_w_retry(i_target,
+                               MBA01_MBAFIRACT1_0x03010607,
+                               l_mbafir_action1); 
+    if(l_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+        return l_rc;
+    }
+    l_rc = fapiGetScom_w_retry(i_target,
+                               MBA01_MBAFIRMASK_0x03010603,
+                               l_mbafir_mask); 
+    if(l_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+        return l_rc;
+    }
+
+    //************************************************    
+    
+    
+    FAPI_INF("EXIT mss_unmask_ddrphy_errors()"); 
+
+    return i_bad_rc;
+}
+
+
+//------------------------------------------------------------------------------
+// mss_unmask_draminit_errors
+//------------------------------------------------------------------------------
+                                           
+fapi::ReturnCode mss_unmask_draminit_errors( const fapi::Target & i_target,
+                                             fapi::ReturnCode i_bad_rc )
+                                           
+{
+
+    FAPI_INF("ENTER mss_unmask_draminit_errors()"); 
+    
+    fapi::ReturnCode l_rc;
+    uint32_t l_ecmd_rc = 0;            
+
+    //*************************
+    //*************************
+    // MBACALFIR
+    //*************************
+    //*************************
+
+    ecmdDataBufferBase l_mbacalfir_mask(64);
+    ecmdDataBufferBase l_mbacalfir_mask_or(64);
+    ecmdDataBufferBase l_mbacalfir_mask_and(64);        
+    ecmdDataBufferBase l_mbacalfir_action0(64);
+    ecmdDataBufferBase l_mbacalfir_action1(64);
+
+
+    // Read mask
+    l_rc = fapiGetScom_w_retry(i_target, MBA01_MBACALFIR_MASK_0x03010403, l_mbacalfir_mask); 
+    if(l_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+        return l_rc;
+    }
+    
+    // TODO: Here is where I could clear bits that were bogus, before I unmask 
+    //       them. But typically we are expecting the bit set at this point
+    //       to be valid errors for PRD to log.
+
+
+    //(Action0, Action1, Mask)
+    //
+    // (0,0,0) = checkstop
+    // (0,1,0) = recoverable error
+    // (1,0,0) = report unused
+    // (1,1,0) = machine check
+    // (x,x,1) = error is masked
+        
+    l_ecmd_rc |= l_mbacalfir_action0.flushTo0();
+    l_ecmd_rc |= l_mbacalfir_action1.flushTo0();
+    l_ecmd_rc |= l_mbacalfir_mask_or.flushTo0();
+    l_ecmd_rc |= l_mbacalfir_mask_and.flushTo1();        
+    
+    // 0	MBA Recoverable Error       recoverable         mask
+    l_ecmd_rc |= l_mbacalfir_action0.clearBit(0);            
+    l_ecmd_rc |= l_mbacalfir_action1.setBit(0);
+    l_ecmd_rc |= l_mbacalfir_mask_or.setBit(0);
+
+    // 1	MBA Nonrecoverable Error    channel checkstop   mask
+    l_ecmd_rc |= l_mbacalfir_action0.clearBit(1);            
+    l_ecmd_rc |= l_mbacalfir_action1.clearBit(1);
+    l_ecmd_rc |= l_mbacalfir_mask_or.setBit(1);
+
+    // 2	Refresh Overrun             recoverable         mask
+    l_ecmd_rc |= l_mbacalfir_action0.clearBit(2);            
+    l_ecmd_rc |= l_mbacalfir_action1.setBit(2);
+    l_ecmd_rc |= l_mbacalfir_mask_or.setBit(2);
+
+    // 3	WAT error                   recoverable         mask (forever)
+    l_ecmd_rc |= l_mbacalfir_action0.clearBit(3);            
+    l_ecmd_rc |= l_mbacalfir_action1.setBit(3);
+    l_ecmd_rc |= l_mbacalfir_mask_or.setBit(3);
+
+    // 4	RCD Parity Error 0          recoverable         unmask (only if set)
+    // TODO: Unmask, only if set, only if ISD DIMM
+    l_ecmd_rc |= l_mbacalfir_action0.clearBit(4);            
+    l_ecmd_rc |= l_mbacalfir_action1.setBit(4);
+    l_ecmd_rc |= l_mbacalfir_mask_or.setBit(4);
+
+    // 5	ddr0_cal_timeout_err        recoverable         mask
+    l_ecmd_rc |= l_mbacalfir_action0.clearBit(5);            
+    l_ecmd_rc |= l_mbacalfir_action1.setBit(5);
+    l_ecmd_rc |= l_mbacalfir_mask_or.setBit(5);
+
+    // 6	ddr1_cal_timeout_err        recoverable         mask
+    l_ecmd_rc |= l_mbacalfir_action0.clearBit(6);            
+    l_ecmd_rc |= l_mbacalfir_action1.setBit(6);
+    l_ecmd_rc |= l_mbacalfir_mask_or.setBit(6);
+
+    // 7	RCD Parity Error 1          recoverable         unmask (only if set)
+    // TODO: Unmask, only if set, only if ISD DIMM
+    l_ecmd_rc |= l_mbacalfir_action0.clearBit(7);            
+    l_ecmd_rc |= l_mbacalfir_action1.setBit(7);
+    l_ecmd_rc |= l_mbacalfir_mask_or.setBit(7);
+
+
+    // 8	mbx to mba par error        channel checkstop   mask
+    l_ecmd_rc |= l_mbacalfir_action0.clearBit(8);            
+    l_ecmd_rc |= l_mbacalfir_action1.clearBit(8);
+    l_ecmd_rc |= l_mbacalfir_mask_or.setBit(8);
+
+    // 9	mba_wrd ue                  recoverable         mask
+    l_ecmd_rc |= l_mbacalfir_action0.clearBit(9);            
+    l_ecmd_rc |= l_mbacalfir_action1.setBit(9);
+    l_ecmd_rc |= l_mbacalfir_mask_or.setBit(9);
+
+    // 10	mba_wrd ce                  recoverable         mask
+    l_ecmd_rc |= l_mbacalfir_action0.clearBit(10);            
+    l_ecmd_rc |= l_mbacalfir_action1.setBit(10);
+    l_ecmd_rc |= l_mbacalfir_mask_or.setBit(10);
+
+    // 11	mba_maint ue                recoverable         mask
+    l_ecmd_rc |= l_mbacalfir_action0.clearBit(11);            
+    l_ecmd_rc |= l_mbacalfir_action1.setBit(11);
+    l_ecmd_rc |= l_mbacalfir_mask_or.setBit(11);
+
+    // 12	mba_maint ce                recoverable         mask
+    l_ecmd_rc |= l_mbacalfir_action0.clearBit(12);            
+    l_ecmd_rc |= l_mbacalfir_action1.setBit(12);
+    l_ecmd_rc |= l_mbacalfir_mask_or.setBit(12);
+
+    // 13	ddr_cal_reset_timeout       channel checkstop   mask
+    // TODO: Leaving masked until I find proper spot to unmask this
+    l_ecmd_rc |= l_mbacalfir_action0.clearBit(13);            
+    l_ecmd_rc |= l_mbacalfir_action1.clearBit(13);
+    l_ecmd_rc |= l_mbacalfir_mask_or.setBit(13);
+
+    // 14	wrq_data_ce                 recoverable         mask
+    l_ecmd_rc |= l_mbacalfir_action0.clearBit(14);            
+    l_ecmd_rc |= l_mbacalfir_action1.setBit(14);
+    l_ecmd_rc |= l_mbacalfir_mask_or.setBit(14);
+
+    // 15	wrq_data_ue                 recoverable         mask
+    l_ecmd_rc |= l_mbacalfir_action0.clearBit(15);            
+    l_ecmd_rc |= l_mbacalfir_action1.setBit(15);
+    l_ecmd_rc |= l_mbacalfir_mask_or.setBit(15);
+
+    // 16	wrq_data_sue                recoverable         mask
+    l_ecmd_rc |= l_mbacalfir_action0.clearBit(16);            
+    l_ecmd_rc |= l_mbacalfir_action1.setBit(16);
+    l_ecmd_rc |= l_mbacalfir_mask_or.setBit(16);
+
+    // 17	wrq_rrq_hang_err            recoverable         mask
+    l_ecmd_rc |= l_mbacalfir_action0.clearBit(17);            
+    l_ecmd_rc |= l_mbacalfir_action1.setBit(17);
+    l_ecmd_rc |= l_mbacalfir_mask_or.setBit(17);
+
+    // 18	sm_1hot_err                 recoverable         unmask
+    l_ecmd_rc |= l_mbacalfir_action0.clearBit(18);            
+    l_ecmd_rc |= l_mbacalfir_action1.setBit(18);
+    l_ecmd_rc |= l_mbacalfir_mask_and.clearBit(18);
+
+    // 19	wrd_scom_error              recoverable         mask (tbd)
+    l_ecmd_rc |= l_mbacalfir_action0.clearBit(19);            
+    l_ecmd_rc |= l_mbacalfir_action1.setBit(19);
+    l_ecmd_rc |= l_mbacalfir_mask_or.setBit(19);
+
+    // 20	internal_scom_error         recoverable         mask (tbd)
+    l_ecmd_rc |= l_mbacalfir_action0.clearBit(20);            
+    l_ecmd_rc |= l_mbacalfir_action1.setBit(20);
+    l_ecmd_rc |= l_mbacalfir_mask_or.setBit(20);
+
+    // 21	internal_scom_error_copy    recoverable         mask (tbd)
+    l_ecmd_rc |= l_mbacalfir_action0.clearBit(21);            
+    l_ecmd_rc |= l_mbacalfir_action1.setBit(21);
+    l_ecmd_rc |= l_mbacalfir_mask_or.setBit(21);
+
+    // 22-63	Reserved            not implemented, so won't touch these          
+
+
+    if(l_ecmd_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+
+        l_rc.setEcmdError(l_ecmd_rc);
+        return l_rc;
+    }                                                                              
+
+    // Write action0
+    l_rc = fapiPutScom_w_retry(i_target, MBA01_MBACALFIR_ACTION0_0x03010406, l_mbacalfir_action0);
+    if(l_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+        return l_rc;
+    }
+
+    // Write action1
+    l_rc = fapiPutScom_w_retry(i_target, MBA01_MBACALFIR_ACTION1_0x03010407, l_mbacalfir_action1);
+    if(l_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+        return l_rc;
+    }
+
+    
+    // Write mask OR
+    l_rc = fapiPutScom_w_retry(i_target, MBA01_MBACALFIR_MASK_OR_0x03010405, l_mbacalfir_mask_or); 
+    if(l_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+        return l_rc;
+    }
+
+    // Write mask AND
+    l_rc = fapiPutScom_w_retry(i_target, MBA01_MBACALFIR_MASK_AND_0x03010404, l_mbacalfir_mask_and); 
+    if(l_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+        return l_rc;
+    }
+
+
+    //************************************************    
+    // DEBUG: read them all back to verify
+    l_rc = fapiGetScom_w_retry(i_target, MBA01_MBACALFIR_ACTION0_0x03010406, l_mbacalfir_action0); 
+    if(l_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+        return l_rc;
+    }
+    l_rc = fapiGetScom_w_retry(i_target, MBA01_MBACALFIR_ACTION1_0x03010407, l_mbacalfir_action1); 
+    if(l_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+        return l_rc;
+    }
+    l_rc = fapiGetScom_w_retry(i_target, MBA01_MBACALFIR_MASK_0x03010403, l_mbacalfir_mask); 
+    if(l_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+        return l_rc;
+    }
+
+    //************************************************    
+    
+    
+    FAPI_INF("EXIT mss_unmask_draminit_errors()"); 
+
+    return i_bad_rc;
+}
+
+
+//------------------------------------------------------------------------------
+// mss_unmask_draminit_training_errors
+//------------------------------------------------------------------------------
+                                           
+fapi::ReturnCode mss_unmask_draminit_training_errors( 
+                                             const fapi::Target & i_target,
+                                             fapi::ReturnCode i_bad_rc )
+                                           
+{
+
+    FAPI_INF("ENTER mss_unmask_draminit_training_errors()"); 
+    
+    fapi::ReturnCode l_rc;
+    uint32_t l_ecmd_rc = 0;            
+
+    //*************************
+    //*************************
+    // MBACALFIR
+    //*************************
+    //*************************
+
+    ecmdDataBufferBase l_mbacalfir_mask(64);
+    ecmdDataBufferBase l_mbacalfir_mask_and(64);
+
+    // NOTE: In the IPL sequence, mss_unmask_draminit_errors has already been
+    // called, which has already set the MBACALFIR action regs to their runtime
+    // values, so no need to touch the action regs here.
+
+    // NOTE: In the IPL sequence, mss_unmask_draminit_errors has already been
+    // called, which has already unmasked the approproiate MBACALFIR errors
+    // following mss_draminit. So all we will do here is unmask a few more
+    // errors that would be considered valid after the mss_draminit_training
+    // procedure. 
+    
+
+    // Read mask
+    l_rc = fapiGetScom_w_retry(i_target, MBA01_MBACALFIR_MASK_0x03010403, l_mbacalfir_mask); 
+    if(l_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+        return l_rc;
+    }
+    
+    // TODO: Here is where I could clear bits that were bogus, before I unmask 
+    //       them. But typically we are expecting the bit set at this point
+    //       to be valid errors for PRD to log.
+
+
+    //(Action0, Action1, Mask)
+    //
+    // (0,0,0) = checkstop
+    // (0,1,0) = recoverable error
+    // (1,0,0) = report unused
+    // (1,1,0) = machine check
+    // (x,x,1) = error is masked
+                
+    l_ecmd_rc |= l_mbacalfir_mask_and.flushTo1();        
+        
+    // 0	MBA Recoverable Error       recoverable         umask
+    l_ecmd_rc |= l_mbacalfir_mask_and.clearBit(0);
+
+    // 4	RCD Parity Error 0          recoverable         unmask (only if set)
+    // TODO: Unmask, only if set, only if ISD DIMM
+
+    // 7	RCD Parity Error 1          recoverable         unmask (only if set)
+    // TODO: Unmask, only if set, only if ISD DIMM
+
+    if(l_ecmd_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+
+        l_rc.setEcmdError(l_ecmd_rc);
+        return l_rc;
+    }                                                                              
+
+    
+    // Write mask AND
+    l_rc = fapiPutScom_w_retry(i_target, MBA01_MBACALFIR_MASK_AND_0x03010404, l_mbacalfir_mask_and); 
+    if(l_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+        return l_rc;
+    }
+
+    //************************************************    
+    // DEBUG: read them all back to verify
+    l_rc = fapiGetScom_w_retry(i_target, MBA01_MBACALFIR_MASK_0x03010403, l_mbacalfir_mask); 
+    if(l_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+        return l_rc;
+    }
+
+    //************************************************    
+    
+    
+    FAPI_INF("EXIT mss_unmask_draminit_training_errors()"); 
+
+    return i_bad_rc;
+}
+
+
+//------------------------------------------------------------------------------
+// mss_unmask_draminit_training_advanced_errors
+//------------------------------------------------------------------------------
+                                           
+fapi::ReturnCode mss_unmask_draminit_training_advanced_errors( 
+                                             const fapi::Target & i_target,
+                                             fapi::ReturnCode i_bad_rc )
+                                           
+{
+
+    FAPI_INF("ENTER mss_unmask_draminit_training_advanced_errors()"); 
+    
+    fapi::ReturnCode l_rc;
+    uint32_t l_ecmd_rc = 0;            
+
+    //*************************
+    //*************************
+    // MBACALFIR
+    //*************************
+    //*************************
+
+    ecmdDataBufferBase l_mbacalfir_mask(64);
+    ecmdDataBufferBase l_mbacalfir_mask_and(64);
+
+    // NOTE: In the IPL sequence, mss_unmask_draminit_errors has already been
+    // called, which has already set the MBACALFIR action regs to their runtime
+    // values, so no need to touch the action regs here.
+
+    // NOTE: In the IPL sequence, mss_unmask_draminit_errors and 
+    // mss_unmask_draminit_training has already been
+    // called, which has already unmasked the approproiate MBACALFIR errors
+    // following mss_draminit and mss_draminit_training. So all we will do here
+    // is unmask a few more errors that would be considered valid after the
+    // mss_draminit_training_advanced procedure. 
+    
+
+    // Read mask
+    l_rc = fapiGetScom_w_retry(i_target, MBA01_MBACALFIR_MASK_0x03010403, l_mbacalfir_mask); 
+    if(l_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+        return l_rc;
+    }
+    
+    // TODO: Here is where I could clear bits that were bogus, before I unmask 
+    //       them. But typically we are expecting the bit set at this point
+    //       to be valid errors for PRD to log.
+
+
+    //(Action0, Action1, Mask)
+    //
+    // (0,0,0) = checkstop
+    // (0,1,0) = recoverable error
+    // (1,0,0) = report unused
+    // (1,1,0) = machine check
+    // (x,x,1) = error is masked
+                
+    l_ecmd_rc |= l_mbacalfir_mask_and.flushTo1();            
+    
+    // 4	RCD Parity Error 0          recoverable         unmask 
+    // TODO: Unmask, only if ISD DIMM
+
+    // 7	RCD Parity Error 1          recoverable         unmask 
+    // TODO: Unmask, only if ISD DIMM
+
+    // 8	mbx to mba par error        channel checkstop   unmask
+    l_ecmd_rc |= l_mbacalfir_mask_and.clearBit(8);
+
+    // 11	mba_maint ue                recoverable         unmask
+    l_ecmd_rc |= l_mbacalfir_mask_and.clearBit(11);
+
+    // 12	mba_maint ce                recoverable         unmask
+    l_ecmd_rc |= l_mbacalfir_mask_and.clearBit(12);
+
+    // 17	wrq_rrq_hang_err            recoverable         unmask
+    l_ecmd_rc |= l_mbacalfir_mask_and.clearBit(17);
+
+
+    if(l_ecmd_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+
+        l_rc.setEcmdError(l_ecmd_rc);
+        return l_rc;
+    }                                                                              
+
+    
+    // Write mask AND
+    l_rc = fapiPutScom_w_retry(i_target, MBA01_MBACALFIR_MASK_AND_0x03010404, l_mbacalfir_mask_and); 
+    if(l_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+        return l_rc;
+    }
+
+    //************************************************    
+    // DEBUG: read them all back to verify
+    l_rc = fapiGetScom_w_retry(i_target, MBA01_MBACALFIR_MASK_0x03010403, l_mbacalfir_mask); 
+    if(l_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+        return l_rc;
+    }
+
+    //************************************************ 
+    
+
+    //*************************
+    //*************************
+    // MBSFIR
+    //*************************
+    //*************************    
+    
+    fapi::Target l_targetCentaur;
+    uint8_t l_mbaPosition;             // 0 = mba01, 1 = mba23
+
+    uint32_t l_mbsfir_mask_address[2]={
+    // port0/1                       port2/3
+    MBS01_MBSFIRMASK_0x02011603,     MBS23_MBSFIRMASK_0x02011703};
+
+    uint32_t l_mbsfir_mask_or_address[2]={
+    // port0/1                       port2/3
+    MBS01_MBSFIRMASK_OR_0x02011605,  MBS23_MBSFIRMASK_OR_0x02011705};
+
+    uint32_t l_mbsfir_mask_and_address[2]={
+    // port0/1                       port2/3
+    MBS01_MBSFIRMASK_AND_0x02011604, MBS23_MBSFIRMASK_AND_0x02011704};
+
+    uint32_t l_mbsfir_action0_address[2]={
+    // port0/1                       port2/3
+    MBS01_MBSFIRACT0_0x02011606,     MBS23_MBSFIRACT0_0x02011706};
+
+    uint32_t l_mbsfir_action1_address[2]={
+    // port0/1                       port2/3
+    MBS01_MBSFIRACT1_0x02011607,     MBS23_MBSFIRACT1_0x02011707};
+
+    ecmdDataBufferBase l_mbsfir_mask(64);
+    ecmdDataBufferBase l_mbsfir_mask_or(64);
+    ecmdDataBufferBase l_mbsfir_mask_and(64);        
+    ecmdDataBufferBase l_mbsfir_action0(64);
+    ecmdDataBufferBase l_mbsfir_action1(64);
+
+    // Get Centaur target for the given MBA
+    l_rc = fapiGetParentChip(i_target, l_targetCentaur);
+    if(l_rc)
+    {
+        FAPI_ERR("Error getting Centaur parent target for the given MBA");
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+        return l_rc;
+    }
+    
+    // Get MBA position: 0 = mba01, 1 = mba23
+    l_rc = FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS, &i_target, l_mbaPosition);
+    if(l_rc)
+    {
+        FAPI_ERR("Error getting MBA position");
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);                
+        return l_rc;
+    }    
+    
+    // Read mask
+    l_rc = fapiGetScom_w_retry(l_targetCentaur, 
+                               l_mbsfir_mask_address[l_mbaPosition], 
+                               l_mbsfir_mask); 
+    if(l_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+        return l_rc;
+    }
+    
+    // TODO: Here is where I could clear bits that were bogus, before I unmask 
+    //       them. But typically we are expecting the bit set at this point
+    //       to be valid errors for PRD to log.
+
+
+    //(Action0, Action1, Mask)
+    //
+    // (0,0,0) = checkstop
+    // (0,1,0) = recoverable error
+    // (1,0,0) = report unused
+    // (1,1,0) = machine check
+    // (x,x,1) = error is masked
+                
+    l_ecmd_rc |= l_mbsfir_action0.flushTo0();
+    l_ecmd_rc |= l_mbsfir_action1.flushTo0();
+    l_ecmd_rc |= l_mbsfir_mask_or.flushTo0();
+    l_ecmd_rc |= l_mbsfir_mask_and.flushTo1();
+
+    // 0	scom_par_errors             recoverable         unmask
+    l_ecmd_rc |= l_mbsfir_action0.clearBit(0);            
+    l_ecmd_rc |= l_mbsfir_action1.setBit(0);
+    l_ecmd_rc |= l_mbsfir_mask_and.clearBit(0);
+
+    // 1	mbx_par_errors              channel checkstop   unmask
+    l_ecmd_rc |= l_mbsfir_action0.clearBit(1);            
+    l_ecmd_rc |= l_mbsfir_action1.clearBit(1);
+    l_ecmd_rc |= l_mbsfir_mask_and.clearBit(1);
+
+    // 2:14	RESERVED                    recoverable         mask (forever)
+    l_ecmd_rc |= l_mbsfir_action0.clearBit(2,13);            
+    l_ecmd_rc |= l_mbsfir_action1.setBit(2,13);
+    l_ecmd_rc |= l_mbsfir_mask_or.setBit(2,13);
+
+    // 15	internal scom error         recoverable         mask (tbd)
+    l_ecmd_rc |= l_mbsfir_action0.clearBit(15);            
+    l_ecmd_rc |= l_mbsfir_action1.setBit(15);
+    l_ecmd_rc |= l_mbsfir_mask_or.setBit(15);
+
+    // 16	internal scom error clone   recoverable         mask (tbd)
+    l_ecmd_rc |= l_mbsfir_action0.clearBit(16);            
+    l_ecmd_rc |= l_mbsfir_action1.setBit(16);
+    l_ecmd_rc |= l_mbsfir_mask_or.setBit(16);
+
+    // 17:63 RESERVED           not implemented, so won't touch these
+    
+        
+    if(l_ecmd_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+
+        l_rc.setEcmdError(l_ecmd_rc);
+        return l_rc;
+    }                                                                              
+
+    // Write action0
+    l_rc = fapiPutScom_w_retry(l_targetCentaur, 
+                               l_mbsfir_action0_address[l_mbaPosition], 
+                               l_mbsfir_action0); 
+    if(l_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+        return l_rc;
+    }
+
+    // Write action1
+    l_rc = fapiPutScom_w_retry(l_targetCentaur, 
+                               l_mbsfir_action1_address[l_mbaPosition], 
+                               l_mbsfir_action1); 
+    if(l_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+        return l_rc;
+    }
+
+    
+    // Write mask OR
+    l_rc = fapiPutScom_w_retry(l_targetCentaur, 
+                               l_mbsfir_mask_or_address[l_mbaPosition], 
+                               l_mbsfir_mask_or); 
+    if(l_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+        return l_rc;
+    }
+
+
+    // Write mask AND
+    l_rc = fapiPutScom_w_retry(l_targetCentaur, 
+                               l_mbsfir_mask_and_address[l_mbaPosition], 
+                               l_mbsfir_mask_and); 
+    if(l_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+        return l_rc;
+    }
+
+
+    //************************************************    
+    // DEBUG: read them all back to verify
+    l_rc = fapiGetScom_w_retry(l_targetCentaur, 
+                               l_mbsfir_action0_address[l_mbaPosition], 
+                               l_mbsfir_action0); 
+    if(l_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+        return l_rc;
+    }
+
+    l_rc = fapiGetScom_w_retry(l_targetCentaur, 
+                               l_mbsfir_action1_address[l_mbaPosition], 
+                               l_mbsfir_action1); 
+    if(l_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+        return l_rc;
+    }
+
+    l_rc = fapiGetScom_w_retry(l_targetCentaur, 
+                               l_mbsfir_mask_address[l_mbaPosition], 
+                               l_mbsfir_mask); 
+    if(l_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+        return l_rc;
+    }
+
+    //************************************************    
+   
+    
+    FAPI_INF("EXIT mss_unmask_draminit_training_advanced_errors()"); 
+
+    return i_bad_rc;
+}
+
+
+
+//------------------------------------------------------------------------------
+// mss_unmask_maint_errors
+//------------------------------------------------------------------------------
+                                           
+fapi::ReturnCode mss_unmask_maint_errors(const fapi::Target & i_target,
+                                         fapi::ReturnCode i_bad_rc )
+                                           
+{
+
+    // Target: Centaur
+    
+    FAPI_INF("ENTER mss_unmask_maint_errors()"); 
+    
+    fapi::ReturnCode l_rc;
+    uint32_t l_ecmd_rc = 0; 
+    std::vector<fapi::Target> l_mbaChiplets;
+    uint8_t l_mbaPosition;             // 0 = mba01, 1 = mba23
+
+    ecmdDataBufferBase l_mbacalfir_mask(64);
+    ecmdDataBufferBase l_mbacalfir_mask_and(64);    
+
+    ecmdDataBufferBase l_mbafir_mask(64);
+    ecmdDataBufferBase l_mbafir_mask_and(64);
+           
+    ecmdDataBufferBase l_mbaspa_mask(64);
+
+    uint32_t l_mbeccfir_mask_address[2]={
+    // port0/1                            port2/3
+    MBS_ECC0_MBECCFIR_MASK_0x02011443,    MBS_ECC1_MBECCFIR_MASK_0x02011483};
+
+    uint32_t l_mbeccfir_mask_or_address[2]={
+    // port0/1                            port2/3
+    MBS_ECC0_MBECCFIR_MASK_OR_0x02011445, MBS_ECC1_MBECCFIR_MASK_OR_0x02011485};
+
+    uint32_t l_mbeccfir_mask_and_address[2]={
+    // port0/1                            port2/3
+    MBS_ECC0_MBECCFIR_MASK_AND_0x02011444,MBS_ECC1_MBECCFIR_MASK_AND_0x02011484};
+
+    uint32_t l_mbeccfir_action0_address[2]={
+    // port0/1                            port2/3
+    MBS_ECC0_MBECCFIR_ACTION0_0x02011446, MBS_ECC1_MBECCFIR_ACTION0_0x02011486};
+
+    uint32_t l_mbeccfir_action1_address[2]={
+    // port0/1                            port2/3
+    MBS_ECC0_MBECCFIR_ACTION1_0x02011447, MBS_ECC1_MBECCFIR_ACTION1_0x02011487};
+
+    ecmdDataBufferBase l_mbeccfir_mask(64);
+    ecmdDataBufferBase l_mbeccfir_mask_or(64);
+    ecmdDataBufferBase l_mbeccfir_mask_and(64);
+    ecmdDataBufferBase l_mbeccfir_action0(64);
+    ecmdDataBufferBase l_mbeccfir_action1(64);
+
+
+
+    // Get associated functional MBAs on this centaur
+    l_rc = fapiGetChildChiplets(i_target,
+                                fapi::TARGET_TYPE_MBA_CHIPLET,
+                                l_mbaChiplets);
+    if(l_rc)
+    {
+        FAPI_ERR("Error getting functional MBAs on this Centaur");
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);                
+        return l_rc;
+    }    
+
+    // Loop through functional MBAs on this Centaur
+    for (uint32_t i=0; i < l_mbaChiplets.size(); i++)
+    {
+
+        // Get MBA position: 0 = mba01, 1 = mba23
+        l_rc = FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS, &l_mbaChiplets[i], l_mbaPosition);
+        if(l_rc)
+        {
+            FAPI_ERR("Error getting MBA position");
+            // Log passed in error before returning with new error
+            if (i_bad_rc) fapiLogError(i_bad_rc);                
+            return l_rc;
+        }    
+
+
+
+
+        //*************************
+        //*************************
+        // MBACALFIR
+        //*************************
+        //*************************    
+
+
+        // NOTE: In the IPL sequence, mss_unmask_draminit_errors has already been
+        // called, which has already set the MBACALFIR action regs to their runtime
+        // values, so no need to touch the action regs here.
+
+        // NOTE: In the IPL sequence, mss_unmask_draminit_errors,
+        // mss_unmask_draminit_training and mss_unmask_draminit_training_advanced
+        // have already been called, which have already unmasked the approproiate
+        // MBACALFIR errors following mss_draminit, mss_draminit_training, and
+        // mss_unmask_draminit_training_advanced. So all we will do here
+        // is unmask a few more errors that would be considered valid after the
+        // mss_draminit_mc procedure. 
+    
+        // Read mask
+        l_rc = fapiGetScom_w_retry(l_mbaChiplets[i],
+                                   MBA01_MBACALFIR_MASK_0x03010403,
+                                   l_mbacalfir_mask);       
+        if(l_rc)
+        {
+            // Log passed in error before returning with new error
+            if (i_bad_rc) fapiLogError(i_bad_rc);        
+            return l_rc;
+        }
+        
+        // TODO: Here is where I could clear bits that were bogus, before I unmask 
+        //       them. But typically we are expecting the bit set at this point
+        //       to be valid errors for PRD to log.
+
+
+        //(Action0, Action1, Mask)
+        //
+        // (0,0,0) = checkstop
+        // (0,1,0) = recoverable error
+        // (1,0,0) = report unused
+        // (1,1,0) = machine check
+        // (x,x,1) = error is masked
+        
+        l_ecmd_rc |= l_mbacalfir_mask_and.flushTo1();            
+                    
+        // 1	MBA Nonrecoverable Error    channel checkstop   unmask
+        l_ecmd_rc |= l_mbacalfir_mask_and.clearBit(1);
+
+        // 2	Refresh Overrun             recoverable         unmask
+        l_ecmd_rc |= l_mbacalfir_mask_and.clearBit(2);
+        
+        // 5	ddr0_cal_timeout_err        recoverable         unmask
+        l_ecmd_rc |= l_mbacalfir_mask_and.clearBit(5);
+
+        // 6	ddr1_cal_timeout_err        recoverable         unmask
+        l_ecmd_rc |= l_mbacalfir_mask_and.clearBit(6);
+        
+        if(l_ecmd_rc)
+        {
+            // Log passed in error before returning with new error
+            if (i_bad_rc) fapiLogError(i_bad_rc);        
+
+            l_rc.setEcmdError(l_ecmd_rc);
+            return l_rc;
+        }                                                                              
+
+        // Write mask AND
+        l_rc = fapiPutScom_w_retry(l_mbaChiplets[i],
+                                   MBA01_MBACALFIR_MASK_AND_0x03010404,
+                                   l_mbacalfir_mask_and); 
+        if(l_rc)
+        {
+            // Log passed in error before returning with new error
+            if (i_bad_rc) fapiLogError(i_bad_rc);        
+            return l_rc;
+        }
+
+        //************************************************    
+        // DEBUG: read them all back to verify
+        l_rc = fapiGetScom_w_retry(l_mbaChiplets[i],
+                                   MBA01_MBACALFIR_MASK_0x03010403,
+                                   l_mbacalfir_mask);       
+        if(l_rc)
+        {
+            // Log passed in error before returning with new error
+            if (i_bad_rc) fapiLogError(i_bad_rc);        
+            return l_rc;
+        }
+
+        //************************************************ 
+    
+
+        //*************************
+        //*************************
+        // MBAFIR
+        //*************************
+        //*************************    
+        
+        // NOTE: In the IPL sequence, mss_unmask_ddr_phy_errors has already been
+        // called, which has already set the MBAFIR action regs to their runtime
+        // values, so no need to touch the action regs here.
+
+        // NOTE: In the IPL sequence, mss_unmask_ddr_phy_errors,
+        // has already been called, which has already unmasked the approproiate
+        // MBAFIR errors following mss_ddr_phy_reset. So all we will do here
+        // is unmask a few more errors that would be considered valid after the
+        // mss_draminit_mc procedure. 
+        
+        // Read mask
+        l_rc = fapiGetScom_w_retry(l_mbaChiplets[i],
+                                   MBA01_MBAFIRMASK_0x03010603,
+                                   l_mbafir_mask); 
+        if(l_rc)
+        {
+            // Log passed in error before returning with new error
+            if (i_bad_rc) fapiLogError(i_bad_rc);        
+            return l_rc;
+        }
+        
+        // TODO: Here is where I could clear bits that were bogus, before I unmask 
+        //       them. But typically we are expecting the bit set at this point
+        //       to be valid errors for PRD to log.
+
+
+        //(Action0, Action1, Mask)
+        //
+        // (0,0,0) = checkstop
+        // (0,1,0) = recoverable error
+        // (1,0,0) = report unused
+        // (1,1,0) = machine check
+        // (x,x,1) = error is masked
+                    
+        l_ecmd_rc |= l_mbafir_mask_and.flushTo1();
+
+        // 2	Multi_address_Maint_timeout recoverable         unmask
+        l_ecmd_rc |= l_mbafir_mask_and.clearBit(2);
+
+
+        // 7	wrd_caw2_data_ce_ue_err     recoverable         unmask
+        l_ecmd_rc |= l_mbafir_mask_and.clearBit(7);
+
+        if(l_ecmd_rc)
+        {
+            // Log passed in error before returning with new error
+            if (i_bad_rc) fapiLogError(i_bad_rc);        
+
+            l_rc.setEcmdError(l_ecmd_rc);
+            return l_rc;
+        }                                                                              
+
+        // Write mask AND
+        l_rc = fapiPutScom_w_retry(l_mbaChiplets[i],
+                                   MBA01_MBAFIRMASK_AND_0x03010604,
+                                   l_mbafir_mask_and); 
+        if(l_rc)
+        {
+            // Log passed in error before returning with new error
+            if (i_bad_rc) fapiLogError(i_bad_rc);        
+            return l_rc;
+        }
+
+
+        //************************************************    
+        // DEBUG: read them all back to verify
+        l_rc = fapiGetScom_w_retry(l_mbaChiplets[i],
+                                   MBA01_MBAFIRMASK_0x03010603,
+                                   l_mbafir_mask); 
+        if(l_rc)
+        {
+            // Log passed in error before returning with new error
+            if (i_bad_rc) fapiLogError(i_bad_rc);        
+            return l_rc;
+        }
+
+        //************************************************    
+
+
+        //*************************
+        //*************************
+        // MBASPA
+        //*************************
+        //*************************
+        
+                
+        // Read mask
+        l_rc = fapiGetScom_w_retry(l_mbaChiplets[i],
+                                   MBA01_MBSPAMSKQ_0x03010614,
+                                   l_mbaspa_mask); 
+        if(l_rc)
+        {
+            // Log passed in error before returning with new error
+            if (i_bad_rc) fapiLogError(i_bad_rc);        
+            return l_rc;
+        }
+        
+        // TODO: Here is where I could clear bits that were bogus, before I unmask 
+        //       them. But typically we are expecting the bit set at this point
+        //       to be valid errors for PRD to log.
+
+
+        // 0	Command_Complete                             masked (DD1 broken)
+        l_ecmd_rc |= l_mbaspa_mask.setBit(0);            
+
+        // 1	Hard_CE_ETE_Attn                             unmask
+        // NOTE: FW memdiags may want to mask this if they want to wait till
+        // cmd gets to end of rank before getting any attention.
+        // NOTE: Hards counted during super fast read, but can't be called 
+        // true hard CEs since super fast read doesn't write back and read again.
+        l_ecmd_rc |= l_mbaspa_mask.clearBit(1);            
+
+        // 2	Soft_CE_ETE_Attn                             unmask
+        // NOTE: FW memdiags may want to mask this if they want to wait till
+        // cmd gets to end of rank before getting any attention.
+        // NOTE: Softs not counted during super fast read.
+        l_ecmd_rc |= l_mbaspa_mask.clearBit(2);            
+
+        // 3	Intermittent_ETE_Attn                        unmask
+        // NOTE: FW memdiags may want to mask this if they want to wait till
+        // cmd gets to end of rank before getting any attention.
+        // NOTE: Intermittents not counted during super fast read.
+        l_ecmd_rc |= l_mbaspa_mask.clearBit(3);            
+
+        // 4	RCE_ETE_Attn                                 unmask
+        // NOTE: FW memdiags may want to mask this if they want to wait till
+        // cmd gets to end of rank before getting any attention.
+        l_ecmd_rc |= l_mbaspa_mask.clearBit(4);            
+
+        // 5	Emergency_Throttle_Attn                      masked
+        l_ecmd_rc |= l_mbaspa_mask.setBit(5);            
+
+        // 6	Firmware_Attn0                               masked
+        l_ecmd_rc |= l_mbaspa_mask.setBit(6);            
+
+        // 7	Firmware_Attn1                               masked
+        l_ecmd_rc |= l_mbaspa_mask.setBit(7);            
+
+        // 8	wat_debug_attn                               unmask (DD1 workaround)
+        l_ecmd_rc |= l_mbaspa_mask.clearBit(8);            
+
+        // 9	Spare_Attn1                                  masked
+        l_ecmd_rc |= l_mbaspa_mask.setBit(9);            
+
+        // 10	MCBIST_Done                                  masked
+        l_ecmd_rc |= l_mbaspa_mask.setBit(10);            
+
+        // 11:63 RESERVED     not implemented, so won't touch these
+                    
+
+        if(l_ecmd_rc)
+        {
+            // Log passed in error before returning with new error
+            if (i_bad_rc) fapiLogError(i_bad_rc);        
+
+            l_rc.setEcmdError(l_ecmd_rc);
+            return l_rc;
+        }                                                                              
+        
+        // Write mask
+        l_rc = fapiPutScom_w_retry(l_mbaChiplets[i],
+                                   MBA01_MBSPAMSKQ_0x03010614,
+                                   l_mbaspa_mask); 
+        if(l_rc)
+        {
+            // Log passed in error before returning with new error
+            if (i_bad_rc) fapiLogError(i_bad_rc);        
+            return l_rc;
+        }
+
+        //************************************************    
+        // DEBUG: read them all back to verify
+        l_rc = fapiGetScom_w_retry(l_mbaChiplets[i],
+                                   MBA01_MBSPAMSKQ_0x03010614,
+                                   l_mbaspa_mask);
+        if(l_rc)
+        {
+            // Log passed in error before returning with new error
+            if (i_bad_rc) fapiLogError(i_bad_rc);        
+            return l_rc;
+        }
+        //************************************************    
+
+
+
+        //*************************
+        //*************************
+        // MBECCFIR
+        //*************************
+        //*************************    
+        
+        // Get MBA position: 0 = mba01, 1 = mba23
+        l_rc = FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS, &l_mbaChiplets[i], l_mbaPosition);
+        if(l_rc)
+        {
+            FAPI_ERR("Error getting MBA position");
+            // Log passed in error before returning with new error
+            if (i_bad_rc) fapiLogError(i_bad_rc);                
+            return l_rc;
+        }    
+        
+        // Read mask
+        l_rc = fapiGetScom_w_retry(i_target, 
+                                   l_mbeccfir_mask_address[l_mbaPosition], 
+                                   l_mbeccfir_mask); 
+        if(l_rc)
+        {
+            // Log passed in error before returning with new error
+            if (i_bad_rc) fapiLogError(i_bad_rc);        
+            return l_rc;
+        }
+        
+        // TODO: Here is where I could clear bits that were bogus, before I unmask 
+        //       them. But typically we are expecting the bit set at this point
+        //       to be valid errors for PRD to log.
+
+
+        //(Action0, Action1, Mask)
+        //
+        // (0,0,0) = checkstop
+        // (0,1,0) = recoverable error
+        // (1,0,0) = report unused
+        // (1,1,0) = machine check
+        // (x,x,1) = error is masked
+                    
+        l_ecmd_rc |= l_mbeccfir_action0.flushTo0();
+        l_ecmd_rc |= l_mbeccfir_action1.flushTo0();
+        l_ecmd_rc |= l_mbeccfir_mask_or.flushTo0();
+        l_ecmd_rc |= l_mbeccfir_mask_and.flushTo1();
+
+        // 0:7	Memory MPE Rank 0:7         recoverable         mask
+        l_ecmd_rc |= l_mbeccfir_action0.clearBit(0,8);            
+        l_ecmd_rc |= l_mbeccfir_action1.setBit(0,8);
+        l_ecmd_rc |= l_mbeccfir_mask_or.setBit(0,8);
+
+        // 8:15	Reserved                    recoverable         mask (forever)
+        l_ecmd_rc |= l_mbeccfir_action0.clearBit(8,8);            
+        l_ecmd_rc |= l_mbeccfir_action1.setBit(8,8);
+        l_ecmd_rc |= l_mbeccfir_mask_or.setBit(8,8);
+        
+        // 16	Memory NCE                  recoverable         mask
+        l_ecmd_rc |= l_mbeccfir_action0.clearBit(16);            
+        l_ecmd_rc |= l_mbeccfir_action1.setBit(16);
+        l_ecmd_rc |= l_mbeccfir_mask_or.setBit(16);
+
+        // 17	Memory RCE                  recoverable         mask
+        l_ecmd_rc |= l_mbeccfir_action0.clearBit(17);            
+        l_ecmd_rc |= l_mbeccfir_action1.setBit(17);
+        l_ecmd_rc |= l_mbeccfir_mask_or.setBit(17);
+
+        // 18	Memory SUE                  recoverable         mask (forever)
+        l_ecmd_rc |= l_mbeccfir_action0.clearBit(18);            
+        l_ecmd_rc |= l_mbeccfir_action1.setBit(18);
+        l_ecmd_rc |= l_mbeccfir_mask_or.setBit(18);
+
+        // 19	Memory UE                   recoverable         mask
+        l_ecmd_rc |= l_mbeccfir_action0.clearBit(19);            
+        l_ecmd_rc |= l_mbeccfir_action1.setBit(19);
+        l_ecmd_rc |= l_mbeccfir_mask_or.setBit(19);
+
+        // 20:27	Maint MPE Rank 0:7      recoverable         unmask
+        // NOTE: FW memdiags may want to mask this if they want to wait till
+        // cmd gets to end of rank before getting any attention.
+        l_ecmd_rc |= l_mbeccfir_action0.clearBit(20,8);            
+        l_ecmd_rc |= l_mbeccfir_action1.setBit(20,8);
+        l_ecmd_rc |= l_mbeccfir_mask_and.clearBit(20,8);
+
+        // 28:35	Reserved                recoverable         mask (forever)
+        l_ecmd_rc |= l_mbeccfir_action0.clearBit(28,8);            
+        l_ecmd_rc |= l_mbeccfir_action1.setBit(28,8);
+        l_ecmd_rc |= l_mbeccfir_mask_or.setBit(28,8);
+        
+        // 36	Maintenance NCE             recoverable         mask (tbd)
+        l_ecmd_rc |= l_mbeccfir_action0.clearBit(36);            
+        l_ecmd_rc |= l_mbeccfir_action1.setBit(36);
+        l_ecmd_rc |= l_mbeccfir_mask_or.setBit(36);
+
+        // 37	Maintenance SCE             recoverable         mask (tbd)
+        l_ecmd_rc |= l_mbeccfir_action0.clearBit(37);            
+        l_ecmd_rc |= l_mbeccfir_action1.setBit(37);
+        l_ecmd_rc |= l_mbeccfir_mask_or.setBit(37);
+
+        // 38	Maintenance MCE             recoverable         mask (tbd)
+        l_ecmd_rc |= l_mbeccfir_action0.clearBit(38);            
+        l_ecmd_rc |= l_mbeccfir_action1.setBit(38);
+        l_ecmd_rc |= l_mbeccfir_mask_or.setBit(38);
+
+        // 39	Maintenance RCE             recoverable         mask (tbd)
+        l_ecmd_rc |= l_mbeccfir_action0.clearBit(39);            
+        l_ecmd_rc |= l_mbeccfir_action1.setBit(39);
+        l_ecmd_rc |= l_mbeccfir_mask_or.setBit(39);
+
+        // 40	Maintenance SUE             recoverable         mask (forever)
+        l_ecmd_rc |= l_mbeccfir_action0.clearBit(40);            
+        l_ecmd_rc |= l_mbeccfir_action1.setBit(40);
+        l_ecmd_rc |= l_mbeccfir_mask_or.setBit(40);
+
+        // 41	Maintenance UE              recoverable         unmask (tbd)
+        // NOTE: FW memdiags may want to mask this if they want to wait till
+        // cmd gets to end of rank before getting any attention.
+        l_ecmd_rc |= l_mbeccfir_action0.clearBit(41);            
+        l_ecmd_rc |= l_mbeccfir_action1.setBit(41);
+        l_ecmd_rc |= l_mbeccfir_mask_and.clearBit(41);
+
+        // 42	MPE during maintenance mark mode  recoverable   mask (forever)
+        l_ecmd_rc |= l_mbeccfir_action0.clearBit(42);            
+        l_ecmd_rc |= l_mbeccfir_action1.setBit(42);
+        l_ecmd_rc |= l_mbeccfir_mask_or.setBit(42);
+
+        // 43	Prefetch Memory UE          recoverable         mask
+        l_ecmd_rc |= l_mbeccfir_action0.clearBit(43);            
+        l_ecmd_rc |= l_mbeccfir_action1.setBit(43);
+        l_ecmd_rc |= l_mbeccfir_mask_or.setBit(43);
+
+        // 44	Memory RCD parity error     recoverable         mask (forever)
+        l_ecmd_rc |= l_mbeccfir_action0.clearBit(44);            
+        l_ecmd_rc |= l_mbeccfir_action1.setBit(44);
+        l_ecmd_rc |= l_mbeccfir_mask_or.setBit(44);
+
+        // 45	Maint RCD parity error.     recoverable         mask (forever)
+        l_ecmd_rc |= l_mbeccfir_action0.clearBit(45);            
+        l_ecmd_rc |= l_mbeccfir_action1.setBit(45);
+        l_ecmd_rc |= l_mbeccfir_mask_or.setBit(45);
+
+        // 46	Recoverable reg parity      recoverable         unmask
+        l_ecmd_rc |= l_mbeccfir_action0.clearBit(46);            
+        l_ecmd_rc |= l_mbeccfir_action1.setBit(46);
+        l_ecmd_rc |= l_mbeccfir_mask_and.clearBit(46);
+
+
+        // 47	Unrecoverable reg parity    channel checkstop   unmask
+        l_ecmd_rc |= l_mbeccfir_action0.clearBit(47);            
+        l_ecmd_rc |= l_mbeccfir_action1.clearBit(47);
+        l_ecmd_rc |= l_mbeccfir_mask_and.clearBit(47);
+
+        // 48	Maskable reg parity error   recoverable         mask (forever)
+        l_ecmd_rc |= l_mbeccfir_action0.clearBit(48);            
+        l_ecmd_rc |= l_mbeccfir_action1.setBit(48);
+        l_ecmd_rc |= l_mbeccfir_mask_or.setBit(48);
+
+        // 49	ecc datapath parity error   channel checkstop   unmask
+        l_ecmd_rc |= l_mbeccfir_action0.clearBit(49);            
+        l_ecmd_rc |= l_mbeccfir_action1.clearBit(49);
+        l_ecmd_rc |= l_mbeccfir_mask_and.clearBit(49);
+
+        // 50	internal scom error         recovereble         mask (tbd)
+        l_ecmd_rc |= l_mbeccfir_action0.clearBit(50);            
+        l_ecmd_rc |= l_mbeccfir_action1.setBit(50);
+        l_ecmd_rc |= l_mbeccfir_mask_or.setBit(50);
+
+        // 51	internal scom error clone   recovereble         mask (tbd)
+        l_ecmd_rc |= l_mbeccfir_action0.clearBit(51);            
+        l_ecmd_rc |= l_mbeccfir_action1.setBit(51);
+        l_ecmd_rc |= l_mbeccfir_mask_or.setBit(51);
+
+        // 52:63	Reserved    not implemented, so won't touch these
+
+
+        
+            
+        if(l_ecmd_rc)
+        {
+            // Log passed in error before returning with new error
+            if (i_bad_rc) fapiLogError(i_bad_rc);        
+
+            l_rc.setEcmdError(l_ecmd_rc);
+            return l_rc;
+        }                                                                              
+
+        // Write action0
+        l_rc = fapiPutScom_w_retry(i_target, 
+                                   l_mbeccfir_action0_address[l_mbaPosition], 
+                                   l_mbeccfir_action0); 
+        if(l_rc)
+        {
+            // Log passed in error before returning with new error
+            if (i_bad_rc) fapiLogError(i_bad_rc);        
+            return l_rc;
+        }
+
+        // Write action1
+        l_rc = fapiPutScom_w_retry(i_target, 
+                                   l_mbeccfir_action1_address[l_mbaPosition], 
+                                   l_mbeccfir_action1); 
+        if(l_rc)
+        {
+            // Log passed in error before returning with new error
+            if (i_bad_rc) fapiLogError(i_bad_rc);        
+            return l_rc;
+        }
+
+        
+        // Write mask OR
+        l_rc = fapiPutScom_w_retry(i_target, 
+                                   l_mbeccfir_mask_or_address[l_mbaPosition], 
+                                   l_mbeccfir_mask_or); 
+        if(l_rc)
+        {
+            // Log passed in error before returning with new error
+            if (i_bad_rc) fapiLogError(i_bad_rc);        
+            return l_rc;
+        }
+
+        // Write mask AND
+        l_rc = fapiPutScom_w_retry(i_target, 
+                                   l_mbeccfir_mask_and_address[l_mbaPosition], 
+                                   l_mbeccfir_mask_and); 
+        if(l_rc)
+        {
+            // Log passed in error before returning with new error
+            if (i_bad_rc) fapiLogError(i_bad_rc);        
+            return l_rc;
+        }
+
+
+        //************************************************    
+        // DEBUG: read them all back to verify
+        l_rc = fapiGetScom_w_retry(i_target, 
+                                   l_mbeccfir_action0_address[l_mbaPosition], 
+                                   l_mbeccfir_action0); 
+        if(l_rc)
+        {
+            // Log passed in error before returning with new error
+            if (i_bad_rc) fapiLogError(i_bad_rc);        
+            return l_rc;
+        }
+
+        l_rc = fapiGetScom_w_retry(i_target, 
+                                   l_mbeccfir_action1_address[l_mbaPosition], 
+                                   l_mbeccfir_action1); 
+        if(l_rc)
+        {
+            // Log passed in error before returning with new error
+            if (i_bad_rc) fapiLogError(i_bad_rc);        
+            return l_rc;
+        }
+
+        l_rc = fapiGetScom_w_retry(i_target, 
+                                   l_mbeccfir_mask_address[l_mbaPosition], 
+                                   l_mbeccfir_mask); 
+        if(l_rc)
+        {
+            // Log passed in error before returning with new error
+            if (i_bad_rc) fapiLogError(i_bad_rc);        
+            return l_rc;
+        }
+
+        //************************************************    
+
+   } // End for loop through functional MBAs on this Centaur
+    
+    FAPI_INF("EXIT mss_unmask_maint_errors()"); 
+
+    return i_bad_rc;
+}
+
+
+
+
+//------------------------------------------------------------------------------
+// mss_unmask_fetch_errors
+//------------------------------------------------------------------------------
+                                           
+fapi::ReturnCode mss_unmask_fetch_errors(const fapi::Target & i_target,
+                                         fapi::ReturnCode i_bad_rc )
+                                           
+{
+
+    // Target: Centaur
+
+    FAPI_INF("ENTER mss_unmask_fetch_errors()"); 
+    
+    fapi::ReturnCode l_rc;
+    uint32_t l_ecmd_rc = 0;            
+
+
+    //*************************
+    //*************************
+    // SCAC_LFIR
+    //*************************
+    //*************************    
+    
+    ecmdDataBufferBase l_scac_lfir_mask(64);
+    ecmdDataBufferBase l_scac_lfir_mask_or(64);
+    ecmdDataBufferBase l_scac_lfir_mask_and(64);
+    ecmdDataBufferBase l_scac_lfir_action0(64);
+    ecmdDataBufferBase l_scac_lfir_action1(64);
+    
+    // Read mask
+    l_rc = fapiGetScom_w_retry(i_target, SCAC_FIRMASK_0x020115C3, l_scac_lfir_mask); 
+    if(l_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+        return l_rc;
+    }
+    
+    // TODO: Here is where I could clear bits that were bogus, before I unmask 
+    //       them. But typically we are expecting the bit set at this point
+    //       to be valid errors for PRD to log.
+
+
+    //(Action0, Action1, Mask)
+    //
+    // (0,0,0) = checkstop
+    // (0,1,0) = recoverable error
+    // (1,0,0) = report unused
+    // (1,1,0) = machine check
+    // (x,x,1) = error is masked
+
+    l_ecmd_rc |= l_scac_lfir_action0.flushTo0();
+    l_ecmd_rc |= l_scac_lfir_action1.flushTo0();
+    l_ecmd_rc |= l_scac_lfir_mask_or.flushTo0();
+    l_ecmd_rc |= l_scac_lfir_mask_and.flushTo1();
+                
+    // 0	I2CMInvAddr                 recoverable         masked (forever)
+    l_ecmd_rc |= l_scac_lfir_action0.clearBit(0);            
+    l_ecmd_rc |= l_scac_lfir_action1.setBit(0);
+    l_ecmd_rc |= l_scac_lfir_mask_or.setBit(0);
+    
+    // 1	I2CMInvWrite                recoverable         masked (forever)
+    l_ecmd_rc |= l_scac_lfir_action0.clearBit(1);            
+    l_ecmd_rc |= l_scac_lfir_action1.setBit(1);
+    l_ecmd_rc |= l_scac_lfir_mask_or.setBit(1);
+
+    // 2	I2CMInvRead                 recoverable         masked (forever)
+    l_ecmd_rc |= l_scac_lfir_action0.clearBit(2);            
+    l_ecmd_rc |= l_scac_lfir_action1.setBit(2);
+    l_ecmd_rc |= l_scac_lfir_mask_or.setBit(2);
+
+    // 3	I2CMApar                    recoverable         masked (forever)
+    l_ecmd_rc |= l_scac_lfir_action0.clearBit(3);            
+    l_ecmd_rc |= l_scac_lfir_action1.setBit(3);
+    l_ecmd_rc |= l_scac_lfir_mask_or.setBit(3);
+
+    // 4	I2CMPar                     recoverable         masked (forever)
+    l_ecmd_rc |= l_scac_lfir_action0.clearBit(4);            
+    l_ecmd_rc |= l_scac_lfir_action1.setBit(4);
+    l_ecmd_rc |= l_scac_lfir_mask_or.setBit(4);
+
+    // 5	I2CMLBPar                   recoverable         masked (forever)
+    l_ecmd_rc |= l_scac_lfir_action0.clearBit(5);            
+    l_ecmd_rc |= l_scac_lfir_action1.setBit(5);
+    l_ecmd_rc |= l_scac_lfir_mask_or.setBit(5);
+
+    // 6:9	Expansion                   recoverable         masked (forever)
+    l_ecmd_rc |= l_scac_lfir_action0.clearBit(6,4);            
+    l_ecmd_rc |= l_scac_lfir_action1.setBit(6,4);
+    l_ecmd_rc |= l_scac_lfir_mask_or.setBit(6,4);    
+    
+    // 10	I2CMInvCmd                  recoverable         masked (forever)
+    l_ecmd_rc |= l_scac_lfir_action0.clearBit(10);            
+    l_ecmd_rc |= l_scac_lfir_action1.setBit(10);
+    l_ecmd_rc |= l_scac_lfir_mask_or.setBit(10);
+
+    // 11	I2CMPErr                    recoverable         masked (forever)
+    l_ecmd_rc |= l_scac_lfir_action0.clearBit(11);            
+    l_ecmd_rc |= l_scac_lfir_action1.setBit(11);
+    l_ecmd_rc |= l_scac_lfir_mask_or.setBit(11);
+
+    // 12	I2CMOverrun                 recoverable         masked (forever)
+    l_ecmd_rc |= l_scac_lfir_action0.clearBit(12);            
+    l_ecmd_rc |= l_scac_lfir_action1.setBit(12);
+    l_ecmd_rc |= l_scac_lfir_mask_or.setBit(12);
+
+    // 13	I2CMAccess                  recoverable         masked (forever)
+    l_ecmd_rc |= l_scac_lfir_action0.clearBit(13);            
+    l_ecmd_rc |= l_scac_lfir_action1.setBit(13);
+    l_ecmd_rc |= l_scac_lfir_mask_or.setBit(13);
+
+    // 14	I2CMArb                     recoverable         masked (forever)
+    l_ecmd_rc |= l_scac_lfir_action0.clearBit(14);            
+    l_ecmd_rc |= l_scac_lfir_action1.setBit(14);
+    l_ecmd_rc |= l_scac_lfir_mask_or.setBit(14);
+
+    // 15	I2CMNack                    recoverable         masked (forever)
+    l_ecmd_rc |= l_scac_lfir_action0.clearBit(15);            
+    l_ecmd_rc |= l_scac_lfir_action1.setBit(15);
+    l_ecmd_rc |= l_scac_lfir_mask_or.setBit(15);
+
+    // 16	I2CMStop                    recoverable         masked (forever)
+    l_ecmd_rc |= l_scac_lfir_action0.clearBit(16);            
+    l_ecmd_rc |= l_scac_lfir_action1.setBit(16);
+    l_ecmd_rc |= l_scac_lfir_mask_or.setBit(16);
+
+    // 17	LocalPib1                   recoverable         masked (forever)
+    l_ecmd_rc |= l_scac_lfir_action0.clearBit(17);            
+    l_ecmd_rc |= l_scac_lfir_action1.setBit(17);
+    l_ecmd_rc |= l_scac_lfir_mask_or.setBit(17);
+
+    // 18	LocalPib2                   recoverable         masked (forever)
+    l_ecmd_rc |= l_scac_lfir_action0.clearBit(18);            
+    l_ecmd_rc |= l_scac_lfir_action1.setBit(18);
+    l_ecmd_rc |= l_scac_lfir_mask_or.setBit(18);
+
+    // 19	LocalPib3                   recoverable         masked (forever)
+    l_ecmd_rc |= l_scac_lfir_action0.clearBit(19);            
+    l_ecmd_rc |= l_scac_lfir_action1.setBit(19);
+    l_ecmd_rc |= l_scac_lfir_mask_or.setBit(19);
+
+    // 20	LocalPib4                   recoverable         masked (forever)
+    l_ecmd_rc |= l_scac_lfir_action0.clearBit(20);            
+    l_ecmd_rc |= l_scac_lfir_action1.setBit(20);
+    l_ecmd_rc |= l_scac_lfir_mask_or.setBit(20);
+
+    // 21	LocalPib5                   recoverable         masked (forever)
+    l_ecmd_rc |= l_scac_lfir_action0.clearBit(21);            
+    l_ecmd_rc |= l_scac_lfir_action1.setBit(21);
+    l_ecmd_rc |= l_scac_lfir_mask_or.setBit(21);
+
+    // 22	LocalPib6                   recoverable         masked (forever)
+    l_ecmd_rc |= l_scac_lfir_action0.clearBit(22);            
+    l_ecmd_rc |= l_scac_lfir_action1.setBit(22);
+    l_ecmd_rc |= l_scac_lfir_mask_or.setBit(22);
+
+    // 23	LocalPib7                   recoverable         masked (forever)
+    l_ecmd_rc |= l_scac_lfir_action0.clearBit(23);            
+    l_ecmd_rc |= l_scac_lfir_action1.setBit(23);
+    l_ecmd_rc |= l_scac_lfir_mask_or.setBit(23);
+
+    // 24	StallError                  recoverable         masked (forever)
+    l_ecmd_rc |= l_scac_lfir_action0.clearBit(24);            
+    l_ecmd_rc |= l_scac_lfir_action1.setBit(24);
+    l_ecmd_rc |= l_scac_lfir_mask_or.setBit(24);
+
+    // 25	RegParErr                   channel checkstop   unmask
+    l_ecmd_rc |= l_scac_lfir_action0.clearBit(25);            
+    l_ecmd_rc |= l_scac_lfir_action1.clearBit(25);
+    l_ecmd_rc |= l_scac_lfir_mask_and.clearBit(25);
+
+    // 26	RegParErrX                  channel checkstop   unmask
+    l_ecmd_rc |= l_scac_lfir_action0.clearBit(26);            
+    l_ecmd_rc |= l_scac_lfir_action1.clearBit(26);
+    l_ecmd_rc |= l_scac_lfir_mask_and.clearBit(26);
+
+    // 27:31	Reserved                recoverable         masked (forever)
+    l_ecmd_rc |= l_scac_lfir_action0.clearBit(27,5);            
+    l_ecmd_rc |= l_scac_lfir_action1.setBit(27,5);
+    l_ecmd_rc |= l_scac_lfir_mask_or.setBit(27,5);
+    
+    // 32	SMErr                       recoverable         unmask
+    l_ecmd_rc |= l_scac_lfir_action0.clearBit(32);            
+    l_ecmd_rc |= l_scac_lfir_action1.setBit(32);
+    l_ecmd_rc |= l_scac_lfir_mask_and.clearBit(32);
+    
+    // 33	RegAccErr                   recoverable         unmask
+    l_ecmd_rc |= l_scac_lfir_action0.clearBit(33);            
+    l_ecmd_rc |= l_scac_lfir_action1.setBit(33);
+    l_ecmd_rc |= l_scac_lfir_mask_and.clearBit(33);
+
+    // 34	ResetErr                    recoverable         masked (forever)
+    l_ecmd_rc |= l_scac_lfir_action0.clearBit(34);            
+    l_ecmd_rc |= l_scac_lfir_action1.setBit(34);
+    l_ecmd_rc |= l_scac_lfir_mask_or.setBit(34);
+
+    // 35	internal_scom_error         recoverable         masked (tbd)
+    l_ecmd_rc |= l_scac_lfir_action0.clearBit(35);            
+    l_ecmd_rc |= l_scac_lfir_action1.setBit(35);
+    l_ecmd_rc |= l_scac_lfir_mask_or.setBit(35);
+
+    // 36	internal_scom_error_clone   recoverable         masked (tbd)
+    l_ecmd_rc |= l_scac_lfir_action0.clearBit(36);            
+    l_ecmd_rc |= l_scac_lfir_action1.setBit(36);
+    l_ecmd_rc |= l_scac_lfir_mask_or.setBit(36);
+
+    // 37:63	Reserved
+    // Can we write to these bits?
+
+
+    if(l_ecmd_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+
+        l_rc.setEcmdError(l_ecmd_rc);
+        return l_rc;
+    }                                                                              
+
+    // Write action0
+    l_rc = fapiPutScom_w_retry(i_target, SCAC_FIRACTION0_0x020115C6, l_scac_lfir_action0);
+    if(l_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+        return l_rc;
+    }
+
+    // Write action1
+    l_rc = fapiPutScom_w_retry(i_target, SCAC_FIRACTION1_0x020115C7, l_scac_lfir_action1);
+    if(l_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+        return l_rc;
+    }
+
+    
+    // Write mask OR
+    l_rc = fapiPutScom_w_retry(i_target, SCAC_FIRMASK_OR_0x020115C5, l_scac_lfir_mask_or); 
+    if(l_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+        return l_rc;
+    }
+
+    // Write mask AND
+    l_rc = fapiPutScom_w_retry(i_target, SCAC_FIRMASK_AND_0x020115C4, l_scac_lfir_mask_and); 
+    if(l_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+        return l_rc;
+    }
+
+
+
+    //************************************************    
+    // DEBUG: read them all back to verify
+    l_rc = fapiGetScom_w_retry(i_target, SCAC_FIRACTION0_0x020115C6, l_scac_lfir_action0); 
+    if(l_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+        return l_rc;
+    }
+    l_rc = fapiGetScom_w_retry(i_target, SCAC_FIRACTION1_0x020115C7, l_scac_lfir_action1); 
+    if(l_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+        return l_rc;
+    }
+    l_rc = fapiGetScom_w_retry(i_target, SCAC_FIRMASK_0x020115C3, l_scac_lfir_mask); 
+    if(l_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+        return l_rc;
+    }
+
+    //************************************************    
+
+
+    //*************************
+    //*************************
+    // MBS_FIR_REG
+    //*************************
+    //*************************
+    
+    
+    // NOTE: In the IPL sequence, mss_unmask_inband_errors has already been
+    // called, which has already set the MBS_FIR_REG action regs to their 
+    // runtime values, so no need to touch the action regs here.
+
+    // NOTE: In the IPL sequence, mss_unmask_inband_errors,
+    // has already been called, which has already unmasked the approproiate
+    // MBS_FIR_REG errors following mss_unmask_inband_errors. So all we will do 
+    // here is unmask errors requiring mainline traffic which would be 
+    // considered valid after the mss_thermal_init procedure. 
+    
+
+    ecmdDataBufferBase l_mbs_fir_mask(64);
+    ecmdDataBufferBase l_mbs_fir_mask_and(64);
+    
+    // Read mask 
+    l_rc = fapiGetScom_w_retry(i_target, MBS_FIR_MASK_REG_0x02011403, l_mbs_fir_mask); 
+    if(l_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+        return l_rc;
+    }    
+    
+    // TODO: Here is where I could clear bits that were bogus, before I unmask 
+    //       them. But typically we are expecting the bit set at this point
+    //       to be valid errors for PRD to log.
+
+    l_ecmd_rc |= l_mbs_fir_mask_and.flushTo1();
+    
+    // 2    invalid_address_error   channel checkstop   unmask
+    l_ecmd_rc |= l_mbs_fir_mask_and.clearBit(2);
+
+    // 3    external_timeout        channel checkstop   unmask
+    l_ecmd_rc |= l_mbs_fir_mask_and.clearBit(3);
+    
+    // 4    internal_timeout        channel checkstop   unmask
+    l_ecmd_rc |= l_mbs_fir_mask_and.clearBit(4);
+
+    // 9    cache_srw_ce            recoverable         unmask
+    l_ecmd_rc |= l_mbs_fir_mask_and.clearBit(9);
+
+    // 10    cache_srw_ue           recoverable         unmask
+    l_ecmd_rc |= l_mbs_fir_mask_and.clearBit(10);
+
+    // 12    cache_co_ce            recoverable         unmask
+    l_ecmd_rc |= l_mbs_fir_mask_and.clearBit(12);
+
+    // 13    cache_co_ue            recoverable         unmask
+    l_ecmd_rc |= l_mbs_fir_mask_and.clearBit(13);
+
+    // 15    dir_ce                 recoverable         unmask
+    l_ecmd_rc |= l_mbs_fir_mask_and.clearBit(15);
+
+    // 16    dir_ue                 channel checkstop   unmask
+    l_ecmd_rc |= l_mbs_fir_mask_and.clearBit(16);
+
+    // 18    dir_all_members_deleted channel checkstop  unmask
+    l_ecmd_rc |= l_mbs_fir_mask_and.clearBit(18);
+
+    // 19    lru_error               recoverable        unmask
+    l_ecmd_rc |= l_mbs_fir_mask_and.clearBit(19);
+
+    // 20    eDRAM error             channel checkstop  unmask
+    l_ecmd_rc |= l_mbs_fir_mask_and.clearBit(20);
+
+    // 26    srb_buffer_ce           recoverable        unmask
+    l_ecmd_rc |= l_mbs_fir_mask_and.clearBit(26);
+
+    // 27    srb_buffer_ue           recoverable        unmask
+    l_ecmd_rc |= l_mbs_fir_mask_and.clearBit(27);
+    
+    if(l_ecmd_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+
+        l_rc.setEcmdError(l_ecmd_rc);
+        return l_rc;
+    }                                                                              
+
+    // Write mask AND
+    l_rc = fapiPutScom_w_retry(i_target, MBS_FIR_MASK_REG_AND_0x02011404, l_mbs_fir_mask_and); 
+    if(l_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+        return l_rc;
+    }
+
+
+    //************************************************    
+    // DEBUG: read them all back to verify
+    l_rc = fapiGetScom_w_retry(i_target, MBS_FIR_MASK_REG_0x02011403, l_mbs_fir_mask); 
+    if(l_rc)
+    {
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);        
+        return l_rc;
+    }
+
+    //************************************************    
+
+
+    //*************************
+    //*************************
+    // MBECCFIR
+    //*************************
+    //*************************    
+    
+    std::vector<fapi::Target> l_mbaChiplets;
+    uint8_t l_mbaPosition;             // 0 = mba01, 1 = mba23
+
+
+    uint32_t l_mbeccfir_mask_address[2]={
+    // port0/1                            port2/3
+    MBS_ECC0_MBECCFIR_MASK_0x02011443,MBS_ECC1_MBECCFIR_MASK_0x02011483};
+
+    uint32_t l_mbeccfir_mask_and_address[2]={
+    // port0/1                            port2/3
+    MBS_ECC0_MBECCFIR_MASK_AND_0x02011444,MBS_ECC1_MBECCFIR_MASK_AND_0x02011484};
+
+    ecmdDataBufferBase l_mbeccfir_mask(64);
+    ecmdDataBufferBase l_mbeccfir_mask_and(64);
+
+
+    // Get associated functional MBAs on this centaur
+    l_rc = fapiGetChildChiplets(i_target,
+                                fapi::TARGET_TYPE_MBA_CHIPLET,
+                                l_mbaChiplets);
+    if(l_rc)
+    {
+        FAPI_ERR("Error getting functional MBAs on this Centaur");
+        // Log passed in error before returning with new error
+        if (i_bad_rc) fapiLogError(i_bad_rc);                
+        return l_rc;
+    }    
+
+    // Loop through functional MBAs on this Centaur
+    for (uint32_t i=0; i < l_mbaChiplets.size(); i++)
+    {
+
+        // Get MBA position: 0 = mba01, 1 = mba23
+        l_rc = FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS, &l_mbaChiplets[i], l_mbaPosition);
+        if(l_rc)
+        {
+            FAPI_ERR("Error getting MBA position");
+            // Log passed in error before returning with new error
+            if (i_bad_rc) fapiLogError(i_bad_rc);                
+            return l_rc;
+        }    
+    
+        // Read mask
+        l_rc = fapiGetScom_w_retry(i_target, 
+                                   l_mbeccfir_mask_address[l_mbaPosition], 
+                                   l_mbeccfir_mask); 
+        if(l_rc)
+        {
+            // Log passed in error before returning with new error
+            if (i_bad_rc) fapiLogError(i_bad_rc);        
+            return l_rc;
+        }
+    
+        // TODO: Here is where I could clear bits that were bogus, before I unmask 
+        //       them. But typically we are expecting the bit set at this point
+        //       to be valid errors for PRD to log.
+                    
+        // NOTE: In the IPL sequence, mss_unmask_maint_errors has already been
+        // called, which has already set the MBECCFIR action regs to their runtime
+        // values, so no need to touch the action regs here.
+
+        // NOTE: In the IPL sequence, mss_unmask_maint_errors,
+        // has already been called, which has already unmasked the approproiate
+        // MBECCFIR errors following mss_unmask_maint_errors. So all we will do 
+        // here is unmask errors requiring mainline traffic which would be 
+        // considered valid after the mss_thermal_init procedure. 
+
+        l_ecmd_rc |= l_mbeccfir_mask_and.flushTo1();
+
+        // 0:7	Memory MPE Rank 0:7         recoverable         unmask
+        l_ecmd_rc |= l_mbeccfir_mask_and.clearBit(0,8);
+
+        // 16	Memory NCE                  recoverable         unmask
+        l_ecmd_rc |= l_mbeccfir_mask_and.clearBit(16);
+
+        // 17	Memory RCE                  recoverable         unmask
+        l_ecmd_rc |= l_mbeccfir_mask_and.clearBit(17);
+
+        // 19	Memory UE                   recoverable         unmask
+        l_ecmd_rc |= l_mbeccfir_mask_and.clearBit(19);
+        
+        // 43	Prefetch Memory UE          recoverable         unmask
+        l_ecmd_rc |= l_mbeccfir_mask_and.clearBit(43);
+
+            
+        if(l_ecmd_rc)
+        {
+            // Log passed in error before returning with new error
+            if (i_bad_rc) fapiLogError(i_bad_rc);        
+
+            l_rc.setEcmdError(l_ecmd_rc);
+            return l_rc;
+        }                                                                              
+        
+        // Write mask AND
+        l_rc = fapiPutScom_w_retry(i_target,
+                                   l_mbeccfir_mask_and_address[l_mbaPosition], 
+                                   l_mbeccfir_mask_and); 
+        if(l_rc)
+        {
+            // Log passed in error before returning with new error
+            if (i_bad_rc) fapiLogError(i_bad_rc);        
+            return l_rc;
+        }
+
+        //************************************************    
+        // DEBUG: read them all back to verify
+        l_rc = fapiGetScom_w_retry(i_target,
+                                   l_mbeccfir_mask_address[l_mbaPosition], 
+                                   l_mbeccfir_mask); 
+        if(l_rc)
+        {
+            // Log passed in error before returning with new error
+            if (i_bad_rc) fapiLogError(i_bad_rc);        
+            return l_rc;
+        }
+
+        //************************************************    
+    }
+    
+    
+    //*************************
+    //*************************
+    // MBACALFIR
+    //*************************
+    //*************************
+
+    ecmdDataBufferBase l_mbacalfir_mask(64);
+    ecmdDataBufferBase l_mbacalfir_mask_and(64);        
+    
+    // NOTE: In the IPL sequence, mss_unmask_draminit_errors has already been
+    // called, which has already set the MBACALFIR action regs to their runtime
+    // values, so no need to touch the action regs here.
+
+    // NOTE: In the IPL sequence, various bits have already been unmasked
+    // after the approproiate procedures. So all we will do here is unmask
+    // errors requiring mainline traffic which would be considered valid after
+    // the mss_thermal_init procedure. 
+
+    // Loop through functional MBAs on this Centaur
+    for (uint32_t i=0; i < l_mbaChiplets.size(); i++)
+    {
+
+        // Read mask
+        l_rc = fapiGetScom_w_retry(l_mbaChiplets[i],
+                                   MBA01_MBACALFIR_MASK_0x03010403,
+                                   l_mbacalfir_mask); 
+        if(l_rc)
+        {
+            // Log passed in error before returning with new error
+            if (i_bad_rc) fapiLogError(i_bad_rc);        
+            return l_rc;
+        }
+        
+        // TODO: Here is where I could clear bits that were bogus, before I unmask 
+        //       them. But typically we are expecting the bit set at this point
+        //       to be valid errors for PRD to log.
+            
+        l_ecmd_rc |= l_mbacalfir_mask_and.flushTo1();        
+        
+        // 9	mba_wrd ue                  recoverable         unmask
+        l_ecmd_rc |= l_mbacalfir_mask_and.clearBit(9);
+
+        // 10	mba_wrd ce                  recoverable         unmask
+        l_ecmd_rc |= l_mbacalfir_mask_and.clearBit(10);
+
+        // 14	wrq_data_ce                 recoverable         unmask
+        l_ecmd_rc |= l_mbacalfir_mask_and.clearBit(14);
+
+        // 15	wrq_data_ue                 recoverable         unmask
+        l_ecmd_rc |= l_mbacalfir_mask_and.clearBit(15);
+
+        if(l_ecmd_rc)
+        {
+            // Log passed in error before returning with new error
+            if (i_bad_rc) fapiLogError(i_bad_rc);        
+
+            l_rc.setEcmdError(l_ecmd_rc);
+            return l_rc;
+        }                                                                              
+
+        // Write mask AND
+        l_rc = fapiPutScom_w_retry(l_mbaChiplets[i],
+                                   MBA01_MBACALFIR_MASK_AND_0x03010404,
+                                   l_mbacalfir_mask_and); 
+        if(l_rc)
+        {
+            // Log passed in error before returning with new error
+            if (i_bad_rc) fapiLogError(i_bad_rc);        
+            return l_rc;
+        }
+
+
+        //************************************************    
+        // DEBUG: read them all back to verify
+        l_rc = fapiGetScom_w_retry(l_mbaChiplets[i],
+                                   MBA01_MBACALFIR_MASK_0x03010403,
+                                   l_mbacalfir_mask); 
+        if(l_rc)
+        {
+            // Log passed in error before returning with new error
+            if (i_bad_rc) fapiLogError(i_bad_rc);        
+            return l_rc;
+        }
+
+        //************************************************    
+    }
+
+
+   
+    
+    FAPI_INF("EXIT mss_unmask_fetch_errors()"); 
+
+    return i_bad_rc;
+}
+
+//------------------------------------------------------------------------------
+// fapiGetScom_w_retry
+//------------------------------------------------------------------------------
+fapi::ReturnCode fapiGetScom_w_retry(const fapi::Target& i_target,
+                                     const uint64_t i_address,
+                                     ecmdDataBufferBase & o_data)
+{
+    fapi::ReturnCode l_rc;
+    
+    l_rc = fapiGetScom(i_target, i_address, o_data);
+    if(l_rc)
+    {
+        FAPI_ERR("1st Centaur fapiGetScom failed, so attempting retry.");
+
+        // Log centaur scom error
+        fapiLogError(l_rc);        
+
+        // Retry centaur scom with assumption that retry is done via FSI,
+        // which may still work.
+        // NOTE: If scom fail was due to channel fail a retry via FSI may
+        // work. But if scom fail was due to PIB error, retry via FSI may
+        // also fail.
+        l_rc = fapiGetScom(i_target, i_address, o_data); 
+        if(l_rc)
+        {
+            FAPI_ERR("fapiGetScom retry via FSI failed.");       
+            // Retry didn't work either so give up and pass 
+            // back centaur scom error
+        }
+    }    
+    
+    return l_rc;
+}
+
+
+//------------------------------------------------------------------------------
+// fapiPutScom_w_retry
+//------------------------------------------------------------------------------
+fapi::ReturnCode fapiPutScom_w_retry(const fapi::Target& i_target,
+                                     const uint64_t i_address,
+                                     ecmdDataBufferBase & i_data)
+{
+    fapi::ReturnCode l_rc;
+    
+    // NOTE: Inband scom device driver takes care of read to special reg after
+    // an inband scom write in order to detect SUE
+    l_rc = fapiPutScom(i_target, i_address, i_data);
+    if(l_rc)
+    {
+        FAPI_ERR("1st Centaur fapiPutScom failed, so attempting retry.");
+
+        // Log centaur scom error
+        fapiLogError(l_rc);        
+
+        // Retry centaur scom with assumption that retry is done via FSI,
+        // which may still work.
+        // NOTE: If scom fail was due to channel fail a retry via FSI may
+        // work. But if scom fail was due to PIB error, retry via FSI may
+        // also fail.
+        l_rc = fapiPutScom(i_target, i_address, i_data); 
+        if(l_rc)
+        {
+            FAPI_ERR("fapiPutScom retry via FSI failed.");       
+            // Retry didn't work either so give up and pass 
+            // back centaur scom error
+        }
+    }    
+    
+    return l_rc;
+}
diff --git a/src/usr/hwpf/hwp/utility_procedures/utils.mk b/src/usr/hwpf/hwp/utility_procedures/utils.mk
new file mode 100644
index 000000000..9d074d396
--- /dev/null
+++ b/src/usr/hwpf/hwp/utility_procedures/utils.mk
@@ -0,0 +1,28 @@
+# IBM_PROLOG_BEGIN_TAG
+# This is an automatically generated prolog.
+#
+# $Source: src/usr/hwpf/hwp/utility_procedures/utils.mk $
+#
+# IBM CONFIDENTIAL
+#
+# COPYRIGHT International Business Machines Corp. 2012
+#
+# p1
+#
+# Object Code Only (OCO) source materials
+# Licensed Internal Code Source Materials
+# IBM HostBoot Licensed Internal Code
+#
+# The source code for this program is not published or otherwise
+# divested of its trade secrets, irrespective of what has been
+# deposited with the U.S. Copyright Office.
+#
+# Origin: 30
+#
+# IBM_PROLOG_END_TAG
+EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/utility_procedures
+
+VPATH += utility_procedures
+
+OBJS += mss_unmask_errors.o
+