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| author | Prem Shanker Jha <premjha2@in.ibm.com> | 2017-02-14 02:30:05 -0600 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-03-09 09:14:50 -0500 |
| commit | 971fb907978cd63d98fde5e1857271546cf79f17 (patch) | |
| tree | ceaed5a54e1c75b4a775ada490b181361045301d /src | |
| parent | c4599e71cc5de0030fa4e8bedb368bfede132c1f (diff) | |
| download | talos-hostboot-971fb907978cd63d98fde5e1857271546cf79f17.tar.gz talos-hostboot-971fb907978cd63d98fde5e1857271546cf79f17.zip | |
PM: Added SCOM restore region in extracted QPMR binary.
Commit adds to extracted QPMR binary, the SCOM restore region meant
to restore quad SCOMS. Region starts at an offset of 128K
from base of QPMR. It also adds an ability to generate image for
Self Restore, CME and SGPE in DMA form.
Change-Id: I1b420a462eec8997231d5916fd00fe23528f8e87
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36410
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: AMIT KUMAR <akumar3@us.ibm.com>
Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36437
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C b/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C index cdecdd7c9..dd468116e 100644 --- a/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C +++ b/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C @@ -886,6 +886,7 @@ extern "C" pQpmrHdr->magic_number = SWIZZLE_8_BYTE(QPMR_MAGIC_NUMBER); pSgpeHdr->g_sgpe_magic_number = SWIZZLE_8_BYTE(SGPE_MAGIC_NUMBER); + pSgpeHdr->g_sgpe_scom_mem_offset = SWIZZLE_4_BYTE(QPMR_HOMER_OFFSET + QUAD_SCOM_RESTORE_QPMR_OFFSET ); FAPI_INF("==============================QPMR=================================="); char magicWord[16] = {0}; @@ -905,6 +906,8 @@ extern "C" FAPI_DBG(" Cmn Ring Ovrd Length : 0x%08X", SWIZZLE_4_BYTE(pQpmrHdr->quadCommonOvrdLength) ); FAPI_DBG(" Quad Spec Ring Offset : 0x%08X", SWIZZLE_4_BYTE(pQpmrHdr->quadSpecRingOffset) ); FAPI_DBG(" Quad Spec Ring Length : 0x%08X", SWIZZLE_4_BYTE(pQpmrHdr->quadSpecRingLength) ); + FAPI_INF(" Quad SCOM Offset : 0x%08X", SWIZZLE_4_BYTE(pQpmrHdr->quadScomOffset) ); + FAPI_INF(" Quad SCOM Length : 0x%08X", SWIZZLE_4_BYTE(pQpmrHdr->quadScomLength) ); FAPI_DBG("==============================QPMR Ends=============================="); FAPI_DBG("===========================SGPE Image Hdr============================="); @@ -1050,9 +1053,8 @@ extern "C" o_qpmrHdr.bootLoaderLength = SWIZZLE_4_BYTE(o_qpmrHdr.bootLoaderLength); o_qpmrHdr.sgpeImgOffset = SWIZZLE_4_BYTE(o_qpmrHdr.sgpeImgOffset); - - //FIXME Need to confirm it - o_qpmrHdr.quadScomOffset = SWIZZLE_4_BYTE(QUAD_SCOM_RESTORE_QPMR_OFFSET); + o_qpmrHdr.quadScomOffset = SWIZZLE_4_BYTE(QUAD_SCOM_RESTORE_QPMR_OFFSET); + o_qpmrHdr.quadScomLength = SWIZZLE_4_BYTE(QUAD_SCOM_RESTORE_SIZE_TOTAL); sgpeHeader_t* pImgHdr = (sgpeHeader_t*)& i_pChipHomer->qpmrRegion.sgpeRegion.sgpeSramImage[SGPE_INT_VECTOR_SIZE]; pImgHdr->g_sgpe_ivpr_address = OCC_SRAM_SGPE_BASE_ADDR; |
