Add handling for HvEmu exception.

Change-Id: I03a7460b347b47f4653a6f457d1d7711fc0a0512
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/209
Tested-by: Jenkins Server
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
Reviewed-by: MATTHEW S. BARTH <msbarth@us.ibm.com>

3 files changed, 70 insertions, 13 deletions

diff --git a/src/include/arch/ppc.H b/src/include/arch/ppc.H
index 7c19fdf16..5280c82e4 100644
--- a/src/include/arch/ppc.H
+++ b/src/include/arch/ppc.H
@@ -5,15 +5,15 @@
 #include <builtins.h>
 
 ALWAYS_INLINE
-inline uint64_t getSRR0() 
+inline uint64_t getSRR0()
 {
     register uint64_t srr0 = 0;
     asm volatile("mfsrr0 %0" : "=r" (srr0));
     return srr0;
-} 
+}
 
 ALWAYS_INLINE
-inline uint64_t getSRR1() 
+inline uint64_t getSRR1()
 {
     register uint64_t srr1 = 0;
     asm volatile("mfsrr1 %0" : "=r" (srr1));
@@ -21,21 +21,52 @@ inline uint64_t getSRR1()
 }
 
 ALWAYS_INLINE
-inline void setSRR0(uint64_t _srr0) 
+inline void setSRR0(uint64_t _srr0)
 {
     register uint64_t srr0 = _srr0;
     asm volatile("mtsrr0 %0" : : "r" (srr0));
-} 
+}
 
 ALWAYS_INLINE
-inline void setSRR1(uint64_t _srr1) 
+inline void setSRR1(uint64_t _srr1)
 {
     register uint64_t srr1 = _srr1;
     asm volatile("mtsrr1 %0" : : "r" (srr1));
-} 
+}
+
+ALWAYS_INLINE
+inline uint64_t getHSRR0()
+{
+    register uint64_t hsrr0 = 0;
+    asm volatile("mfspr %0, 314" : "=r" (hsrr0));
+    return hsrr0;
+}
 
 ALWAYS_INLINE
-inline uint64_t getPVR() 
+inline uint64_t getHSRR1()
+{
+    register uint64_t hsrr1 = 0;
+    asm volatile("mfspr %0, 315" : "=r" (hsrr1));
+    return hsrr1;
+}
+
+ALWAYS_INLINE
+inline void setHSRR0(uint64_t _hsrr0)
+{
+    register uint64_t hsrr0 = _hsrr0;
+    asm volatile("mtspr 314, %0" : : "r" (hsrr0));
+}
+
+ALWAYS_INLINE
+inline void setHSRR1(uint64_t _hsrr1)
+{
+    register uint64_t hsrr1 = _hsrr1;
+    asm volatile("mtspr 315, %0" : : "r" (hsrr1));
+}
+
+
+ALWAYS_INLINE
+inline uint64_t getPVR()
 {
     register uint64_t pvr = 0;
     asm volatile("mfspr %0, 287" : "=r" (pvr));
@@ -43,7 +74,7 @@ inline uint64_t getPVR()
 }
 
 ALWAYS_INLINE
-inline uint64_t getPIR() 
+inline uint64_t getPIR()
 {
     register uint64_t pir = 0;
     asm volatile("mfspr %0, 1023" : "=r" (pir));
@@ -137,7 +168,7 @@ inline void eieio()
 }
 
 ALWAYS_INLINE
-inline uint64_t getHMER() 
+inline uint64_t getHMER()
 {
     register uint64_t hmer = 0;
     asm volatile("mfspr %0, 336" : "=r" (hmer));
@@ -153,8 +184,16 @@ inline void setHMER(uint64_t _hmer)
 }
 
 ALWAYS_INLINE
+inline uint64_t getHEIR()
+{
+    register uint64_t heir = 0;
+    asm volatile("mfspr %0, 339" : "=r" (heir));
+    return heir;
+}
+
+ALWAYS_INLINE
 inline void setThreadPriorityLow()
-{	
+{
     asm volatile("or 1,1,1");
 }
 
diff --git a/src/kernel/exception.C b/src/kernel/exception.C
index b12914fe8..65c1697f9 100644
--- a/src/kernel/exception.C
+++ b/src/kernel/exception.C
@@ -106,6 +106,15 @@ void kernel_execute_alignment()
     Systemcalls::TaskEnd(t);
 }
 
+extern "C"
+void kernel_execute_hype_emu_assist()
+{
+    task_t* t = TaskManager::getCurrentTask();
+    printk("HypeEmu: Illegal instruction in task %d\n"
+           "\tHSSR0 = %lx, HEIR = %lx\n", t->tid, getHSRR0(), getHEIR());
+    Systemcalls::TaskEnd(t);
+}
+
 namespace ExceptionHandles
 {
     bool HvEmulation(task_t* t)
diff --git a/src/kernel/start.S b/src/kernel/start.S
index 68af33c04..bdf872d9d 100644
--- a/src/kernel/start.S
+++ b/src/kernel/start.S
@@ -84,7 +84,10 @@ finished_relocate:
 	b intvect_##name
 
 #define STD_INTERRUPT(name, address) \
-    .org _start + address; \
+        .org _start + address; \
+        STD_INTERRUPT_NOADDR(name)
+
+#define STD_INTERRUPT_NOADDR(name) \
     intvect_##name: \
 	or 3,3,3; /* Ensure thread priority is high. */ \
 	mtsprg1 r1; /* Save GPR1 */ \
@@ -147,7 +150,11 @@ STD_INTERRUPT(system_call, 0xC08)
 UNIMPL_INTERRUPT(trace, 0xD00)
 UNIMPL_INTERRUPT(hype_data_storage, 0xE00)
 UNIMPL_INTERRUPT(hype_inst_storage, 0xE20)
-UNIMPL_INTERRUPT(hype_emu_assist, 0xE40)
+
+.org _start + 0xE40
+hype_emu_assist_stub:
+    b intvect_hype_emu_assist
+
 UNIMPL_INTERRUPT(hype_maint, 0xE60)
 UNIMPL_INTERRUPT(perf_monitor, 0xF00)
 UNIMPL_INTERRUPT(vector_unavail, 0xF20)
@@ -395,6 +402,8 @@ userspace_task_entry:
     ld r2, 8(r4)
     bctr
 
+STD_INTERRUPT_NOADDR(hype_emu_assist)
+
 .section .data
     .balign 1024
 kernel_stack: