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| author | crgeddes <crgeddes@us.ibm.com> | 2017-04-10 18:00:02 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-04-11 09:59:05 -0400 |
| commit | 929b008fec52e604b9b4077b8800542b3ff3916a (patch) | |
| tree | 14973133693a76d857a3e4a2f38401b028f9264d /src | |
| parent | 5afa41551b3d8e0a84cf21cebfc89a194d326e76 (diff) | |
| download | talos-hostboot-929b008fec52e604b9b4077b8800542b3ff3916a.tar.gz talos-hostboot-929b008fec52e604b9b4077b8800542b3ff3916a.zip | |
Set WAKEUP_SELECT on ALL slaves, even on master quad
before we were only setting this bit on non-master quads, that was
wrong, should be set on ALL slave core regardless of what quad its on
Change-Id: I197f70beb841cb98332e6ad71e7e011dd1a48b1e
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39073
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Richard J. Knight <rjknight@us.ibm.com>
Reviewed-by: Martin Gloff <mgloff@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/usr/isteps/istep06/host_discover_targets.C | 21 |
1 files changed, 4 insertions, 17 deletions
diff --git a/src/usr/isteps/istep06/host_discover_targets.C b/src/usr/isteps/istep06/host_discover_targets.C index f7b2cdb1f..ee3594af9 100644 --- a/src/usr/isteps/istep06/host_discover_targets.C +++ b/src/usr/isteps/istep06/host_discover_targets.C @@ -312,32 +312,19 @@ errlHndl_t powerDownSlaveQuads() } //TODO 171763 Core state setup for MPIPL should be done in a HWP - //Note this logic assumes FUSED_CORE mode and will need to be changed - // to account for OPAL and other non-fused cases. - //Check if the master quad has all 4 cores - if(l_coreTargetList.size() == 4) + //Set WKUP_SELECT bit on slave cores + for(uint8_t x = 1; x < (l_coreTargetList.size()) ; x++) { //Set WKUP_SELECT bit on non-master cores that are on // the master quad - l_err = deviceWrite(l_coreTargetList[2], + l_err = deviceWrite(l_coreTargetList[x], &SET_WKUP_SELECT_MASK, MASK_SIZE, DEVICE_SCOM_ADDRESS(CPPM_CORE_POWMAN_MODE_REG)); if(l_err) { TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, - "Error setting WKUP_SELECT bit of CPPM_CORE_REG on core %d", l_coreTargetList[2]->getAttr<TARGETING::ATTR_CHIP_UNIT>()); - break; - } - - l_err = deviceWrite(l_coreTargetList[3], - &SET_WKUP_SELECT_MASK, - MASK_SIZE, - DEVICE_SCOM_ADDRESS(CPPM_CORE_POWMAN_MODE_REG)); - if(l_err) - { - TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, - "Error setting WKUP_SELECT bit of CPPM_CORE_REG on core %d", l_coreTargetList[3]->getAttr<TARGETING::ATTR_CHIP_UNIT>()); + "Error setting WKUP_SELECT bit of CPPM_CORE_REG on core %d", l_coreTargetList[x]->getAttr<TARGETING::ATTR_CHIP_UNIT>()); break; } } |
