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authorPatrick Williams <iawillia@us.ibm.com>2013-06-21 11:17:14 -0500
committerA. Patrick Williams III <iawillia@us.ibm.com>2013-06-21 12:28:52 -0500
commit8e8cfddb36f162dcf3e2ed4e25bde12c4fce7601 (patch)
tree841668cc36a9dd34ca3330c90283c6e25b010057 /src
parent19ad4d6c88ec8cd5904349319145e6d40ee00174 (diff)
downloadtalos-hostboot-8e8cfddb36f162dcf3e2ed4e25bde12c4fce7601.tar.gz
talos-hostboot-8e8cfddb36f162dcf3e2ed4e25bde12c4fce7601.zip
HWP: Update HCA BAR procedure
Picked up the following HWPs: * proc_setup_bars.C (v1.15) * p8_scom_addresses.H (v1.157) Change-Id: Ia20d46f30fef9eeafea4c04c6332292be555e66e Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/5126 Reviewed-by: Thi N. Tran <thi@us.ibm.com> Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src')
-rw-r--r--src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_setup_bars.C40
-rwxr-xr-xsrc/usr/hwpf/hwp/include/p8_scom_addresses.H20
2 files changed, 49 insertions, 11 deletions
diff --git a/src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_setup_bars.C b/src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_setup_bars.C
index afe89863a..4acf12bc6 100644
--- a/src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_setup_bars.C
+++ b/src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_setup_bars.C
@@ -20,7 +20,7 @@
/* Origin: 30 */
/* */
/* IBM_PROLOG_END_TAG */
-// $Id: proc_setup_bars.C,v 1.14 2013/06/13 13:21:40 jmcgill Exp $
+// $Id: proc_setup_bars.C,v 1.15 2013/06/21 15:13:44 jmcgill Exp $
// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/proc_setup_bars.C,v $
//------------------------------------------------------------------------------
// *|
@@ -2292,8 +2292,10 @@ fapi::ReturnCode proc_setup_bars_pcie_write_io_bar_regs(
// NX Nodal Mirrored BAR (NX_NODAL_BAR1_0x02013096)
//
// HCA
-// HCA BAR and Range Register (HCA_BAR_0x0201098A)
-// HCA Mirror BAR and Range Register (HCA_MIRROR_BAR_0x02010993)
+// HCA EN BAR and Range Register (HCA_EN_BAR_0x0201094A)
+// HCA EN Mirror BAR and Range Register (HCA_EN_MIRROR_BAR_0x02010953)
+// HCA EH BAR and Range Register (HCA_EH_BAR_0x0201098A)
+// HCA EH Mirror BAR and Range Register (HCA_EH_MIRROR_BAR_0x02010993)
//
// MCD
// MCD Configuration 0 (Non-Mirrored) (MCD_CN00_0x0201340C)
@@ -2513,10 +2515,22 @@ proc_setup_bars_write_local_chip_region_bars(
// HCA (non-mirrored)
if (i_smp_chip.non_mirrored_range.enabled)
{
- FAPI_DBG("proc_setup_bars_write_local_chip_region_bars: Writing HCA BAR and Range (Non-Mirrored) register");
+ FAPI_DBG("proc_setup_bars_write_local_chip_region_bars: Writing HCA EN BAR and Range (Non-Mirrored) register");
rc = proc_setup_bars_common_write_bar_reg(
i_smp_chip.chip->this_chip,
- HCA_BAR_0x0201098A,
+ HCA_EN_BAR_0x0201094A,
+ hca_nm_bar_reg_def,
+ i_smp_chip.non_mirrored_range);
+ if (!rc.ok())
+ {
+ FAPI_ERR("proc_setup_bars_write_local_chip_region_bars: Error from proc_setup_bars_common_write_bar_reg");
+ break;
+ }
+
+ FAPI_DBG("proc_setup_bars_write_local_chip_region_bars: Writing HCA EH BAR and Range (Non-Mirrored) register");
+ rc = proc_setup_bars_common_write_bar_reg(
+ i_smp_chip.chip->this_chip,
+ HCA_EH_BAR_0x0201098A,
hca_nm_bar_reg_def,
i_smp_chip.non_mirrored_range);
if (!rc.ok())
@@ -2529,10 +2543,22 @@ proc_setup_bars_write_local_chip_region_bars(
// HCA (mirrored)
if (i_smp_chip.mirrored_range.enabled)
{
- FAPI_DBG("proc_setup_bars_write_local_chip_region_bars: Writing HCA Mirror BAR and Range (Mirrored) register");
+ FAPI_DBG("proc_setup_bars_write_local_chip_region_bars: Writing HCA EN Mirror BAR and Range (Mirrored) register");
+ rc = proc_setup_bars_common_write_bar_reg(
+ i_smp_chip.chip->this_chip,
+ HCA_EN_MIRROR_BAR_0x02010953,
+ hca_m_bar_reg_def,
+ i_smp_chip.mirrored_range);
+ if (!rc.ok())
+ {
+ FAPI_ERR("proc_setup_bars_write_local_chip_region_bars: Error from proc_setup_bars_common_write_bar_reg");
+ break;
+ }
+
+ FAPI_DBG("proc_setup_bars_write_local_chip_region_bars: Writing HCA EH Mirror BAR and Range (Mirrored) register");
rc = proc_setup_bars_common_write_bar_reg(
i_smp_chip.chip->this_chip,
- HCA_MIRROR_BAR_0x02010993,
+ HCA_EH_MIRROR_BAR_0x02010993,
hca_m_bar_reg_def,
i_smp_chip.mirrored_range);
if (!rc.ok())
diff --git a/src/usr/hwpf/hwp/include/p8_scom_addresses.H b/src/usr/hwpf/hwp/include/p8_scom_addresses.H
index 7af939ce8..2993ecd45 100755
--- a/src/usr/hwpf/hwp/include/p8_scom_addresses.H
+++ b/src/usr/hwpf/hwp/include/p8_scom_addresses.H
@@ -20,7 +20,7 @@
/* Origin: 30 */
/* */
/* IBM_PROLOG_END_TAG */
-// $Id: p8_scom_addresses.H,v 1.155 2013/06/13 13:22:10 jmcgill Exp $
+// $Id: p8_scom_addresses.H,v 1.157 2013/06/21 15:17:24 jmcgill Exp $
// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/p8_scom_addresses.H,v $
//------------------------------------------------------------------------------
// *! (C) Copyright International Business Machines Corp. 2011
@@ -797,13 +797,14 @@ CONST_UINT64_T( PSI_HB_FIR_OR_0x02010902 , ULL(0x02010902) );
//------------------------------------------------------------------------------
// HCA
//------------------------------------------------------------------------------
-
CONST_UINT64_T( HCA_EN_FIR_AND_0x02010941 , ULL(0x02010941) );
+CONST_UINT64_T( HCA_EN_BAR_0x0201094A , ULL(0x0201094A) );
+CONST_UINT64_T( HCA_EN_MIRROR_BAR_0x02010953 , ULL(0x02010953) );
CONST_UINT64_T( HCA_MODE_0x0201094F , ULL(0x0201094F) );
CONST_UINT64_T( HCA_EN_EHHCA_FIR_AND_0x02010981 , ULL(0x02010981) );
-CONST_UINT64_T( HCA_BAR_0x0201098A , ULL(0x0201098A) );
-CONST_UINT64_T( HCA_MIRROR_BAR_0x02010993 , ULL(0x02010993) );
+CONST_UINT64_T( HCA_EH_BAR_0x0201098A , ULL(0x0201098A) );
+CONST_UINT64_T( HCA_EH_MIRROR_BAR_0x02010993 , ULL(0x02010993) );
//------------------------------------------------------------------------------
// INTERRUPT CONTROL PRESENTER (ICP)
@@ -1733,6 +1734,10 @@ CONST_UINT64_T( EX_THERM_CONTROL_REG_0x10050012 , ULL(0x10050012) );
CONST_UINT64_T( EX_THERM_ERR_STATUS_REG_0x10050013 , ULL(0x10050013) );
CONST_UINT64_T( EX_CPM_CONFIG_WRITE_REG0_0x10050000 , ULL(0x10050000) );
CONST_UINT64_T( EX_CPM_CONFIG_WRITE_REG1_0x10050001 , ULL(0x10050001) );
+CONST_UINT64_T( EX_CPM_RAW_RESULT0_10050005 , ULL(0x10050005) );
+CONST_UINT64_T( EX_CPM_RAW_RESULT1_10050006 , ULL(0x10050006) );
+CONST_UINT64_T( EX_CPM_ENCODED_RESULT0_10050008 , ULL(0x10050008) );
+CONST_UINT64_T( EX_CPM_ENCODED_RESULT1_10050009 , ULL(0x10050009) );
//------------------------------------------------------------------------------
// EX Security
@@ -1898,6 +1903,7 @@ CONST_UINT64_T( EX_PCBS_PSTATE_TABLE_CTRL_REG_0x100F015E
CONST_UINT64_T( EX_PCBS_PSTATE_TABLE_REG_0x100F015F , ULL(0x100F015F) );
CONST_UINT64_T( EX_PCBS_Pstate_Step_Target_Register_0x100F0160 , ULL(0x100F0160) );
CONST_UINT64_T( EX_PCBS_iVRM_VID_Control_Reg0_0x100F0162 , ULL(0x100F0162) );
+CONST_UINT64_T( EX_PCBS_DPLL_STATUS_REG_100F0161 , ULL(0x100F0161) );
CONST_UINT64_T( EX_PCBS_iVRM_VID_Control_Reg1_0x100F0163 , ULL(0x100F0163) );
CONST_UINT64_T( EX_PCBS_OCC_Heartbeat_Reg_0x100F0164 , ULL(0x100F0164) );
CONST_UINT64_T( EX_PCBS_Resonant_Clock_Control_Reg0_0x100F0165 , ULL(0x100F0165) );
@@ -1949,6 +1955,12 @@ This section is automatically updated by CVS when you check in this file.
Be sure to create CVS comments when you commit so that they can be included here.
$Log: p8_scom_addresses.H,v $
+Revision 1.157 2013/06/21 15:17:24 jmcgill
+support HCA EN/EH BAR and Range registers
+
+Revision 1.156 2013/06/20 16:10:16 campisan
+Added SCOM addresses for CPM calibration code not previously defined.
+
Revision 1.155 2013/06/13 13:22:10 jmcgill
add HCA BAR and Range registers
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