Add in ATTR_BAD_BIT_DQMAP functions

Change-Id: If558eff169ebe0a958d7e525cae8f4258e51e6dd
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45508
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Dev-Ready: JACOB L. HARVEY <jlharvey@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45512
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: JACOB L. HARVEY <jlharvey@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

3 files changed, 33 insertions, 37 deletions

diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.C b/src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.C
index bd920c3a3..f9e6f892a 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.C
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.C
@@ -746,7 +746,7 @@ fapi2::ReturnCode find_and_log_cal_errors(const fapi2::Target<fapi2::TARGET_TYPE
 
         if (dp16::process_bad_bits(i_target, l_dimm, l_encoding) == fapi2::FAPI2_RC_SUCCESS)
         {
-            // If we're on a Nimbus, lab team requests we 'pass' training with 1 nibble + 1 bit
+            // If we're on a Nimbus, lab team requests we 'pass' training with 1 nibble + 1 bit or less
             if (mss::chip_ec_feature_mss_training_bad_bits(i_target))
             {
                 FAPI_INF("p9_mss_draminit_training: errors reported, but 1 nibble + 1 bit or less was marked.%s",
@@ -765,13 +765,8 @@ fapi2::ReturnCode find_and_log_cal_errors(const fapi2::Target<fapi2::TARGET_TYPE
 
         // Let's update the attribute with the failing DQ bits since we had a training error
         // The only fail we get here is a scom error, so we should error out
-        // We only want to update the attribute for hostboot runs though
-        // Updating the attribute updates the DIMM's VPD and actually disabled those DQ bits for good
-        // Commenting out until PRD has the backside implementation complete
-#ifdef __HOSTBOOT_MODULE
-        // TODO RTC:178400 Come back and use the ATTR_BAD_BITS accessor functions from PRD when available
-        //FAPI_TRY( mss::dp16::record_bad_bits(i_target) );
-#endif
+        // Hostboot will write the info to SPD and Cronus will write it to the attribute
+        FAPI_TRY( mss::dp16::record_bad_bits(i_target) );
 
         // Let's add the error to our vector for later processing (if it didn't affect too many DQ bits)
         if (l_rc != fapi2::FAPI2_RC_SUCCESS)
@@ -875,10 +870,8 @@ fapi2::ReturnCode phy_scominit(const fapi2::Target<TARGET_TYPE_MCBIST>& i_target
         // Section 5.2.4.4 DP16 Data Bit Disable 1 on page 289
         FAPI_TRY( mss::dp16::reset_data_bit_enable(p) );
 
-        // Not going to load bad bits from the attributes until after f/w bring up
-#ifdef LOAD_BAD_BITS_FROM_ATTR
+        // Load bad bits from the attribute
         FAPI_TRY( mss::dp16::reset_bad_bits(p) );
-#endif
 
         FAPI_TRY( mss::rank::get_rank_pairs(p, l_pairs) );
 
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.C b/src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.C
index a3484692c..7d249c6ae 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.C
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.C
@@ -2617,7 +2617,7 @@ fapi_try_exit:
 /// @note Read the bad bits from the f/w attributes and stuff them in the
 /// appropriate registers.
 /// @param[in] i_target the fapi2 target of the port
-/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if bad bits can be repaired
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS iff no errors
 ///
 fapi2::ReturnCode reset_bad_bits( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target )
 {
@@ -2637,8 +2637,8 @@ fapi_try_exit:
 /// @brief Reset the bad-bits masks for a port - helper for ease of testing
 /// @note Read the bad bits from the f/w attributes and stuff them in the
 /// appropriate registers.
-/// @param[in] i_target the fapi2 target of the port
-/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if bad bits can be repaired
+/// @param[in] i_target the fapi2 target of the DIMM
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS iff no errors on the scoms
 ///
 fapi2::ReturnCode reset_bad_bits_helper( const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
         const uint8_t i_bad_dq[MAX_RANK_PER_DIMM][BAD_DQ_BYTE_COUNT])
@@ -2656,7 +2656,8 @@ fapi2::ReturnCode reset_bad_bits_helper( const fapi2::Target<fapi2::TARGET_TYPE_
         uint64_t l_dimm_index = rank::get_dimm_from_rank(r);
         FAPI_TRY( mss::rank::get_pair_from_rank(mss::find_target<fapi2::TARGET_TYPE_MCA>(i_target), r, l_rp) );
 
-        FAPI_INF("processing bad bits for DIMM%d rank %d (%d) rp %d", l_dimm_index, mss::index(r), r, l_rp);
+        FAPI_INF("%s processing bad bits for DIMM%d rank %d (%d) rp %d", mss::c_str(i_target), l_dimm_index, mss::index(r), r,
+                 l_rp);
 
         // We loop over the disable registers for this rank pair, and shift the bits from the attribute
         // array in to the disable registers
@@ -2675,11 +2676,10 @@ fapi2::ReturnCode reset_bad_bits_helper( const fapi2::Target<fapi2::TARGET_TYPE_
             {
                 uint64_t l_register_value = (l_bad_bits[l_byte_index] << 8) | l_bad_bits[l_byte_index + 1];
 
-                FAPI_INF("writing %s 0x%0lX value 0x%0lX from 0x%X, 0x%X",
+                FAPI_INF("%s writing 0x%0lX value 0x%0lX from 0x%X, 0x%X",
                          mss::c_str(i_target), a.first, l_register_value,
                          l_bad_bits[l_byte_index], l_bad_bits[l_byte_index + 1]);
 
-                // TODO RTC: 163674 Only wriiting the DISABLE0 register - not sure what happened to the DQS?
                 FAPI_TRY( mss::putScom(mss::find_target<fapi2::TARGET_TYPE_MCA>(i_target), a.first, l_register_value) );
                 l_byte_index += 2;
             }
@@ -2695,30 +2695,18 @@ fapi_try_exit:
 /// @note This is different than a register write as it writes attributes which
 /// cause firmware to act on the disabled bits.
 /// @param[in] i_target the fapi2 target of the port
-/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if bad bits can be repaired
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if no error on the scoms or attribute sets
 ///
 fapi2::ReturnCode record_bad_bits( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target )
 {
-    uint8_t l_value[MAX_RANK_PER_DIMM][BAD_DQ_BYTE_COUNT] = {};
-
-    // Process the bad bits into an array. We copy these in to their own array
-    // as it allows the compiler to check indexes where a passed pointer wouldn't
-    // otherwise do.
-    uint8_t l_data[MAX_RANK_PER_DIMM][BAD_DQ_BYTE_COUNT] = {};
-
     for( const auto& d : mss::find_targets<fapi2::TARGET_TYPE_DIMM>(i_target) )
     {
-        FAPI_TRY( mss::dp16::record_bad_bits_helper(d, l_data) );
-
-        // Read the attribute
-        FAPI_TRY( mss::bad_dq_bitmap(d, &(l_value[0][0])) );
+        uint8_t l_data[MAX_RANK_PER_DIMM][BAD_DQ_BYTE_COUNT] = {};
 
-        // Modify
-        memcpy( &(l_value[0][0]), &(l_data[0][0]),
-                MAX_RANK_PER_DIMM * 10 );
+        FAPI_TRY( mss::dp16::record_bad_bits_helper(d, l_data) );
 
         // Write
-        FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_BAD_DQ_BITMAP, d, l_value) );
+        FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_BAD_DQ_BITMAP, d, l_data) );
     }
 
 fapi_try_exit:
@@ -2730,7 +2718,7 @@ fapi_try_exit:
 /// @note This is different than a register write as it writes attributes which
 /// cause firmware to act on the disabled bits.
 /// @param[in] i_target the fapi2 target of the port
-/// @param[out] o_bad_dq an array of [MAX_DIMM_PER_PORT][MAX_RANK_PER_DIMM][BAD_DQ_BYTE_COUNT] containing the attribute information
+/// @param[out] o_bad_dq an array of [MAX_RANK_PER_DIMM][BAD_DQ_BYTE_COUNT] containing the attribute information
 /// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if bad bits can be repaired
 ///
 fapi2::ReturnCode record_bad_bits_helper( const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
@@ -2749,7 +2737,20 @@ fapi2::ReturnCode record_bad_bits_helper( const fapi2::Target<fapi2::TARGET_TYPE
         uint64_t l_dimm_index = rank::get_dimm_from_rank(r);
         FAPI_TRY( mss::rank::get_pair_from_rank(mss::find_target<fapi2::TARGET_TYPE_MCA>(i_target), r, l_rp) );
 
-        FAPI_INF("recording bad bits for DIMM%d rank %d (%d) rp %d", l_dimm_index, mss::index(r), r, l_rp);
+        FAPI_INF("%s recording bad bits for DIMM%d rank %d (%d) rp %d",
+                 mss::c_str(i_target),
+                 l_dimm_index,
+                 mss::index(r),
+                 r,
+                 l_rp);
+
+        FAPI_ASSERT( l_rp < MAX_RANK_PAIRS,
+                     fapi2::MSS_INVALID_RANK_PAIR()
+                     .set_RANK_PAIR(l_rp)
+                     .set_FUNCTION(RECORD_BAD_BITS_HELPER)
+                     .set_MCA_TARGET(mss::find_target<fapi2::TARGET_TYPE_MCA>(i_target)),
+                     "%s Invalid rank pair (%d) in record_bad_bits_helper",
+                     mss::c_str(i_target), l_rp);
 
         // We loop over the disable registers for this rank pair, and shift the bits from the attribute
         // array in to the disable registers
@@ -2761,7 +2762,8 @@ fapi2::ReturnCode record_bad_bits_helper( const fapi2::Target<fapi2::TARGET_TYPE
             // our current rank pair.
             std::vector< std::pair< fapi2::buffer<uint64_t>, fapi2::buffer<uint64_t> > > l_register_value;
 
-            FAPI_TRY( mss::scom_suckah(mss::find_target<fapi2::TARGET_TYPE_MCA>(i_target), TT::BIT_DISABLE_REG[l_rp],
+            FAPI_TRY( mss::scom_suckah(mss::find_target<fapi2::TARGET_TYPE_MCA>(i_target),
+                                       TT::BIT_DISABLE_REG[l_rp],
                                        l_register_value) );
 
             // Where in the array we are, incremented by two for every DP
@@ -2781,7 +2783,6 @@ fapi2::ReturnCode record_bad_bits_helper( const fapi2::Target<fapi2::TARGET_TYPE
                          l_bad_bits[l_byte_index + 1],
                          v.first);
 
-                // TODO RTC: 163674 Only writing the DISABLE0 register - not sure what happened to the DQS?
                 l_byte_index += 2;
             }
         }
@@ -2982,3 +2983,4 @@ fapi_try_exit:
 
 } // close namespace dp16
 } // close namespace mss
+
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/shared/mss_const.H b/src/import/chips/p9/procedures/hwp/memory/lib/shared/mss_const.H
index 5dcf336db..9042ef2e0 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/shared/mss_const.H
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/shared/mss_const.H
@@ -191,6 +191,7 @@ enum ffdc_functions
     SET_RANK_FIELD = 6,
     RD_CTR_WORKAROUND_READ_DATA = 7,
     OVERRIDE_ODT_WR_CONFIG = 8,
+    RECORD_BAD_BITS_HELPER = 9,
 };
 // Static consts describing the bits used in the cal_step_enable attribute
 // These are bit positions. 0 is the left most bit.