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authorDean Sanner <dsanner@us.ibm.com>2019-07-26 13:33:49 -0500
committerWilliam G Hoffa <wghoffa@us.ibm.com>2019-11-08 15:25:20 -0600
commit7c03d51c2cc1db8e950866a95fc4c94e564fb14f (patch)
tree9e266c02454cb343fbca66aea8592ac2ddc1d316 /src
parentd519d2911d415a91a64c2d3e124694a701f6d349 (diff)
downloadtalos-hostboot-7c03d51c2cc1db8e950866a95fc4c94e564fb14f.tar.gz
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Always position HOMER in HV space for istep 16
P9N/P9C always inits to DD2.x mode for hostboot which doesn't support SMF. This means that the HCODE non secure transition to HCODE secure won't work. Because of that, we now force istep 16 to always place HOMER in non SMF memory (in UV mode if SMF active) and transition into UV there. Then in istep 21 the HOMER is rebuilt correctly for SMF. Note that all the changes are in istep 15 as istep 21 uses the ATTR setup there. Change-Id: I566903dc373667a410ddcc0a1d2cc91bcd94b08d Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/81202 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Dean Sanner <dsanner@us.ibm.com> Reviewed-by: Christian R Geddes <crgeddes@us.ibm.com> Reviewed-by: William G Hoffa <wghoffa@us.ibm.com>
Diffstat (limited to 'src')
-rw-r--r--src/usr/isteps/istep15/host_build_stop_image.C89
-rw-r--r--src/usr/isteps/istep15/proc_set_pba_homer_bar.C78
2 files changed, 93 insertions, 74 deletions
diff --git a/src/usr/isteps/istep15/host_build_stop_image.C b/src/usr/isteps/istep15/host_build_stop_image.C
index 26e3677f4..6bc755314 100644
--- a/src/usr/isteps/istep15/host_build_stop_image.C
+++ b/src/usr/isteps/istep15/host_build_stop_image.C
@@ -445,7 +445,17 @@ void* host_build_stop_image (void *io_pArgs)
//If running Sapphire need to place this at the top of memory instead
if(is_sapphire_load())
{
- l_memBase = get_top_homer_mem_addr();
+ //Because the way P9N/P9C are init'ed for backwards HB / SBE
+ //compatibility (SMF never enabled -- thus unsecure homer to
+ //secure homer sc2 (system call to Ultravisor) doesn't work) during
+ //istep 15 need to "trick" hostboot into placing HOMER into normal
+ //memory @HRMOR (instead of secure SMF memory). When HB goes
+ //through istep 16 it will enter UV mode if SMF is enabled, and then
+ //when PM complex is restarted in istep 21, HOMER is moved to right
+ //spot. No movement of HOME oocurs in non-SMF mode; HOMER lands in
+ //non-secure memory.
+
+ l_memBase = get_top_mem_addr();
assert (l_memBase != 0,
"host_build_stop_image: Top of memory was 0!");
@@ -502,9 +512,6 @@ void* host_build_stop_image (void *io_pArgs)
"Found %d functional procs in system",
l_procChips.size() );
- auto l_unsecureHomerSize =
- l_sys->getAttr<TARGETING::ATTR_UNSECURE_HOMER_SIZE>();
-
for (const auto & l_procChip: l_procChips)
{
do {
@@ -563,22 +570,12 @@ void* host_build_stop_image (void *io_pArgs)
break;
}
- if(SECUREBOOT::SMF::isSmfEnabled())
- {
- // In SMF mode, unsecure HOMER goes to the top of unsecure
- // memory (2MB aligned); we need to subtract the size of the
- // unsecure HOMER and align the resulting address to arrive
- // at the correct location.
- uint64_t l_unsecureHomerAddr = ALIGN_DOWN_X(
- ISTEP::get_top_mem_addr()
- - MAX_UNSECURE_HOMER_SIZE,
- 2 * MEGABYTE);
- l_procChip->setAttr<TARGETING::ATTR_UNSECURE_HOMER_ADDRESS>
- (l_unsecureHomerAddr);
- TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
- "host_build_stop_image: unsecure HOMER addr = 0x%.16llX",
- l_unsecureHomerAddr);
- }
+ //Set unsecure HOMER address to real HOMER, as this
+ //will allow SMF inits to become active (results in
+ //URMOR == HRMOR in non SMF memory). The processor self-restore
+ //code is 2MB into HOMER, so point the unsecure HOMER there.
+ l_procChip->setAttr<TARGETING::ATTR_UNSECURE_HOMER_ADDRESS>
+ (l_procRealMemAddr + (2 * MEGABYTE));
//Call p9_hcode_image_build.C HWP
FAPI_INVOKE_HWP( l_errl,
@@ -608,58 +605,6 @@ void* host_build_stop_image (void *io_pArgs)
break;
}
- // We now need to copy the data that was put in l_temp_buffer2
- // by the p9_hcode_image_build procedure into the unsecure
- // HOMER memory
- if(SECUREBOOT::SMF::isSmfEnabled())
- {
- auto l_unsecureHomerAddr = l_procChip->
- getAttr<TARGETING::ATTR_UNSECURE_HOMER_ADDRESS>();
-
-
- assert(l_unsecureHomerSize <= MAX_RING_BUF_SIZE,
- "host_build_stop_image: unsecure HOMER is bigger than the output buffer");
- assert(l_unsecureHomerSize <= MAX_UNSECURE_HOMER_SIZE,
- "host_build_stop_image: the size of unsecure HOMER is more than 0x%x", MAX_UNSECURE_HOMER_SIZE);
- assert(l_unsecureHomerAddr,
- "host_build_stop_image: the unsecure HOMER addr is 0");
-
- void* l_unsecureHomerVAddr = mm_block_map(
- reinterpret_cast<void*>(l_unsecureHomerAddr),
- l_unsecureHomerSize);
- assert(l_unsecureHomerVAddr,
- "host_build_stop_image: could not map unsecure HOMER phys addr");
- memcpy(l_unsecureHomerVAddr,
- l_temp_buffer2,
- l_unsecureHomerSize);
- int l_rc = mm_block_unmap(l_unsecureHomerVAddr);
- if(l_rc)
- {
- /*@
- * @errortype
- * @reasoncode ISTEP::RC_MM_UNMAP_FAILED
- * @severity ERRORLOG::ERRL_SEV_UNRECOVERABLE
- * @moduleid ISTEP::MOD_BUILD_HCODE_IMAGES
- * @userdata1 Unsecure HOMER addr
- * @userdata2 RC from mm_block_unmap
- * @devdesc Could not unmap unsecure HOMER's virtual
- * address
- * @custdesc A problem occurred during the IPL of the
- * system
- */
- l_errl = new ERRORLOG::ErrlEntry(
- ERRORLOG::ERRL_SEV_UNRECOVERABLE,
- ISTEP::MOD_BUILD_HCODE_IMAGES,
- ISTEP::RC_MM_UNMAP_FAILED,
- reinterpret_cast<uint64_t>(
- l_unsecureHomerVAddr),
- l_rc,
- ERRORLOG::ErrlEntry::ADD_SW_CALLOUT);
- l_errl->collectTrace(ISTEP_COMP_NAME);
- break;
- }
- }
-
l_errl = applyHcodeGenCpuRegs( l_procChip,
l_pImageOut,
l_sizeImageOut );
diff --git a/src/usr/isteps/istep15/proc_set_pba_homer_bar.C b/src/usr/isteps/istep15/proc_set_pba_homer_bar.C
index 0173b1a15..5c02af9df 100644
--- a/src/usr/isteps/istep15/proc_set_pba_homer_bar.C
+++ b/src/usr/isteps/istep15/proc_set_pba_homer_bar.C
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2015,2016 */
+/* Contributors Listed Below - COPYRIGHT 2015,2019 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -46,10 +46,17 @@
#include <return_code.H>
#include <p9_pm_set_homer_bar.H>
+#include <secureboot/smf_utils.H>
+#include <secureboot/smf.H>
+#include <isteps/mem_utils.H>
+#include <util/align.H>
+
+
//Namespaces
using namespace ERRORLOG;
using namespace TARGETING;
using namespace fapi2;
+using namespace ISTEP;
namespace ISTEP_15
{
@@ -62,12 +69,56 @@ void* proc_set_pba_homer_bar (void *io_pArgs)
{
TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_proc_set_pba_homer_bar entry" );
ISTEP_ERROR::IStepError l_StepError;
- errlHndl_t l_errl = NULL;
+ errlHndl_t l_errl = nullptr;
TARGETING::TargetHandleList l_procChips;
+ uint64_t l_smfBase = 0x0;
+ uint64_t l_unsecureHomerAddr = get_top_mem_addr();
+
+
+ //Determine top-level system target
+ TARGETING::Target* l_sys = nullptr;
+ TARGETING::targetService().getTopLevelTarget(l_sys);
+ assert(l_sys != nullptr, "Top level target was nullptr!");
+
+ //Because the way P9N/P9C are init'ed for backwards HB / SBE
+ //compatibility (SMF never enabled -- thus unsecure homer to
+ //secure homer sc2 (system call to Ultravisor) doesn't work) during istep 15
+ //need to "trick" hostboot into placing HOMER into normal memory @
+ //HRMOR. When HB goes through istep 16 it will enter UV
+ //mode if SMF is enabled, and then when PM complex is restarted
+ //in istep 21, HOMER is moved to right spot
+ if(SECUREBOOT::SMF::isSmfEnabled())
+ {
+ l_smfBase = get_top_homer_mem_addr();
+ assert(l_smfBase != 0,
+ "proc_set_pba_homer_bar: Top of SMF memory was 0!");
+ if(is_sapphire_load())
+ {
+ l_smfBase -= VMM_ALL_HOMER_OCC_MEMORY_SIZE;
+ // Unsecure HOMER address is used in istep21 to place the
+ // unsecure part of the HOMER image outside of SMF memory.
+ // Unsecure HOMER goes to the top of unsecure
+ // memory (2MB aligned); we need to subtract the size of the
+ // unsecure HOMER and align the resulting address to arrive
+ // at the correct location.
+ l_unsecureHomerAddr = ALIGN_DOWN_X(l_unsecureHomerAddr -
+ MAX_UNSECURE_HOMER_SIZE,
+ 2 * MEGABYTE);
+ }
+ assert(l_unsecureHomerAddr != 0,
+ "proc_set_pba_homer_bar: Unsecure HOMER addr was 0!");
+
+ //Since we have the HOMER location defined, set the
+ // OCC common attribute to be used later by pm code
+ l_sys->setAttr<TARGETING::ATTR_OCC_COMMON_AREA_PHYS_ADDR>
+ (l_smfBase + VMM_HOMER_REGION_SIZE);
+ }
//Use targeting code to get a list of all processors
getAllChips( l_procChips, TARGETING::TYPE_PROC );
+
+
//Loop through all of the procs and call the HWP on each one
for (const auto & l_procChip: l_procChips)
{
@@ -92,6 +143,29 @@ void* proc_set_pba_homer_bar (void *io_pArgs)
l_StepError.addErrorDetails( l_errl );
errlCommit( l_errl, HWPF_COMP_ID );
}
+
+ if(SECUREBOOT::SMF::isSmfEnabled())
+ {
+ //Set correct SMF value used later in istep 21
+ // calculate size and location of the HCODE output buffer
+ uint32_t l_procNum =
+ l_procChip->getAttr<TARGETING::ATTR_POSITION>();
+ uint64_t l_procOffsetAddr = l_procNum * VMM_HOMER_INSTANCE_SIZE;
+
+ l_procChip->setAttr<TARGETING::ATTR_HOMER_PHYS_ADDR>
+ (l_smfBase + l_procOffsetAddr);
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "Update %.8X HOMER from 0x%.16llX to 0x%.16llX for SMF",
+ TARGETING::get_huid(l_procChip), homerAddr,
+ (l_smfBase + l_procOffsetAddr));
+
+ l_procChip->setAttr<TARGETING::ATTR_UNSECURE_HOMER_ADDRESS>
+ (l_unsecureHomerAddr);
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "proc_set_pba_homer_bar: unsecure HOMER addr = 0x%.16llX",
+ l_unsecureHomerAddr);
+ }
+
}
TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_proc_set_pba_homer_bar exit" );
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