Close windows where Hostboot HRMOR is not available to FSP

There are certain small time windows where the core scratch register, which
holds the Hostboot load address for FSP to read in order to dump Hostboot, is
cleared during winkle.  This change caches the Hostboot load address in a
processor attribute that FSP can read/use in the event it happens to request a
dump in the window where the core scratch register is not valid.

Change-Id: I776df5e64f4d8ad382392662d08ee349661ba78a
CQ: SW444212
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/66664
Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com>
Reviewed-by: Ilya Smirnov <ismirno@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

4 files changed, 45 insertions, 1 deletions

diff --git a/src/include/kernel/memstate.H b/src/include/kernel/memstate.H
index e595cd8c2..3bf755020 100644
--- a/src/include/kernel/memstate.H
+++ b/src/include/kernel/memstate.H
@@ -33,6 +33,15 @@
 
 namespace KernelMemState
 {
+    /**
+     *  @brief Reserved enumerated values for the ATTR_HB_LOAD_ADDRESS_BYTES
+     *      attribute
+     */
+    enum HbLoadAddrRsvd : uint64_t
+    {
+        NOT_APPLICABLE = 0xFFFFFFFFFFFFFFFFULL, ///< Ignore / not applicable
+    };
+
     /* see mmio.h for scratch reg definitions */
 
     enum MemLocation
diff --git a/src/usr/isteps/istep21/call_host_start_payload.C b/src/usr/isteps/istep21/call_host_start_payload.C
index 6178f35f7..f8cfd3172 100644
--- a/src/usr/isteps/istep21/call_host_start_payload.C
+++ b/src/usr/isteps/istep21/call_host_start_payload.C
@@ -60,6 +60,7 @@
 #include <sbeio/sbeioif.H>
 #include <runtime/runtime.H>
 #include <p9_stop_api.H>
+#include <kernel/memstate.H>
 #include "../hdat/hdattpmdata.H"
 #include "hdatstructs.H"
 
@@ -620,6 +621,20 @@ errlHndl_t callShutdown ( uint64_t i_masterInstance,
             // PHYP load, do not enable ATTN
         }
 
+        // Invalidate Hostboot load address across all (intentional) processors
+        // so that FSP will not attempt a dump when the load address in the core
+        // scratch register returns 0 (as happens during the shutdown).  The
+        // update will take effect from FSP perspective when Hostboot
+        // synchronizes its attributes down during the attribute resource
+        // provider shutdown.
+        TargetHandleList procs;
+        (void)getAllChips(procs, TYPE_PROC,false);
+        for(auto pProc : procs)
+        {
+            pProc->setAttr<TARGETING::ATTR_HB_HRMOR_BYTES>(
+                KernelMemState::HbLoadAddrRsvd::NOT_APPLICABLE);
+        }
+
         // do the shutdown.
         TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
                    "callShutdown finished, shutdown = 0x%x.",
diff --git a/src/usr/targeting/common/xmltohb/hb_customized_attrs.xml b/src/usr/targeting/common/xmltohb/hb_customized_attrs.xml
index bd80b5cc5..5c9b80970 100644
--- a/src/usr/targeting/common/xmltohb/hb_customized_attrs.xml
+++ b/src/usr/targeting/common/xmltohb/hb_customized_attrs.xml
@@ -106,7 +106,13 @@
           <id>ATTR_FREQ_X_MHZ</id>
           <default>2000</default>
           <writeable/>
-     </attribute>
+    </attribute>
+
+    <attribute>
+          <id>ATTR_HB_HRMOR_BYTES</id>
+          <writeable/>
+          <persistency>volatile</persistency>
+    </attribute>
 
     <attribute>
           <id>ATTR_MNFG_FLAGS</id>
diff --git a/src/usr/targeting/targetservicestart.C b/src/usr/targeting/targetservicestart.C
index 4ecc20a5f..9fd7a0435 100755
--- a/src/usr/targeting/targetservicestart.C
+++ b/src/usr/targeting/targetservicestart.C
@@ -44,6 +44,7 @@
 #include <sys/mm.h>
 #include <sys/task.h>
 #include <sys/sync.h>
+#include <arch/ppc.H>
 #include <targeting/common/trace.H>
 #include <targeting/adapters/assertadapter.H>
 #include <targeting/adapters/types.H>
@@ -728,6 +729,19 @@ static void initializeAttributes(TargetService& i_targetService,
                 l_sys->setAttr<ATTR_FABRIC_PRESENT_GROUPS>(l_fabric_groups);
             }
         }
+
+        // Set Hostboot load address across all (intentional) processors so that
+        // FSP can determine the Hostboot load address when cores are
+        // winkled (since during winkle, the core scratch register holding the
+        // Hostboot load address is cleared).
+        TargetHandleList procs;
+        const auto loadAddressBytes = cpu_spr_value(CPU_SPR_HRMOR);
+        (void)getAllChips(procs, TYPE_PROC,false);
+        for(auto pProc : procs)
+        {
+            pProc->setAttr<TARGETING::ATTR_HB_HRMOR_BYTES>(
+                loadAddressBytes);
+        }
     }
     else // top level is NULL - never expected
     {